xref: /llvm-project/llvm/test/CodeGen/PowerPC/ppc-crbits-onoff.ll (revision 8e901c255df45e38cb1d69a576804029e20868bf)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2; RUN: llc -ppc-gpr-icmps=all -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s
3; RUN: llc -ppc-gpr-icmps=all -verify-machineinstrs -mcpu=pwr7 -mattr=-isel < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s
4target datalayout = "E-m:e-i64:64-n32:64"
5target triple = "powerpc64-unknown-linux-gnu"
6
7; Function Attrs: nounwind readnone
8define signext i32 @crbitsoff(i32 signext %v1, i32 signext %v2) #0 {
9; CHECK-LABEL: crbitsoff:
10; CHECK:       # %bb.0: # %entry
11; CHECK-NEXT:    cntlzw 4, 4
12; CHECK-NEXT:    cmplwi 3, 0
13; CHECK-NEXT:    li 3, 1
14; CHECK-NEXT:    iseleq 3, 0, 3
15; CHECK-NEXT:    rlwinm 4, 4, 27, 5, 31
16; CHECK-NEXT:    and 3, 3, 4
17; CHECK-NEXT:    blr
18;
19; CHECK-NO-ISEL-LABEL: crbitsoff:
20; CHECK-NO-ISEL:       # %bb.0: # %entry
21; CHECK-NO-ISEL-NEXT:    cmplwi 3, 0
22; CHECK-NO-ISEL-NEXT:    li 3, 1
23; CHECK-NO-ISEL-NEXT:    bne 0, .LBB0_2
24; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
25; CHECK-NO-ISEL-NEXT:    li 3, 0
26; CHECK-NO-ISEL-NEXT:  .LBB0_2: # %entry
27; CHECK-NO-ISEL-NEXT:    cntlzw 4, 4
28; CHECK-NO-ISEL-NEXT:    rlwinm 4, 4, 27, 5, 31
29; CHECK-NO-ISEL-NEXT:    and 3, 3, 4
30; CHECK-NO-ISEL-NEXT:    blr
31entry:
32  %tobool = icmp ne i32 %v1, 0
33  %lnot = icmp eq i32 %v2, 0
34  %and3 = and i1 %tobool, %lnot
35  %and = zext i1 %and3 to i32
36  ret i32 %and
37
38}
39
40define signext i32 @crbitson(i32 signext %v1, i32 signext %v2) #1 {
41; CHECK-LABEL: crbitson:
42; CHECK:       # %bb.0: # %entry
43; CHECK-NEXT:    cntlzw 3, 3
44; CHECK-NEXT:    cntlzw 4, 4
45; CHECK-NEXT:    srwi 3, 3, 5
46; CHECK-NEXT:    srwi 4, 4, 5
47; CHECK-NEXT:    xori 3, 3, 1
48; CHECK-NEXT:    and 3, 3, 4
49; CHECK-NEXT:    blr
50;
51; CHECK-NO-ISEL-LABEL: crbitson:
52; CHECK-NO-ISEL:       # %bb.0: # %entry
53; CHECK-NO-ISEL-NEXT:    cntlzw 3, 3
54; CHECK-NO-ISEL-NEXT:    cntlzw 4, 4
55; CHECK-NO-ISEL-NEXT:    srwi 3, 3, 5
56; CHECK-NO-ISEL-NEXT:    srwi 4, 4, 5
57; CHECK-NO-ISEL-NEXT:    xori 3, 3, 1
58; CHECK-NO-ISEL-NEXT:    and 3, 3, 4
59; CHECK-NO-ISEL-NEXT:    blr
60entry:
61  %tobool = icmp ne i32 %v1, 0
62  %lnot = icmp eq i32 %v2, 0
63  %and3 = and i1 %tobool, %lnot
64  %and = zext i1 %and3 to i32
65  ret i32 %and
66
67}
68
69
70attributes #0 = { nounwind readnone "target-features"="-crbits" }
71attributes #1 = { nounwind readnone }
72
73