xref: /llvm-project/llvm/test/CodeGen/PowerPC/ppc-32bit-build-vector.ll (revision 9540a7ae82dfabe551bfef94fc9f29ebebf841da)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc -mcpu=pwr8 < %s |\
3; RUN: FileCheck %s --check-prefix=32BIT
4
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64 -mcpu=pwr8 < %s |\
6; RUN: FileCheck %s --check-prefix=64BIT
7
8define dso_local fastcc void @BuildVectorICE() unnamed_addr {
9; 32BIT-LABEL: BuildVectorICE:
10; 32BIT:       # %bb.0: # %entry
11; 32BIT-NEXT:    stwu 1, -48(1)
12; 32BIT-NEXT:    .cfi_def_cfa_offset 48
13; 32BIT-NEXT:    lxvw4x 34, 0, 3
14; 32BIT-NEXT:    li 5, 0
15; 32BIT-NEXT:    addi 3, 1, 16
16; 32BIT-NEXT:    addi 4, 1, 32
17; 32BIT-NEXT:    xxspltw 35, 34, 1
18; 32BIT-NEXT:    .p2align 5
19; 32BIT-NEXT:  .LBB0_1: # %while.body
20; 32BIT-NEXT:    #
21; 32BIT-NEXT:    stw 5, 16(1)
22; 32BIT-NEXT:    lxvw4x 36, 0, 3
23; 32BIT-NEXT:    vadduwm 4, 2, 4
24; 32BIT-NEXT:    vadduwm 4, 4, 3
25; 32BIT-NEXT:    stxvw4x 36, 0, 4
26; 32BIT-NEXT:    lwz 5, 32(1)
27; 32BIT-NEXT:    b .LBB0_1
28;
29; 64BIT-LABEL: BuildVectorICE:
30; 64BIT:       # %bb.0: # %entry
31; 64BIT-NEXT:    lxvw4x 34, 0, 3
32; 64BIT-NEXT:    li 3, 0
33; 64BIT-NEXT:    xxspltw 35, 34, 1
34; 64BIT-NEXT:    .p2align 5
35; 64BIT-NEXT:  .LBB0_1: # %while.body
36; 64BIT-NEXT:    #
37; 64BIT-NEXT:    sldi 3, 3, 32
38; 64BIT-NEXT:    mtvsrd 36, 3
39; 64BIT-NEXT:    vadduwm 4, 2, 4
40; 64BIT-NEXT:    vadduwm 4, 4, 3
41; 64BIT-NEXT:    xxsldwi 0, 36, 36, 3
42; 64BIT-NEXT:    mffprwz 3, 0
43; 64BIT-NEXT:    b .LBB0_1
44    entry:
45     br label %while.body
46     while.body:                                       ; preds = %while.body, %entry
47     %newelement = phi i32 [ 0, %entry ], [ %5, %while.body ]
48     %0 = insertelement <4 x i32> <i32 undef, i32 0, i32 0, i32 0>, i32 %newelement, i32 0
49     %1 = load <4 x i32>, ptr undef, align 1
50     %2 = add <4 x i32> %1, %0
51     %3 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
52     %4 = add <4 x i32> %2, %3
53     %5 = extractelement <4 x i32> %4, i32 0
54     br label %while.body
55}
56