xref: /llvm-project/llvm/test/CodeGen/PowerPC/patchable-function-entry.ll (revision 43213002b99e32d618f2afbbaaeb2ff8dfc84e33)
1; RUN: llc -mtriple=powerpc %s -o - | FileCheck %s --check-prefixes=CHECK,PPC32
2; RUN: llc -mtriple=powerpc64 %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
3
4@a = global i32 0, align 4
5
6define void @f0() {
7; CHECK-LABEL: f0:
8; CHECK-NOT:   nop
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    blr
11; CHECK-NOT:   .section    __patchable_function_entries
12  ret void
13}
14
15define void @f1() "patchable-function-entry"="0" {
16; CHECK-LABEL: f1:
17; CHECK-NOT:   nop
18; CHECK:       # %bb.0:
19; CHECK-NEXT:    blr
20; CHECK-NOT:   .section    __patchable_function_entries
21  ret void
22}
23
24define void @f2() "patchable-function-entry"="1" {
25; CHECK-LABEL: f2:
26; CHECK-LABEL-NEXT:  .Lfunc_begin2:
27; CHECK:       # %bb.0:
28; CHECK-NEXT:    nop
29; CHECK-NEXT:    blr
30; CHECK:       .section    __patchable_function_entries
31; PPC32:       .p2align    2, 0x0
32; PPC64:       .p2align    3, 0x0
33; PPC32-NEXT:  .long   .Lfunc_begin2
34; PPC64-NEXT:  .quad   .Lfunc_begin2
35  ret void
36}
37
38define i32 @f3() "patchable-function-entry"="1" "patchable-function-prefix"="2" {
39; CHECK-LABEL: .Ltmp0:
40; CHECK-COUNT-2: nop
41; CHECK-LABEL: f3:
42; CHECK:       # %bb.0:
43; CHECK-NEXT:    nop
44; PPC32:         lis 3, a@ha
45; PPC32-NEXT:    lwz 3, a@l(3)
46; PPC64:         addis 3, 2, .LC0@toc@ha
47; PPC64-NEXT:    ld 3, .LC0@toc@l(3)
48; PPC64-NEXT:    lwz 3, 0(3)
49; CHECK:         blr
50; CHECK:       .section    __patchable_function_entries
51; PPC32:       .p2align    2, 0x0
52; PPC64:       .p2align    3, 0x0
53; PPC32-NEXT:  .long   .Ltmp0
54; PPC64-NEXT:  .quad   .Ltmp0
55entry:
56  %0 = load i32, ptr @a, align 4
57  ret i32 %0
58}
59