xref: /llvm-project/llvm/test/CodeGen/PowerPC/p9-vbpermd.ll (revision 5403c59c608c08c8ecd4303763f08eb046eb5e4d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
3; RUN:  -mcpu=pwr9 < %s | FileCheck %s
4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
5; RUN:  -mcpu=pwr9 < %s | FileCheck %s
6
7@vull = common global <2 x i64> zeroinitializer, align 16
8@vuc = common global <16 x i8> zeroinitializer, align 16
9@res_vull = common global <2 x i64> zeroinitializer, align 16
10
11define void @test1() {
12; CHECK-LABEL: test1:
13; CHECK:       # %bb.0: # %entry
14; CHECK-NEXT:    addis 3, 2, .LC0@toc@ha
15; CHECK-NEXT:    ld 3, .LC0@toc@l(3)
16; CHECK-NEXT:    lxv 34, 0(3)
17; CHECK-NEXT:    addis 3, 2, .LC1@toc@ha
18; CHECK-NEXT:    ld 3, .LC1@toc@l(3)
19; CHECK-NEXT:    lxv 35, 0(3)
20; CHECK-NEXT:    addis 3, 2, .LC2@toc@ha
21; CHECK-NEXT:    ld 3, .LC2@toc@l(3)
22; CHECK-NEXT:    vbpermd 2, 2, 3
23; CHECK-NEXT:    stxv 34, 0(3)
24; CHECK-NEXT:    blr
25entry:
26  %0 = load <2 x i64>, ptr @vull, align 16
27  %1 = load <16 x i8>, ptr @vuc, align 16
28  %2 = call <2 x i64> @llvm.ppc.altivec.vbpermd(<2 x i64> %0, <16 x i8> %1)
29  store <2 x i64> %2, ptr @res_vull, align 16
30  ret void
31}
32declare <2 x i64> @llvm.ppc.altivec.vbpermd(<2 x i64>, <16 x i8>)
33