xref: /llvm-project/llvm/test/CodeGen/PowerPC/optcmp.ll (revision 8e901c255df45e38cb1d69a576804029e20868bf)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -ppc-gpr-icmps=all -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -mattr=-crbits -disable-ppc-cmp-opt=0 | FileCheck %s
3; RUN: llc -ppc-gpr-icmps=all -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -mattr=-crbits -disable-ppc-cmp-opt=0 -mattr=-isel | FileCheck --check-prefix=CHECK-NO-ISEL %s
4
5target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
6target triple = "powerpc64-unknown-linux-gnu"
7
8define signext i32 @foo(i32 signext %a, i32 signext %b, ptr nocapture %c) #0 {
9; CHECK-LABEL: foo:
10; CHECK:       # %bb.0: # %entry
11; CHECK-NEXT:    cmpw 3, 4
12; CHECK-NEXT:    sub 6, 3, 4
13; CHECK-NEXT:    iselgt 3, 3, 4
14; CHECK-NEXT:    stw 6, 0(5)
15; CHECK-NEXT:    blr
16;
17; CHECK-NO-ISEL-LABEL: foo:
18; CHECK-NO-ISEL:       # %bb.0: # %entry
19; CHECK-NO-ISEL-NEXT:    sub 6, 3, 4
20; CHECK-NO-ISEL-NEXT:    cmpw 3, 4
21; CHECK-NO-ISEL-NEXT:    stw 6, 0(5)
22; CHECK-NO-ISEL-NEXT:    bgtlr 0
23; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
24; CHECK-NO-ISEL-NEXT:    mr 3, 4
25; CHECK-NO-ISEL-NEXT:    blr
26entry:
27  %sub = sub nsw i32 %a, %b
28  store i32 %sub, ptr %c, align 4
29  %cmp = icmp sgt i32 %a, %b
30  %cond = select i1 %cmp, i32 %a, i32 %b
31  ret i32 %cond
32}
33
34define signext i32 @foo2(i32 signext %a, i32 signext %b, ptr nocapture %c) #0 {
35; CHECK-LABEL: foo2:
36; CHECK:       # %bb.0: # %entry
37; CHECK-NEXT:    slw 4, 3, 4
38; CHECK-NEXT:    li 6, 0
39; CHECK-NEXT:    li 3, 1
40; CHECK-NEXT:    cmpwi 4, 0
41; CHECK-NEXT:    stw 4, 0(5)
42; CHECK-NEXT:    iselgt 3, 3, 6
43; CHECK-NEXT:    blr
44;
45; CHECK-NO-ISEL-LABEL: foo2:
46; CHECK-NO-ISEL:       # %bb.0: # %entry
47; CHECK-NO-ISEL-NEXT:    mr 6, 3
48; CHECK-NO-ISEL-NEXT:    li 3, 1
49; CHECK-NO-ISEL-NEXT:    slw 4, 6, 4
50; CHECK-NO-ISEL-NEXT:    cmpwi 4, 0
51; CHECK-NO-ISEL-NEXT:    stw 4, 0(5)
52; CHECK-NO-ISEL-NEXT:    bgtlr 0
53; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
54; CHECK-NO-ISEL-NEXT:    li 3, 0
55; CHECK-NO-ISEL-NEXT:    blr
56entry:
57  %shl = shl i32 %a, %b
58  store i32 %shl, ptr %c, align 4
59  %cmp = icmp sgt i32 %shl, 0
60  %conv = zext i1 %cmp to i32
61  ret i32 %conv
62}
63
64define i64 @fool(i64 %a, i64 %b, ptr nocapture %c) #0 {
65; CHECK-LABEL: fool:
66; CHECK:       # %bb.0: # %entry
67; CHECK-NEXT:    sub. 6, 3, 4
68; CHECK-NEXT:    iselgt 3, 3, 4
69; CHECK-NEXT:    std 6, 0(5)
70; CHECK-NEXT:    blr
71;
72; CHECK-NO-ISEL-LABEL: fool:
73; CHECK-NO-ISEL:       # %bb.0: # %entry
74; CHECK-NO-ISEL-NEXT:    sub. 6, 3, 4
75; CHECK-NO-ISEL-NEXT:    std 6, 0(5)
76; CHECK-NO-ISEL-NEXT:    bgtlr 0
77; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
78; CHECK-NO-ISEL-NEXT:    mr 3, 4
79; CHECK-NO-ISEL-NEXT:    blr
80entry:
81  %sub = sub nsw i64 %a, %b
82  store i64 %sub, ptr %c, align 8
83  %cmp = icmp sgt i64 %a, %b
84  %cond = select i1 %cmp, i64 %a, i64 %b
85  ret i64 %cond
86}
87
88define i64 @foolb(i64 %a, i64 %b, ptr nocapture %c) #0 {
89; CHECK-LABEL: foolb:
90; CHECK:       # %bb.0: # %entry
91; CHECK-NEXT:    sub. 6, 3, 4
92; CHECK-NEXT:    iselgt 3, 4, 3
93; CHECK-NEXT:    std 6, 0(5)
94; CHECK-NEXT:    blr
95;
96; CHECK-NO-ISEL-LABEL: foolb:
97; CHECK-NO-ISEL:       # %bb.0: # %entry
98; CHECK-NO-ISEL-NEXT:    sub. 6, 3, 4
99; CHECK-NO-ISEL-NEXT:    std 6, 0(5)
100; CHECK-NO-ISEL-NEXT:    blelr 0
101; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
102; CHECK-NO-ISEL-NEXT:    mr 3, 4
103; CHECK-NO-ISEL-NEXT:    blr
104entry:
105  %sub = sub nsw i64 %a, %b
106  store i64 %sub, ptr %c, align 8
107  %cmp = icmp sle i64 %a, %b
108  %cond = select i1 %cmp, i64 %a, i64 %b
109  ret i64 %cond
110}
111
112define i64 @foolc(i64 %a, i64 %b, ptr nocapture %c) #0 {
113; CHECK-LABEL: foolc:
114; CHECK:       # %bb.0: # %entry
115; CHECK-NEXT:    sub. 6, 4, 3
116; CHECK-NEXT:    isellt 3, 3, 4
117; CHECK-NEXT:    std 6, 0(5)
118; CHECK-NEXT:    blr
119;
120; CHECK-NO-ISEL-LABEL: foolc:
121; CHECK-NO-ISEL:       # %bb.0: # %entry
122; CHECK-NO-ISEL-NEXT:    sub. 6, 4, 3
123; CHECK-NO-ISEL-NEXT:    std 6, 0(5)
124; CHECK-NO-ISEL-NEXT:    bltlr 0
125; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
126; CHECK-NO-ISEL-NEXT:    mr 3, 4
127; CHECK-NO-ISEL-NEXT:    blr
128entry:
129  %sub = sub nsw i64 %b, %a
130  store i64 %sub, ptr %c, align 8
131  %cmp = icmp sgt i64 %a, %b
132  %cond = select i1 %cmp, i64 %a, i64 %b
133  ret i64 %cond
134}
135
136define i64 @foold(i64 %a, i64 %b, ptr nocapture %c) #0 {
137; CHECK-LABEL: foold:
138; CHECK:       # %bb.0: # %entry
139; CHECK-NEXT:    sub. 6, 4, 3
140; CHECK-NEXT:    iselgt 3, 3, 4
141; CHECK-NEXT:    std 6, 0(5)
142; CHECK-NEXT:    blr
143;
144; CHECK-NO-ISEL-LABEL: foold:
145; CHECK-NO-ISEL:       # %bb.0: # %entry
146; CHECK-NO-ISEL-NEXT:    sub. 6, 4, 3
147; CHECK-NO-ISEL-NEXT:    std 6, 0(5)
148; CHECK-NO-ISEL-NEXT:    bgtlr 0
149; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
150; CHECK-NO-ISEL-NEXT:    mr 3, 4
151; CHECK-NO-ISEL-NEXT:    blr
152entry:
153  %sub = sub nsw i64 %b, %a
154  store i64 %sub, ptr %c, align 8
155  %cmp = icmp slt i64 %a, %b
156  %cond = select i1 %cmp, i64 %a, i64 %b
157  ret i64 %cond
158}
159
160define i64 @foold2(i64 %a, i64 %b, ptr nocapture %c) #0 {
161; CHECK-LABEL: foold2:
162; CHECK:       # %bb.0: # %entry
163; CHECK-NEXT:    sub. 6, 3, 4
164; CHECK-NEXT:    isellt 3, 3, 4
165; CHECK-NEXT:    std 6, 0(5)
166; CHECK-NEXT:    blr
167;
168; CHECK-NO-ISEL-LABEL: foold2:
169; CHECK-NO-ISEL:       # %bb.0: # %entry
170; CHECK-NO-ISEL-NEXT:    sub. 6, 3, 4
171; CHECK-NO-ISEL-NEXT:    std 6, 0(5)
172; CHECK-NO-ISEL-NEXT:    bltlr 0
173; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
174; CHECK-NO-ISEL-NEXT:    mr 3, 4
175; CHECK-NO-ISEL-NEXT:    blr
176entry:
177  %sub = sub nsw i64 %a, %b
178  store i64 %sub, ptr %c, align 8
179  %cmp = icmp slt i64 %a, %b
180  %cond = select i1 %cmp, i64 %a, i64 %b
181  ret i64 %cond
182}
183
184define i64 @foo2l(i64 %a, i64 %b, ptr nocapture %c) #0 {
185; CHECK-LABEL: foo2l:
186; CHECK:       # %bb.0: # %entry
187; CHECK-NEXT:    sld 4, 3, 4
188; CHECK-NEXT:    addi 3, 4, -1
189; CHECK-NEXT:    std 4, 0(5)
190; CHECK-NEXT:    nor 3, 3, 4
191; CHECK-NEXT:    rldicl 3, 3, 1, 63
192; CHECK-NEXT:    blr
193;
194; CHECK-NO-ISEL-LABEL: foo2l:
195; CHECK-NO-ISEL:       # %bb.0: # %entry
196; CHECK-NO-ISEL-NEXT:    sld 4, 3, 4
197; CHECK-NO-ISEL-NEXT:    addi 3, 4, -1
198; CHECK-NO-ISEL-NEXT:    std 4, 0(5)
199; CHECK-NO-ISEL-NEXT:    nor 3, 3, 4
200; CHECK-NO-ISEL-NEXT:    rldicl 3, 3, 1, 63
201; CHECK-NO-ISEL-NEXT:    blr
202entry:
203  %shl = shl i64 %a, %b
204  store i64 %shl, ptr %c, align 8
205  %cmp = icmp sgt i64 %shl, 0
206  %conv1 = zext i1 %cmp to i64
207  ret i64 %conv1
208}
209
210define double @food(double %a, double %b, ptr nocapture %c) #0 {
211; CHECK-LABEL: food:
212; CHECK:       # %bb.0: # %entry
213; CHECK-NEXT:    fsub 0, 1, 2
214; CHECK-NEXT:    fcmpu 0, 1, 2
215; CHECK-NEXT:    stfd 0, 0(5)
216; CHECK-NEXT:    bgtlr 0
217; CHECK-NEXT:  # %bb.1: # %entry
218; CHECK-NEXT:    fmr 1, 2
219; CHECK-NEXT:    blr
220;
221; CHECK-NO-ISEL-LABEL: food:
222; CHECK-NO-ISEL:       # %bb.0: # %entry
223; CHECK-NO-ISEL-NEXT:    fsub 0, 1, 2
224; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
225; CHECK-NO-ISEL-NEXT:    stfd 0, 0(5)
226; CHECK-NO-ISEL-NEXT:    bgtlr 0
227; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
228; CHECK-NO-ISEL-NEXT:    fmr 1, 2
229; CHECK-NO-ISEL-NEXT:    blr
230entry:
231  %sub = fsub double %a, %b
232  store double %sub, ptr %c, align 8
233  %cmp = fcmp ogt double %a, %b
234  %cond = select i1 %cmp, double %a, double %b
235  ret double %cond
236}
237
238define float @foof(float %a, float %b, ptr nocapture %c) #0 {
239; CHECK-LABEL: foof:
240; CHECK:       # %bb.0: # %entry
241; CHECK-NEXT:    fsubs 0, 1, 2
242; CHECK-NEXT:    fcmpu 0, 1, 2
243; CHECK-NEXT:    stfs 0, 0(5)
244; CHECK-NEXT:    bgtlr 0
245; CHECK-NEXT:  # %bb.1: # %entry
246; CHECK-NEXT:    fmr 1, 2
247; CHECK-NEXT:    blr
248;
249; CHECK-NO-ISEL-LABEL: foof:
250; CHECK-NO-ISEL:       # %bb.0: # %entry
251; CHECK-NO-ISEL-NEXT:    fsubs 0, 1, 2
252; CHECK-NO-ISEL-NEXT:    fcmpu 0, 1, 2
253; CHECK-NO-ISEL-NEXT:    stfs 0, 0(5)
254; CHECK-NO-ISEL-NEXT:    bgtlr 0
255; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
256; CHECK-NO-ISEL-NEXT:    fmr 1, 2
257; CHECK-NO-ISEL-NEXT:    blr
258entry:
259  %sub = fsub float %a, %b
260  store float %sub, ptr %c, align 4
261  %cmp = fcmp ogt float %a, %b
262  %cond = select i1 %cmp, float %a, float %b
263  ret float %cond
264}
265
266declare i64 @llvm.ctpop.i64(i64);
267
268define signext i64 @fooct(i64 signext %a, i64 signext %b, ptr nocapture %c) #0 {
269; CHECK-LABEL: fooct:
270; CHECK:       # %bb.0: # %entry
271; CHECK-NEXT:    lis 6, 21845
272; CHECK-NEXT:    sub 7, 3, 4
273; CHECK-NEXT:    ori 6, 6, 21845
274; CHECK-NEXT:    lis 9, 13107
275; CHECK-NEXT:    rotldi 8, 7, 63
276; CHECK-NEXT:    rldimi 6, 6, 32, 0
277; CHECK-NEXT:    and 6, 8, 6
278; CHECK-NEXT:    ori 8, 9, 13107
279; CHECK-NEXT:    sub 6, 7, 6
280; CHECK-NEXT:    rldimi 8, 8, 32, 0
281; CHECK-NEXT:    lis 9, 257
282; CHECK-NEXT:    rotldi 7, 6, 62
283; CHECK-NEXT:    and 6, 6, 8
284; CHECK-NEXT:    ori 9, 9, 257
285; CHECK-NEXT:    and 7, 7, 8
286; CHECK-NEXT:    lis 8, 3855
287; CHECK-NEXT:    add 6, 6, 7
288; CHECK-NEXT:    ori 7, 8, 3855
289; CHECK-NEXT:    rldicl 8, 6, 60, 4
290; CHECK-NEXT:    rldimi 7, 7, 32, 0
291; CHECK-NEXT:    rldimi 9, 9, 32, 0
292; CHECK-NEXT:    add 6, 6, 8
293; CHECK-NEXT:    and 6, 6, 7
294; CHECK-NEXT:    mulld 6, 6, 9
295; CHECK-NEXT:    rldicl. 6, 6, 8, 56
296; CHECK-NEXT:    iselgt 3, 3, 4
297; CHECK-NEXT:    std 6, 0(5)
298; CHECK-NEXT:    blr
299;
300; CHECK-NO-ISEL-LABEL: fooct:
301; CHECK-NO-ISEL:       # %bb.0: # %entry
302; CHECK-NO-ISEL-NEXT:    lis 6, 21845
303; CHECK-NO-ISEL-NEXT:    sub 7, 3, 4
304; CHECK-NO-ISEL-NEXT:    ori 6, 6, 21845
305; CHECK-NO-ISEL-NEXT:    lis 9, 13107
306; CHECK-NO-ISEL-NEXT:    rotldi 8, 7, 63
307; CHECK-NO-ISEL-NEXT:    rldimi 6, 6, 32, 0
308; CHECK-NO-ISEL-NEXT:    and 6, 8, 6
309; CHECK-NO-ISEL-NEXT:    ori 8, 9, 13107
310; CHECK-NO-ISEL-NEXT:    sub 6, 7, 6
311; CHECK-NO-ISEL-NEXT:    rldimi 8, 8, 32, 0
312; CHECK-NO-ISEL-NEXT:    lis 9, 257
313; CHECK-NO-ISEL-NEXT:    rotldi 7, 6, 62
314; CHECK-NO-ISEL-NEXT:    and 6, 6, 8
315; CHECK-NO-ISEL-NEXT:    ori 9, 9, 257
316; CHECK-NO-ISEL-NEXT:    and 7, 7, 8
317; CHECK-NO-ISEL-NEXT:    lis 8, 3855
318; CHECK-NO-ISEL-NEXT:    add 6, 6, 7
319; CHECK-NO-ISEL-NEXT:    ori 7, 8, 3855
320; CHECK-NO-ISEL-NEXT:    rldicl 8, 6, 60, 4
321; CHECK-NO-ISEL-NEXT:    rldimi 7, 7, 32, 0
322; CHECK-NO-ISEL-NEXT:    rldimi 9, 9, 32, 0
323; CHECK-NO-ISEL-NEXT:    add 6, 6, 8
324; CHECK-NO-ISEL-NEXT:    and 6, 6, 7
325; CHECK-NO-ISEL-NEXT:    mulld 6, 6, 9
326; CHECK-NO-ISEL-NEXT:    rldicl. 6, 6, 8, 56
327; CHECK-NO-ISEL-NEXT:    std 6, 0(5)
328; CHECK-NO-ISEL-NEXT:    bgtlr 0
329; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
330; CHECK-NO-ISEL-NEXT:    mr 3, 4
331; CHECK-NO-ISEL-NEXT:    blr
332entry:
333  %sub = sub nsw i64 %a, %b
334  %subc = call i64 @llvm.ctpop.i64(i64 %sub)
335  store i64 %subc, ptr %c, align 4
336  %cmp = icmp sgt i64 %subc, 0
337  %cond = select i1 %cmp, i64 %a, i64 %b
338  ret i64 %cond
339}
340