xref: /llvm-project/llvm/test/CodeGen/PowerPC/memcpy-vec.ll (revision 427fb35192f1f7bb694a5910b05abc5925a798b2)
1; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck  %s -check-prefix=PWR7
2; RUN: llc -verify-machineinstrs -mcpu=pwr8 < %s | FileCheck  %s -check-prefix=PWR8
3target datalayout = "E-m:e-i64:64-n32:64"
4target triple = "powerpc64-unknown-linux-gnu"
5
6; Function Attrs: nounwind
7define void @foo1(ptr nocapture %x, ptr nocapture readonly %y) #0 {
8entry:
9  tail call void @llvm.memcpy.p0.p0.i64(ptr align 8 %x, ptr align 8 %y, i64 32, i1 false)
10  ret void
11
12; PWR7-LABEL: @foo1
13; PWR7-NOT: bl memcpy
14; PWR7-DAG: li [[OFFSET:[0-9]+]], 16
15; PWR7-DAG: lxvd2x [[TMP0:[0-9]+]], 4, [[OFFSET]]
16; PWR7-DAG: stxvd2x [[TMP0]], 3, [[OFFSET]]
17; PWR7-DAG: lxvd2x [[TMP1:[0-9]+]], 0, 4
18; PWR7-DAG: stxvd2x [[TMP1]], 0, 3
19; PWR7: blr
20
21; PWR8-LABEL: @foo1
22; PWR8: lxvw4x
23; PWR8: stxvw4x
24; PWR8: blr
25}
26
27; Function Attrs: nounwind
28declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture readonly, i64, i1) #0
29
30; Function Attrs: nounwind
31define void @foo2(ptr nocapture %x, ptr nocapture readonly %y) #0 {
32entry:
33  tail call void @llvm.memcpy.p0.p0.i64(ptr align 8 %x, ptr align 8 %y, i64 128, i1 false)
34  ret void
35
36; PWR7-LABEL: @foo2
37; PWR7: bl memcpy
38; PWR7: blr
39
40; PWR8-LABEL: @foo2
41; PWR8: lxvw4x
42; PWR8: stxvw4x
43; PWR8: blr
44}
45
46; Function Attrs: nounwind
47define void @bar1(ptr nocapture %x) #0 {
48entry:
49  tail call void @llvm.memset.p0.i64(ptr align 8 %x, i8 0, i64 128, i1 false)
50  ret void
51
52; PWR7-LABEL: @bar1
53; PWR7-NOT: bl memset
54; PWR7: stxvw4x
55; PWR7: blr
56
57; PWR8-LABEL: @bar1
58; PWR8-NOT: bl memset
59; PWR8: stxvw4x
60; PWR8: blr
61}
62
63; Function Attrs: nounwind
64define void @bar2(ptr nocapture %x) #0 {
65entry:
66  tail call void @llvm.memset.p0.i64(ptr align 32 %x, i8 0, i64 128, i1 false)
67  ret void
68
69; PWR7-LABEL: @bar2
70; PWR7-NOT: bl memset
71; PWR7: stxvw4x
72; PWR7: blr
73
74; PWR8-LABEL: @bar2
75; PWR8-NOT: bl memset
76; PWR8: stxvw4x
77; PWR8: blr
78}
79
80; Function Attrs: nounwind
81declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) #0
82
83attributes #0 = { nounwind }
84
85