xref: /llvm-project/llvm/test/CodeGen/PowerPC/machine-cse-rm-pre.mir (revision 6c143a86cddbc6d0431dd643bfc7d4f017042512)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc %s -o - -mtriple=powerpc-unknown-unknown -run-pass=machine-cse -verify-machineinstrs | FileCheck %s
3# RUN: llc %s -o - -mtriple=powerpc-unknown-unknown -passes=machine-cse | FileCheck %s
4--- |
5  define void @can_pre() {
6  entry:
7    br label %for.body
8
9  for.body:
10    br i1 undef, label %if.then, label %if.else
11
12  if.then:
13    br label %if.end
14
15  if.else:
16    br label %if.end
17
18  if.end:
19    br label %for.body
20  }
21
22  define void @cannot_pre() {
23  entry:
24    br label %for.body
25
26  for.body:
27    br i1 undef, label %if.then, label %if.else
28
29  if.then:
30    br label %if.end
31
32  if.else:
33    br label %if.end
34
35  if.end:
36    br label %for.body
37  }
38...
39---
40name: can_pre
41registers:
42  - { id: 0, class: f8rc, preferred-register: '' }
43  - { id: 1, class: f8rc, preferred-register: '' }
44  - { id: 2, class: gprc, preferred-register: '' }
45  - { id: 3, class: gprc, preferred-register: '' }
46  - { id: 4, class: f8rc, preferred-register: '' }
47  - { id: 5, class: f8rc, preferred-register: '' }
48liveins:
49  - { reg: '$r1', virtual-reg: '%2' }
50  - { reg: '$r2', virtual-reg: '%3' }
51  - { reg: '$f1', virtual-reg: '%4' }
52  - { reg: '$f2', virtual-reg: '%5' }
53body:             |
54  ; CHECK-LABEL: name: can_pre
55  ; CHECK: bb.0.for.body:
56  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
57  ; CHECK-NEXT:   liveins: $r1, $r2, $f1, $f2
58  ; CHECK-NEXT: {{  $}}
59  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:f8rc = COPY $f2
60  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:f8rc = COPY $f1
61  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gprc = COPY $r2
62  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:gprc = COPY $r1
63  ; CHECK-NEXT:   $cr0 = CMPLWI [[COPY3]], 0
64  ; CHECK-NEXT:   %6:f8rc = nofpexcept FDIV [[COPY1]], [[COPY]], implicit $rm
65  ; CHECK-NEXT:   BCC 44, $cr0, %bb.1
66  ; CHECK-NEXT:   B %bb.2
67  ; CHECK-NEXT: {{  $}}
68  ; CHECK-NEXT: bb.1.if.then:
69  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
70  ; CHECK-NEXT: {{  $}}
71  ; CHECK-NEXT:   B %bb.3
72  ; CHECK-NEXT: {{  $}}
73  ; CHECK-NEXT: bb.2.if.else:
74  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
75  ; CHECK-NEXT: {{  $}}
76  ; CHECK-NEXT: bb.3.if.end:
77  ; CHECK-NEXT:   BLR implicit $lr, implicit $rm
78  bb.0.for.body:
79    successors: %bb.1(0x40000000), %bb.2(0x40000000)
80    liveins: $r1, $r2, $f1, $f2
81
82    %5:f8rc = COPY $f2
83    %4:f8rc = COPY $f1
84    %3:gprc = COPY $r2
85    %2:gprc = COPY $r1
86    $cr0 = CMPLWI %2, 0
87    BCC 44, $cr0, %bb.1
88    B %bb.2
89
90  bb.1.if.then:
91    successors: %bb.3(0x80000000)
92
93    %0:f8rc = nofpexcept FDIV %4, %5, implicit $rm
94    B %bb.3
95
96  bb.2.if.else:
97    successors: %bb.3(0x80000000)
98
99    %1:f8rc = nofpexcept FDIV %4, %5, implicit $rm
100
101  bb.3.if.end:
102    BLR implicit $lr, implicit $rm
103...
104---
105name: cannot_pre
106registers:
107  - { id: 0, class: f8rc, preferred-register: '' }
108  - { id: 1, class: f8rc, preferred-register: '' }
109  - { id: 2, class: gprc, preferred-register: '' }
110  - { id: 3, class: gprc, preferred-register: '' }
111  - { id: 4, class: f8rc, preferred-register: '' }
112  - { id: 5, class: f8rc, preferred-register: '' }
113  - { id: 6, class: f8rc, preferred-register: '' }
114liveins:
115  - { reg: '$r1', virtual-reg: '%2' }
116  - { reg: '$r2', virtual-reg: '%3' }
117  - { reg: '$f1', virtual-reg: '%4' }
118  - { reg: '$f2', virtual-reg: '%5' }
119body:             |
120  ; CHECK-LABEL: name: cannot_pre
121  ; CHECK: bb.0.for.body:
122  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
123  ; CHECK-NEXT:   liveins: $r1, $r2, $f1, $f2
124  ; CHECK-NEXT: {{  $}}
125  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:f8rc = COPY $f2
126  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:f8rc = COPY $f1
127  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gprc = COPY $r2
128  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:gprc = COPY $r1
129  ; CHECK-NEXT:   $cr0 = CMPLWI [[COPY3]], 0
130  ; CHECK-NEXT:   BCC 44, $cr0, %bb.1
131  ; CHECK-NEXT:   B %bb.2
132  ; CHECK-NEXT: {{  $}}
133  ; CHECK-NEXT: bb.1.if.then:
134  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
135  ; CHECK-NEXT: {{  $}}
136  ; CHECK-NEXT:   [[SETRND:%[0-9]+]]:f8rc = SETRND [[COPY2]], implicit-def $rm, implicit $rm
137  ; CHECK-NEXT:   %0:f8rc = nofpexcept FDIV [[COPY1]], [[COPY]], implicit $rm
138  ; CHECK-NEXT:   B %bb.3
139  ; CHECK-NEXT: {{  $}}
140  ; CHECK-NEXT: bb.2.if.else:
141  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
142  ; CHECK-NEXT: {{  $}}
143  ; CHECK-NEXT:   %1:f8rc = nofpexcept FDIV [[COPY1]], [[COPY]], implicit $rm
144  ; CHECK-NEXT: {{  $}}
145  ; CHECK-NEXT: bb.3.if.end:
146  ; CHECK-NEXT:   BLR implicit $lr, implicit $rm
147  bb.0.for.body:
148    successors: %bb.1(0x40000000), %bb.2(0x40000000)
149    liveins: $r1, $r2, $f1, $f2
150
151    %5:f8rc = COPY $f2
152    %4:f8rc = COPY $f1
153    %3:gprc = COPY $r2
154    %2:gprc = COPY $r1
155    $cr0 = CMPLWI %2, 0
156    BCC 44, $cr0, %bb.1
157    B %bb.2
158
159  bb.1.if.then:
160    successors: %bb.3(0x80000000)
161
162    %6:f8rc = SETRND %3, implicit-def $rm, implicit $rm
163    %0:f8rc = nofpexcept FDIV %4, %5, implicit $rm
164    B %bb.3
165
166  bb.2.if.else:
167    successors: %bb.3(0x80000000)
168
169    %1:f8rc = nofpexcept FDIV %4, %5, implicit $rm
170
171  bb.3.if.end:
172    BLR implicit $lr, implicit $rm
173...
174