1; RUN: llc -verify-machineinstrs -O0 -mcpu=pwr8 \ 2; RUN: -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s 3 4; RUN: llc -verify-machineinstrs -O0 -mcpu=pwr9 \ 5; RUN: -mtriple=powerpc64le-unknown-unknown < %s \ 6; RUN: | FileCheck %s --check-prefix=CHECK-P9UP --implicit-check-not xxswapd 7 8; RUN: llc -verify-machineinstrs -O0 -mcpu=pwr9 -mattr=-power9-vector \ 9; RUN: -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s 10 11; RUN: llc -verify-machineinstrs -O0 -mcpu=pwr10 \ 12; RUN: -mtriple=powerpc64le-unknown-unknown < %s \ 13; RUN: | FileCheck %s --check-prefix=CHECK-P9UP 14 15; RUN: llc -verify-machineinstrs -O0 -mcpu=pwr10 \ 16; RUN: -mtriple=powerpc64-unknown-unknown < %s \ 17; RUN: | FileCheck %s --check-prefix=CHECK-P9UP 18 19; Function Attrs: nounwind 20define void @test() { 21entry: 22 %__a.addr.i = alloca i32, align 4 23 %__b.addr.i = alloca ptr, align 8 24 %i = alloca <4 x i32>, align 16 25 %j = alloca <4 x i32>, align 16 26 store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr %i, align 16 27 store i32 0, ptr %__a.addr.i, align 4 28 store ptr %i, ptr %__b.addr.i, align 8 29 %0 = load i32, ptr %__a.addr.i, align 4 30 %1 = load ptr, ptr %__b.addr.i, align 8 31 %2 = getelementptr i8, ptr %1, i32 %0 32 %3 = call <4 x i32> @llvm.ppc.vsx.lxvw4x(ptr %2) 33; CHECK: lwa [[REG0:[0-9]+]], 34; CHECK: lxvd2x [[REG1:[0-9]+]], {{[0-9]+}}, [[REG0]] 35; CHECK: xxswapd [[REG1]], [[REG1]] 36; CHECK-P9UP: lwa [[REG0:[0-9]+]], 37; CHECK-P9UP: lxvx [[REG1:[0-9]+]], {{[0-9]+}}, [[REG0]] 38 store <4 x i32> %3, ptr %j, align 16 39 ret void 40} 41 42; Function Attrs: nounwind readonly 43declare <4 x i32> @llvm.ppc.vsx.lxvw4x(ptr) 44