1; RUN: llc -mcpu=pwr7 -verify-machineinstrs \ 2; RUN: -mtriple=powerpc-unknown-aix < %s | FileCheck %s 3 4; RUN: llc -mcpu=pwr7 -verify-machineinstrs \ 5; RUN: -mtriple=powerpc64-unknown-aix < %s | FileCheck %s 6 7; RUN: llc -mcpu=pwr7 -verify-machineinstrs -no-integrated-as \ 8; RUN: -mtriple=powerpc64-unknown-aix < %s | FileCheck %s --check-prefix=NOIS 9 10 11; Function Attrs: noinline nounwind optnone uwtable 12define dso_local signext i32 @NoBarrier_CompareAndSwap(ptr %ptr, i32 signext %old_value, i32 signext %new_value) #0 { 13; CHECK-LABEL: NoBarrier_CompareAndSwap: 14; CHECK: #APP 15; CHECK-NEXT: L..tmp0: 16; CHECK-NEXT: lwarx 6, 0, 3 17; CHECK-NEXT: cmpw 4, 6 18; CHECK-NEXT: bne- 0, L..tmp1 19; CHECK-NEXT: stwcx. 5, 0, 3 20; CHECK-NEXT: bne- 0, L..tmp0 21; CHECK-NEXT: L..tmp1: 22 23; NOIS-LABEL: NoBarrier_CompareAndSwap: 24; NOIS: #APP 25; NOIS-NEXT: 1: lwarx 6, 0, 3 26; NOIS-NEXT: cmpw 4, 6 27; NOIS-NEXT: bne- 2f 28; NOIS-NEXT: stwcx. 5, 0, 3 29; NOIS-NEXT: bne- 1b 30; NOIS-NEXT: 2: 31 32entry: 33 %ptr.addr = alloca ptr, align 8 %old_value.addr = alloca i32, align 4 34 %new_value.addr = alloca i32, align 4 35 %result = alloca i32, align 4 36 store ptr %ptr, ptr %ptr.addr, align 8 37 store i32 %old_value, ptr %old_value.addr, align 4 38 store i32 %new_value, ptr %new_value.addr, align 4 39 %0 = load ptr, ptr %ptr.addr, align 8 40 %1 = load i32, ptr %old_value.addr, align 4 41 %2 = load i32, ptr %new_value.addr, align 4 42 %3 = call i32 asm sideeffect "1: lwarx $0, $4, $1 \0A\09 cmpw $2, $0 \0A\09 bne- 2f \0A\09 stwcx. $3, $4, $1 \0A\09 bne- 1b \0A\092: \0A\09", "=&b,b,b,b,i,~{cr0},~{ctr}"(ptr %0, i32 %1, i32 %2, i32 0) 43 store i32 %3, ptr %result, align 4 44 %4 = load i32, ptr %result, align 4 45 ret i32 %4 46} 47 48define dso_local signext i32 @NoBarrier_CompareAndSwapExtMne(ptr %ptr, i32 signext %old_value, i32 signext %new_value) #0 { 49; CHECK-LABEL: NoBarrier_CompareAndSwapExtMne: 50; CHECK: #APP 51; CHECK-NEXT: L..tmp2: 52; CHECK-NEXT: lwarx 6, 0, 3 53; CHECK-NEXT: cmpw 4, 6 54; CHECK-NEXT: bne- 0, L..tmp3 55; CHECK-NEXT: stwcx. 5, 0, 3 56; CHECK-NEXT: bne- 0, L..tmp2 57; CHECK-NEXT: L..tmp3: 58 59; NOIS-LABEL: NoBarrier_CompareAndSwapExtMne: 60; NOIS: #APP 61; NOIS-NEXT: 1: lwarx 6, 0, 3 62; NOIS-NEXT: cmpw 4, 6 63; NOIS-NEXT: bne- 2f 64; NOIS-NEXT: stwcx. 5, 0, 3 65; NOIS-NEXT: bne- 1b 66; NOIS-NEXT: 2: 67 68entry: 69 %ptr.addr = alloca ptr, align 8 %old_value.addr = alloca i32, align 4 70 %new_value.addr = alloca i32, align 4 71 %result = alloca i32, align 4 72 store ptr %ptr, ptr %ptr.addr, align 8 73 store i32 %old_value, ptr %old_value.addr, align 4 74 store i32 %new_value, ptr %new_value.addr, align 4 75 %0 = load ptr, ptr %ptr.addr, align 8 76 %1 = load i32, ptr %old_value.addr, align 4 77 %2 = load i32, ptr %new_value.addr, align 4 78 %3 = call i32 asm sideeffect "1: lwarx $0, $4, $1, 0 \0A\09 cmpw $2, $0 \0A\09 bne- 2f \0A\09 stwcx. $3, $4, $1 \0A\09 bne- 1b \0A\092: \0A\09", "=&b,b,b,b,i,~{cr0},~{ctr}"(ptr %0, i32 %1, i32 %2, i32 0) 79 store i32 %3, ptr %result, align 4 80 %4 = load i32, ptr %result, align 4 81 ret i32 %4 82} 83 84