1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -verify-machineinstrs | FileCheck %s 3; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -verify-machineinstrs -mattr=-isel | FileCheck --check-prefix=CHECK-NO-ISEL %s 4target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" 5target triple = "powerpc64-unknown-linux-gnu" 6 7define i32 @test(i32 %a, i32 %b, i32 %c, i32 %d) { 8; CHECK-LABEL: test: 9; CHECK: # %bb.0: # %entry 10; CHECK-NEXT: slwi 5, 6, 16 11; CHECK-NEXT: extsh 6, 6 12; CHECK-NEXT: cmpwi 5, -1 13; CHECK-NEXT: add 5, 6, 3 14; CHECK-NEXT: clrlwi 6, 6, 17 15; CHECK-NEXT: sub 6, 3, 6 16; CHECK-NEXT: sub 3, 4, 3 17; CHECK-NEXT: iselgt 5, 5, 6 18; CHECK-NEXT: extsh 5, 5 19; CHECK-NEXT: add 3, 3, 5 20; CHECK-NEXT: blr 21; 22; CHECK-NO-ISEL-LABEL: test: 23; CHECK-NO-ISEL: # %bb.0: # %entry 24; CHECK-NO-ISEL-NEXT: slwi 7, 6, 16 25; CHECK-NO-ISEL-NEXT: extsh 5, 6 26; CHECK-NO-ISEL-NEXT: cmpwi 7, -1 27; CHECK-NO-ISEL-NEXT: ble 0, .LBB0_2 28; CHECK-NO-ISEL-NEXT: # %bb.1: # %cond.false 29; CHECK-NO-ISEL-NEXT: add 5, 5, 3 30; CHECK-NO-ISEL-NEXT: b .LBB0_3 31; CHECK-NO-ISEL-NEXT: .LBB0_2: # %cond.true 32; CHECK-NO-ISEL-NEXT: clrlwi 5, 5, 17 33; CHECK-NO-ISEL-NEXT: sub 5, 3, 5 34; CHECK-NO-ISEL-NEXT: .LBB0_3: # %cond.end 35; CHECK-NO-ISEL-NEXT: extsh 5, 5 36; CHECK-NO-ISEL-NEXT: sub 3, 4, 3 37; CHECK-NO-ISEL-NEXT: add 3, 3, 5 38; CHECK-NO-ISEL-NEXT: blr 39entry: 40 %sext82 = shl i32 %d, 16 41 %conv29 = ashr exact i32 %sext82, 16 42 %cmp = icmp slt i32 %sext82, 0 43 br i1 %cmp, label %cond.true, label %cond.false 44 45cond.true: ; preds = %sw.epilog 46 %and33 = and i32 %conv29, 32767 47 %sub34 = sub nsw i32 %a, %and33 48 br label %cond.end 49 50cond.false: ; preds = %sw.epilog 51 %add37 = add nsw i32 %conv29, %a 52 br label %cond.end 53 54 55cond.end: ; preds = %cond.false, %cond.true 56 %cond = phi i32 [ %sub34, %cond.true ], [ %add37, %cond.false ] 57 %sext83 = shl i32 %cond, 16 58 %conv39 = ashr exact i32 %sext83, 16 59 %add41 = sub i32 %b, %a 60 %sub43 = add i32 %add41, %conv39 61 ret i32 %sub43 62} 63 64