xref: /llvm-project/llvm/test/CodeGen/PowerPC/hoist-logic.ll (revision a51712751c184ebe056718c938d2526693a31564)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -verify-machineinstrs -mcpu=ppc -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s
3; RUN: llc < %s -verify-machineinstrs -mcpu=ppc -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s
4
5; This is good - eliminate an op by hoisting logic.
6
7define i32 @lshr_or(i32 %x, i32 %y, i32 %z, ptr %p1, ptr %p2) {
8; CHECK-LABEL: lshr_or:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    or 3, 3, 4
11; CHECK-NEXT:    srw 3, 3, 5
12; CHECK-NEXT:    blr
13  %xt = lshr i32 %x, %z
14  %yt = lshr i32 %y, %z
15  %r = or i32 %xt, %yt
16  ret i32 %r
17}
18
19; This is questionable - hoisting doesn't eliminate anything.
20; It might result in an extra register move.
21
22define i32 @lshr_or_multiuse1(i32 %x, i32 %y, i32 %z, ptr %p1, ptr %p2) {
23; CHECK-LABEL: lshr_or_multiuse1:
24; CHECK:       # %bb.0:
25; CHECK-NEXT:    srw 7, 3, 5
26; CHECK-NEXT:    srw 3, 4, 5
27; CHECK-NEXT:    or 3, 7, 3
28; CHECK-NEXT:    stw 7, 0(6)
29; CHECK-NEXT:    blr
30  %xt = lshr i32 %x, %z
31  %yt = lshr i32 %y, %z
32  store i32 %xt, ptr %p1
33  %r = or i32 %xt, %yt
34  ret i32 %r
35}
36
37; This is questionable - hoisting doesn't eliminate anything.
38
39define i32 @lshr_multiuse2(i32 %x, i32 %y, i32 %z, ptr %p1, ptr %p2) {
40; CHECK-LABEL: lshr_multiuse2:
41; CHECK:       # %bb.0:
42; CHECK-NEXT:    srw 3, 3, 5
43; CHECK-NEXT:    srw 4, 4, 5
44; CHECK-NEXT:    or 3, 3, 4
45; CHECK-NEXT:    stw 4, 0(7)
46; CHECK-NEXT:    blr
47  %xt = lshr i32 %x, %z
48  %yt = lshr i32 %y, %z
49  store i32 %yt, ptr %p2
50  %r = or i32 %xt, %yt
51  ret i32 %r
52}
53
54; This is not profitable to hoist. We need an extra shift instruction.
55
56define i32 @lshr_multiuse3(i32 %x, i32 %y, i32 %z, ptr %p1, ptr %p2) {
57; CHECK-LABEL: lshr_multiuse3:
58; CHECK:       # %bb.0:
59; CHECK-NEXT:    srw 3, 3, 5
60; CHECK-NEXT:    srw 4, 4, 5
61; CHECK-NEXT:    stw 3, 0(6)
62; CHECK-NEXT:    or 3, 3, 4
63; CHECK-NEXT:    stw 4, 0(7)
64; CHECK-NEXT:    blr
65  %xt = lshr i32 %x, %z
66  %yt = lshr i32 %y, %z
67  store i32 %xt, ptr %p1
68  store i32 %yt, ptr %p2
69  %r = or i32 %xt, %yt
70  ret i32 %r
71}
72
73