1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=powerpc64le -mcpu=pwr9 < %s | FileCheck %s 3 4define float @frem32(float %a, float %b) { 5; CHECK-LABEL: frem32: 6; CHECK: # %bb.0: # %entry 7; CHECK-NEXT: mflr 0 8; CHECK-NEXT: stdu 1, -32(1) 9; CHECK-NEXT: std 0, 48(1) 10; CHECK-NEXT: .cfi_def_cfa_offset 32 11; CHECK-NEXT: .cfi_offset lr, 16 12; CHECK-NEXT: bl fmodf 13; CHECK-NEXT: nop 14; CHECK-NEXT: addi 1, 1, 32 15; CHECK-NEXT: ld 0, 16(1) 16; CHECK-NEXT: mtlr 0 17; CHECK-NEXT: blr 18entry: 19 %rem = frem fast float %a, %b 20 ret float %rem 21} 22 23define double @frem64(double %a, double %b) { 24; CHECK-LABEL: frem64: 25; CHECK: # %bb.0: # %entry 26; CHECK-NEXT: mflr 0 27; CHECK-NEXT: stdu 1, -32(1) 28; CHECK-NEXT: std 0, 48(1) 29; CHECK-NEXT: .cfi_def_cfa_offset 32 30; CHECK-NEXT: .cfi_offset lr, 16 31; CHECK-NEXT: bl fmod 32; CHECK-NEXT: nop 33; CHECK-NEXT: addi 1, 1, 32 34; CHECK-NEXT: ld 0, 16(1) 35; CHECK-NEXT: mtlr 0 36; CHECK-NEXT: blr 37entry: 38 %rem = frem fast double %a, %b 39 ret double %rem 40} 41 42define <4 x float> @frem4x32(<4 x float> %a, <4 x float> %b) { 43; CHECK-LABEL: frem4x32: 44; CHECK: # %bb.0: # %entry 45; CHECK-NEXT: mflr 0 46; CHECK-NEXT: stdu 1, -96(1) 47; CHECK-NEXT: std 0, 112(1) 48; CHECK-NEXT: .cfi_def_cfa_offset 96 49; CHECK-NEXT: .cfi_offset lr, 16 50; CHECK-NEXT: .cfi_offset v28, -64 51; CHECK-NEXT: .cfi_offset v29, -48 52; CHECK-NEXT: .cfi_offset v30, -32 53; CHECK-NEXT: .cfi_offset v31, -16 54; CHECK-NEXT: xxsldwi 0, 34, 34, 3 55; CHECK-NEXT: stxv 60, 32(1) # 16-byte Folded Spill 56; CHECK-NEXT: xscvspdpn 1, 0 57; CHECK-NEXT: xxsldwi 0, 35, 35, 3 58; CHECK-NEXT: stxv 61, 48(1) # 16-byte Folded Spill 59; CHECK-NEXT: stxv 62, 64(1) # 16-byte Folded Spill 60; CHECK-NEXT: stxv 63, 80(1) # 16-byte Folded Spill 61; CHECK-NEXT: xscvspdpn 2, 0 62; CHECK-NEXT: vmr 31, 3 63; CHECK-NEXT: vmr 30, 2 64; CHECK-NEXT: bl fmodf 65; CHECK-NEXT: nop 66; CHECK-NEXT: xxsldwi 0, 62, 62, 1 67; CHECK-NEXT: xscpsgndp 61, 1, 1 68; CHECK-NEXT: xscvspdpn 1, 0 69; CHECK-NEXT: xxsldwi 0, 63, 63, 1 70; CHECK-NEXT: xscvspdpn 2, 0 71; CHECK-NEXT: bl fmodf 72; CHECK-NEXT: nop 73; CHECK-NEXT: xxmrghd 0, 1, 61 74; CHECK-NEXT: xscvspdpn 1, 62 75; CHECK-NEXT: xscvspdpn 2, 63 76; CHECK-NEXT: xvcvdpsp 60, 0 77; CHECK-NEXT: bl fmodf 78; CHECK-NEXT: nop 79; CHECK-NEXT: xxswapd 0, 62 80; CHECK-NEXT: xscpsgndp 61, 1, 1 81; CHECK-NEXT: xscvspdpn 1, 0 82; CHECK-NEXT: xxswapd 0, 63 83; CHECK-NEXT: xscvspdpn 2, 0 84; CHECK-NEXT: bl fmodf 85; CHECK-NEXT: nop 86; CHECK-NEXT: xxmrghd 0, 61, 1 87; CHECK-NEXT: lxv 63, 80(1) # 16-byte Folded Reload 88; CHECK-NEXT: lxv 62, 64(1) # 16-byte Folded Reload 89; CHECK-NEXT: lxv 61, 48(1) # 16-byte Folded Reload 90; CHECK-NEXT: xvcvdpsp 34, 0 91; CHECK-NEXT: vmrgew 2, 2, 28 92; CHECK-NEXT: lxv 60, 32(1) # 16-byte Folded Reload 93; CHECK-NEXT: addi 1, 1, 96 94; CHECK-NEXT: ld 0, 16(1) 95; CHECK-NEXT: mtlr 0 96; CHECK-NEXT: blr 97entry: 98 %rem = frem fast <4 x float> %a, %b 99 ret <4 x float> %rem 100} 101 102define <2 x double> @frem2x64(<2 x double> %a, <2 x double> %b) { 103; CHECK-LABEL: frem2x64: 104; CHECK: # %bb.0: # %entry 105; CHECK-NEXT: mflr 0 106; CHECK-NEXT: stdu 1, -80(1) 107; CHECK-NEXT: std 0, 96(1) 108; CHECK-NEXT: .cfi_def_cfa_offset 80 109; CHECK-NEXT: .cfi_offset lr, 16 110; CHECK-NEXT: .cfi_offset v29, -48 111; CHECK-NEXT: .cfi_offset v30, -32 112; CHECK-NEXT: .cfi_offset v31, -16 113; CHECK-NEXT: stxv 62, 48(1) # 16-byte Folded Spill 114; CHECK-NEXT: stxv 63, 64(1) # 16-byte Folded Spill 115; CHECK-NEXT: vmr 31, 3 116; CHECK-NEXT: xscpsgndp 2, 63, 63 117; CHECK-NEXT: vmr 30, 2 118; CHECK-NEXT: xscpsgndp 1, 62, 62 119; CHECK-NEXT: stxv 61, 32(1) # 16-byte Folded Spill 120; CHECK-NEXT: bl fmod 121; CHECK-NEXT: nop 122; CHECK-NEXT: xscpsgndp 61, 1, 1 123; CHECK-NEXT: xxswapd 1, 62 124; CHECK-NEXT: xxswapd 2, 63 125; CHECK-NEXT: bl fmod 126; CHECK-NEXT: nop 127; CHECK-NEXT: xxmrghd 34, 61, 1 128; CHECK-NEXT: lxv 63, 64(1) # 16-byte Folded Reload 129; CHECK-NEXT: lxv 62, 48(1) # 16-byte Folded Reload 130; CHECK-NEXT: lxv 61, 32(1) # 16-byte Folded Reload 131; CHECK-NEXT: addi 1, 1, 80 132; CHECK-NEXT: ld 0, 16(1) 133; CHECK-NEXT: mtlr 0 134; CHECK-NEXT: blr 135entry: 136 %rem = frem fast <2 x double> %a, %b 137 ret <2 x double> %rem 138} 139