xref: /llvm-project/llvm/test/CodeGen/PowerPC/fp-strict-fcmp.ll (revision b922a3621116b404d868af8b74cab25ab78555be)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
3; RUN:   < %s -mtriple=powerpc64-unknown-linux -mcpu=pwr8 | FileCheck %s \
4; RUN:   -check-prefix=P8
5; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
6; RUN:   < %s -mtriple=powerpc64le-unknown-linux -mcpu=pwr9 \
7; RUN:   | FileCheck %s -check-prefix=P9
8; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
9; RUN:   < %s -mtriple=powerpc64le-unknown-linux -mcpu=pwr8 -mattr=-vsx | \
10; RUN:   FileCheck %s -check-prefix=NOVSX
11
12define i32 @test_f32_oeq_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
13; P8-LABEL: test_f32_oeq_q:
14; P8:       # %bb.0:
15; P8-NEXT:    fcmpu cr0, f1, f2
16; P8-NEXT:    iseleq r3, r3, r4
17; P8-NEXT:    blr
18;
19; P9-LABEL: test_f32_oeq_q:
20; P9:       # %bb.0:
21; P9-NEXT:    fcmpu cr0, f1, f2
22; P9-NEXT:    iseleq r3, r3, r4
23; P9-NEXT:    blr
24;
25; NOVSX-LABEL: test_f32_oeq_q:
26; NOVSX:       # %bb.0:
27; NOVSX-NEXT:    fcmpu cr0, f1, f2
28; NOVSX-NEXT:    iseleq r3, r3, r4
29; NOVSX-NEXT:    blr
30  %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
31                                               float %f1, float %f2, metadata !"oeq",
32                                               metadata !"fpexcept.strict") #0
33  %res = select i1 %cond, i32 %a, i32 %b
34  ret i32 %res
35}
36
37define i32 @test_f32_ogt_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
38; P8-LABEL: test_f32_ogt_q:
39; P8:       # %bb.0:
40; P8-NEXT:    fcmpu cr0, f1, f2
41; P8-NEXT:    iselgt r3, r3, r4
42; P8-NEXT:    blr
43;
44; P9-LABEL: test_f32_ogt_q:
45; P9:       # %bb.0:
46; P9-NEXT:    fcmpu cr0, f1, f2
47; P9-NEXT:    iselgt r3, r3, r4
48; P9-NEXT:    blr
49;
50; NOVSX-LABEL: test_f32_ogt_q:
51; NOVSX:       # %bb.0:
52; NOVSX-NEXT:    fcmpu cr0, f1, f2
53; NOVSX-NEXT:    iselgt r3, r3, r4
54; NOVSX-NEXT:    blr
55  %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
56                                               float %f1, float %f2, metadata !"ogt",
57                                               metadata !"fpexcept.strict") #0
58  %res = select i1 %cond, i32 %a, i32 %b
59  ret i32 %res
60}
61
62define i32 @test_f32_oge_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
63; P8-LABEL: test_f32_oge_q:
64; P8:       # %bb.0:
65; P8-NEXT:    fcmpu cr0, f1, f2
66; P8-NEXT:    crnor 4*cr5+lt, un, lt
67; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
68; P8-NEXT:    blr
69;
70; P9-LABEL: test_f32_oge_q:
71; P9:       # %bb.0:
72; P9-NEXT:    fcmpu cr0, f1, f2
73; P9-NEXT:    crnor 4*cr5+lt, un, lt
74; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
75; P9-NEXT:    blr
76;
77; NOVSX-LABEL: test_f32_oge_q:
78; NOVSX:       # %bb.0:
79; NOVSX-NEXT:    fcmpu cr0, f1, f2
80; NOVSX-NEXT:    crnor 4*cr5+lt, un, lt
81; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
82; NOVSX-NEXT:    blr
83  %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
84                                               float %f1, float %f2, metadata !"oge",
85                                               metadata !"fpexcept.strict") #0
86  %res = select i1 %cond, i32 %a, i32 %b
87  ret i32 %res
88}
89
90define i32 @test_f32_olt_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
91; P8-LABEL: test_f32_olt_q:
92; P8:       # %bb.0:
93; P8-NEXT:    fcmpu cr0, f1, f2
94; P8-NEXT:    isellt r3, r3, r4
95; P8-NEXT:    blr
96;
97; P9-LABEL: test_f32_olt_q:
98; P9:       # %bb.0:
99; P9-NEXT:    fcmpu cr0, f1, f2
100; P9-NEXT:    isellt r3, r3, r4
101; P9-NEXT:    blr
102;
103; NOVSX-LABEL: test_f32_olt_q:
104; NOVSX:       # %bb.0:
105; NOVSX-NEXT:    fcmpu cr0, f1, f2
106; NOVSX-NEXT:    isellt r3, r3, r4
107; NOVSX-NEXT:    blr
108  %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
109                                               float %f1, float %f2, metadata !"olt",
110                                               metadata !"fpexcept.strict") #0
111  %res = select i1 %cond, i32 %a, i32 %b
112  ret i32 %res
113}
114
115define i32 @test_f32_ole_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
116; P8-LABEL: test_f32_ole_q:
117; P8:       # %bb.0:
118; P8-NEXT:    fcmpu cr0, f1, f2
119; P8-NEXT:    crnor 4*cr5+lt, un, gt
120; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
121; P8-NEXT:    blr
122;
123; P9-LABEL: test_f32_ole_q:
124; P9:       # %bb.0:
125; P9-NEXT:    fcmpu cr0, f1, f2
126; P9-NEXT:    crnor 4*cr5+lt, un, gt
127; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
128; P9-NEXT:    blr
129;
130; NOVSX-LABEL: test_f32_ole_q:
131; NOVSX:       # %bb.0:
132; NOVSX-NEXT:    fcmpu cr0, f1, f2
133; NOVSX-NEXT:    crnor 4*cr5+lt, un, gt
134; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
135; NOVSX-NEXT:    blr
136  %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
137                                               float %f1, float %f2, metadata !"ole",
138                                               metadata !"fpexcept.strict") #0
139  %res = select i1 %cond, i32 %a, i32 %b
140  ret i32 %res
141}
142
143define i32 @test_f32_one_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
144; P8-LABEL: test_f32_one_q:
145; P8:       # %bb.0:
146; P8-NEXT:    fcmpu cr0, f1, f2
147; P8-NEXT:    crnor 4*cr5+lt, un, eq
148; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
149; P8-NEXT:    blr
150;
151; P9-LABEL: test_f32_one_q:
152; P9:       # %bb.0:
153; P9-NEXT:    fcmpu cr0, f1, f2
154; P9-NEXT:    crnor 4*cr5+lt, un, eq
155; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
156; P9-NEXT:    blr
157;
158; NOVSX-LABEL: test_f32_one_q:
159; NOVSX:       # %bb.0:
160; NOVSX-NEXT:    fcmpu cr0, f1, f2
161; NOVSX-NEXT:    crnor 4*cr5+lt, un, eq
162; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
163; NOVSX-NEXT:    blr
164  %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
165                                               float %f1, float %f2, metadata !"one",
166                                               metadata !"fpexcept.strict") #0
167  %res = select i1 %cond, i32 %a, i32 %b
168  ret i32 %res
169}
170
171define i32 @test_f32_ord_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
172; P8-LABEL: test_f32_ord_q:
173; P8:       # %bb.0:
174; P8-NEXT:    fcmpu cr0, f1, f2
175; P8-NEXT:    isel r3, r4, r3, un
176; P8-NEXT:    blr
177;
178; P9-LABEL: test_f32_ord_q:
179; P9:       # %bb.0:
180; P9-NEXT:    fcmpu cr0, f1, f2
181; P9-NEXT:    isel r3, r4, r3, un
182; P9-NEXT:    blr
183;
184; NOVSX-LABEL: test_f32_ord_q:
185; NOVSX:       # %bb.0:
186; NOVSX-NEXT:    fcmpu cr0, f1, f2
187; NOVSX-NEXT:    isel r3, r4, r3, un
188; NOVSX-NEXT:    blr
189  %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
190                                               float %f1, float %f2, metadata !"ord",
191                                               metadata !"fpexcept.strict") #0
192  %res = select i1 %cond, i32 %a, i32 %b
193  ret i32 %res
194}
195
196define i32 @test_f32_ueq_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
197; P8-LABEL: test_f32_ueq_q:
198; P8:       # %bb.0:
199; P8-NEXT:    fcmpu cr0, f1, f2
200; P8-NEXT:    cror 4*cr5+lt, eq, un
201; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
202; P8-NEXT:    blr
203;
204; P9-LABEL: test_f32_ueq_q:
205; P9:       # %bb.0:
206; P9-NEXT:    fcmpu cr0, f1, f2
207; P9-NEXT:    cror 4*cr5+lt, eq, un
208; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
209; P9-NEXT:    blr
210;
211; NOVSX-LABEL: test_f32_ueq_q:
212; NOVSX:       # %bb.0:
213; NOVSX-NEXT:    fcmpu cr0, f1, f2
214; NOVSX-NEXT:    cror 4*cr5+lt, eq, un
215; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
216; NOVSX-NEXT:    blr
217  %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
218                                               float %f1, float %f2, metadata !"ueq",
219                                               metadata !"fpexcept.strict") #0
220  %res = select i1 %cond, i32 %a, i32 %b
221  ret i32 %res
222}
223
224define i32 @test_f32_ugt_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
225; P8-LABEL: test_f32_ugt_q:
226; P8:       # %bb.0:
227; P8-NEXT:    fcmpu cr0, f1, f2
228; P8-NEXT:    cror 4*cr5+lt, gt, un
229; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
230; P8-NEXT:    blr
231;
232; P9-LABEL: test_f32_ugt_q:
233; P9:       # %bb.0:
234; P9-NEXT:    fcmpu cr0, f1, f2
235; P9-NEXT:    cror 4*cr5+lt, gt, un
236; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
237; P9-NEXT:    blr
238;
239; NOVSX-LABEL: test_f32_ugt_q:
240; NOVSX:       # %bb.0:
241; NOVSX-NEXT:    fcmpu cr0, f1, f2
242; NOVSX-NEXT:    cror 4*cr5+lt, gt, un
243; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
244; NOVSX-NEXT:    blr
245  %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
246                                               float %f1, float %f2, metadata !"ugt",
247                                               metadata !"fpexcept.strict") #0
248  %res = select i1 %cond, i32 %a, i32 %b
249  ret i32 %res
250}
251
252define i32 @test_f32_uge_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
253; P8-LABEL: test_f32_uge_q:
254; P8:       # %bb.0:
255; P8-NEXT:    fcmpu cr0, f1, f2
256; P8-NEXT:    isellt r3, r4, r3
257; P8-NEXT:    blr
258;
259; P9-LABEL: test_f32_uge_q:
260; P9:       # %bb.0:
261; P9-NEXT:    fcmpu cr0, f1, f2
262; P9-NEXT:    isellt r3, r4, r3
263; P9-NEXT:    blr
264;
265; NOVSX-LABEL: test_f32_uge_q:
266; NOVSX:       # %bb.0:
267; NOVSX-NEXT:    fcmpu cr0, f1, f2
268; NOVSX-NEXT:    isellt r3, r4, r3
269; NOVSX-NEXT:    blr
270  %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
271                                               float %f1, float %f2, metadata !"uge",
272                                               metadata !"fpexcept.strict") #0
273  %res = select i1 %cond, i32 %a, i32 %b
274  ret i32 %res
275}
276
277define i32 @test_f32_ult_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
278; P8-LABEL: test_f32_ult_q:
279; P8:       # %bb.0:
280; P8-NEXT:    fcmpu cr0, f1, f2
281; P8-NEXT:    cror 4*cr5+lt, lt, un
282; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
283; P8-NEXT:    blr
284;
285; P9-LABEL: test_f32_ult_q:
286; P9:       # %bb.0:
287; P9-NEXT:    fcmpu cr0, f1, f2
288; P9-NEXT:    cror 4*cr5+lt, lt, un
289; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
290; P9-NEXT:    blr
291;
292; NOVSX-LABEL: test_f32_ult_q:
293; NOVSX:       # %bb.0:
294; NOVSX-NEXT:    fcmpu cr0, f1, f2
295; NOVSX-NEXT:    cror 4*cr5+lt, lt, un
296; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
297; NOVSX-NEXT:    blr
298  %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
299                                               float %f1, float %f2, metadata !"ult",
300                                               metadata !"fpexcept.strict") #0
301  %res = select i1 %cond, i32 %a, i32 %b
302  ret i32 %res
303}
304
305define i32 @test_f32_ule_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
306; P8-LABEL: test_f32_ule_q:
307; P8:       # %bb.0:
308; P8-NEXT:    fcmpu cr0, f1, f2
309; P8-NEXT:    iselgt r3, r4, r3
310; P8-NEXT:    blr
311;
312; P9-LABEL: test_f32_ule_q:
313; P9:       # %bb.0:
314; P9-NEXT:    fcmpu cr0, f1, f2
315; P9-NEXT:    iselgt r3, r4, r3
316; P9-NEXT:    blr
317;
318; NOVSX-LABEL: test_f32_ule_q:
319; NOVSX:       # %bb.0:
320; NOVSX-NEXT:    fcmpu cr0, f1, f2
321; NOVSX-NEXT:    iselgt r3, r4, r3
322; NOVSX-NEXT:    blr
323  %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
324                                               float %f1, float %f2, metadata !"ule",
325                                               metadata !"fpexcept.strict") #0
326  %res = select i1 %cond, i32 %a, i32 %b
327  ret i32 %res
328}
329
330define i32 @test_f32_une_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
331; P8-LABEL: test_f32_une_q:
332; P8:       # %bb.0:
333; P8-NEXT:    fcmpu cr0, f1, f2
334; P8-NEXT:    iseleq r3, r4, r3
335; P8-NEXT:    blr
336;
337; P9-LABEL: test_f32_une_q:
338; P9:       # %bb.0:
339; P9-NEXT:    fcmpu cr0, f1, f2
340; P9-NEXT:    iseleq r3, r4, r3
341; P9-NEXT:    blr
342;
343; NOVSX-LABEL: test_f32_une_q:
344; NOVSX:       # %bb.0:
345; NOVSX-NEXT:    fcmpu cr0, f1, f2
346; NOVSX-NEXT:    iseleq r3, r4, r3
347; NOVSX-NEXT:    blr
348  %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
349                                               float %f1, float %f2, metadata !"une",
350                                               metadata !"fpexcept.strict") #0
351  %res = select i1 %cond, i32 %a, i32 %b
352  ret i32 %res
353}
354
355define i32 @test_f32_uno_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
356; P8-LABEL: test_f32_uno_q:
357; P8:       # %bb.0:
358; P8-NEXT:    fcmpu cr0, f1, f2
359; P8-NEXT:    isel r3, r3, r4, un
360; P8-NEXT:    blr
361;
362; P9-LABEL: test_f32_uno_q:
363; P9:       # %bb.0:
364; P9-NEXT:    fcmpu cr0, f1, f2
365; P9-NEXT:    isel r3, r3, r4, un
366; P9-NEXT:    blr
367;
368; NOVSX-LABEL: test_f32_uno_q:
369; NOVSX:       # %bb.0:
370; NOVSX-NEXT:    fcmpu cr0, f1, f2
371; NOVSX-NEXT:    isel r3, r3, r4, un
372; NOVSX-NEXT:    blr
373  %cond = call i1 @llvm.experimental.constrained.fcmp.f32(
374                                               float %f1, float %f2, metadata !"uno",
375                                               metadata !"fpexcept.strict") #0
376  %res = select i1 %cond, i32 %a, i32 %b
377  ret i32 %res
378}
379
380define i32 @test_f64_oeq_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
381; P8-LABEL: test_f64_oeq_q:
382; P8:       # %bb.0:
383; P8-NEXT:    fcmpu cr0, f1, f2
384; P8-NEXT:    iseleq r3, r3, r4
385; P8-NEXT:    blr
386;
387; P9-LABEL: test_f64_oeq_q:
388; P9:       # %bb.0:
389; P9-NEXT:    fcmpu cr0, f1, f2
390; P9-NEXT:    iseleq r3, r3, r4
391; P9-NEXT:    blr
392;
393; NOVSX-LABEL: test_f64_oeq_q:
394; NOVSX:       # %bb.0:
395; NOVSX-NEXT:    fcmpu cr0, f1, f2
396; NOVSX-NEXT:    iseleq r3, r3, r4
397; NOVSX-NEXT:    blr
398  %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
399                                               double %f1, double %f2, metadata !"oeq",
400                                               metadata !"fpexcept.strict") #0
401  %res = select i1 %cond, i32 %a, i32 %b
402  ret i32 %res
403}
404
405define i32 @test_f64_ogt_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
406; P8-LABEL: test_f64_ogt_q:
407; P8:       # %bb.0:
408; P8-NEXT:    fcmpu cr0, f1, f2
409; P8-NEXT:    iselgt r3, r3, r4
410; P8-NEXT:    blr
411;
412; P9-LABEL: test_f64_ogt_q:
413; P9:       # %bb.0:
414; P9-NEXT:    fcmpu cr0, f1, f2
415; P9-NEXT:    iselgt r3, r3, r4
416; P9-NEXT:    blr
417;
418; NOVSX-LABEL: test_f64_ogt_q:
419; NOVSX:       # %bb.0:
420; NOVSX-NEXT:    fcmpu cr0, f1, f2
421; NOVSX-NEXT:    iselgt r3, r3, r4
422; NOVSX-NEXT:    blr
423  %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
424                                               double %f1, double %f2, metadata !"ogt",
425                                               metadata !"fpexcept.strict") #0
426  %res = select i1 %cond, i32 %a, i32 %b
427  ret i32 %res
428}
429
430define i32 @test_f64_oge_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
431; P8-LABEL: test_f64_oge_q:
432; P8:       # %bb.0:
433; P8-NEXT:    fcmpu cr0, f1, f2
434; P8-NEXT:    crnor 4*cr5+lt, un, lt
435; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
436; P8-NEXT:    blr
437;
438; P9-LABEL: test_f64_oge_q:
439; P9:       # %bb.0:
440; P9-NEXT:    fcmpu cr0, f1, f2
441; P9-NEXT:    crnor 4*cr5+lt, un, lt
442; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
443; P9-NEXT:    blr
444;
445; NOVSX-LABEL: test_f64_oge_q:
446; NOVSX:       # %bb.0:
447; NOVSX-NEXT:    fcmpu cr0, f1, f2
448; NOVSX-NEXT:    crnor 4*cr5+lt, un, lt
449; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
450; NOVSX-NEXT:    blr
451  %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
452                                               double %f1, double %f2, metadata !"oge",
453                                               metadata !"fpexcept.strict") #0
454  %res = select i1 %cond, i32 %a, i32 %b
455  ret i32 %res
456}
457
458define i32 @test_f64_olt_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
459; P8-LABEL: test_f64_olt_q:
460; P8:       # %bb.0:
461; P8-NEXT:    fcmpu cr0, f1, f2
462; P8-NEXT:    isellt r3, r3, r4
463; P8-NEXT:    blr
464;
465; P9-LABEL: test_f64_olt_q:
466; P9:       # %bb.0:
467; P9-NEXT:    fcmpu cr0, f1, f2
468; P9-NEXT:    isellt r3, r3, r4
469; P9-NEXT:    blr
470;
471; NOVSX-LABEL: test_f64_olt_q:
472; NOVSX:       # %bb.0:
473; NOVSX-NEXT:    fcmpu cr0, f1, f2
474; NOVSX-NEXT:    isellt r3, r3, r4
475; NOVSX-NEXT:    blr
476  %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
477                                               double %f1, double %f2, metadata !"olt",
478                                               metadata !"fpexcept.strict") #0
479  %res = select i1 %cond, i32 %a, i32 %b
480  ret i32 %res
481}
482
483define i32 @test_f64_ole_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
484; P8-LABEL: test_f64_ole_q:
485; P8:       # %bb.0:
486; P8-NEXT:    fcmpu cr0, f1, f2
487; P8-NEXT:    crnor 4*cr5+lt, un, gt
488; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
489; P8-NEXT:    blr
490;
491; P9-LABEL: test_f64_ole_q:
492; P9:       # %bb.0:
493; P9-NEXT:    fcmpu cr0, f1, f2
494; P9-NEXT:    crnor 4*cr5+lt, un, gt
495; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
496; P9-NEXT:    blr
497;
498; NOVSX-LABEL: test_f64_ole_q:
499; NOVSX:       # %bb.0:
500; NOVSX-NEXT:    fcmpu cr0, f1, f2
501; NOVSX-NEXT:    crnor 4*cr5+lt, un, gt
502; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
503; NOVSX-NEXT:    blr
504  %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
505                                               double %f1, double %f2, metadata !"ole",
506                                               metadata !"fpexcept.strict") #0
507  %res = select i1 %cond, i32 %a, i32 %b
508  ret i32 %res
509}
510
511define i32 @test_f64_one_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
512; P8-LABEL: test_f64_one_q:
513; P8:       # %bb.0:
514; P8-NEXT:    fcmpu cr0, f1, f2
515; P8-NEXT:    crnor 4*cr5+lt, un, eq
516; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
517; P8-NEXT:    blr
518;
519; P9-LABEL: test_f64_one_q:
520; P9:       # %bb.0:
521; P9-NEXT:    fcmpu cr0, f1, f2
522; P9-NEXT:    crnor 4*cr5+lt, un, eq
523; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
524; P9-NEXT:    blr
525;
526; NOVSX-LABEL: test_f64_one_q:
527; NOVSX:       # %bb.0:
528; NOVSX-NEXT:    fcmpu cr0, f1, f2
529; NOVSX-NEXT:    crnor 4*cr5+lt, un, eq
530; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
531; NOVSX-NEXT:    blr
532  %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
533                                               double %f1, double %f2, metadata !"one",
534                                               metadata !"fpexcept.strict") #0
535  %res = select i1 %cond, i32 %a, i32 %b
536  ret i32 %res
537}
538
539define i32 @test_f64_ord_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
540; P8-LABEL: test_f64_ord_q:
541; P8:       # %bb.0:
542; P8-NEXT:    fcmpu cr0, f1, f2
543; P8-NEXT:    isel r3, r4, r3, un
544; P8-NEXT:    blr
545;
546; P9-LABEL: test_f64_ord_q:
547; P9:       # %bb.0:
548; P9-NEXT:    fcmpu cr0, f1, f2
549; P9-NEXT:    isel r3, r4, r3, un
550; P9-NEXT:    blr
551;
552; NOVSX-LABEL: test_f64_ord_q:
553; NOVSX:       # %bb.0:
554; NOVSX-NEXT:    fcmpu cr0, f1, f2
555; NOVSX-NEXT:    isel r3, r4, r3, un
556; NOVSX-NEXT:    blr
557  %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
558                                               double %f1, double %f2, metadata !"ord",
559                                               metadata !"fpexcept.strict") #0
560  %res = select i1 %cond, i32 %a, i32 %b
561  ret i32 %res
562}
563
564define i32 @test_f64_ueq_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
565; P8-LABEL: test_f64_ueq_q:
566; P8:       # %bb.0:
567; P8-NEXT:    fcmpu cr0, f1, f2
568; P8-NEXT:    cror 4*cr5+lt, eq, un
569; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
570; P8-NEXT:    blr
571;
572; P9-LABEL: test_f64_ueq_q:
573; P9:       # %bb.0:
574; P9-NEXT:    fcmpu cr0, f1, f2
575; P9-NEXT:    cror 4*cr5+lt, eq, un
576; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
577; P9-NEXT:    blr
578;
579; NOVSX-LABEL: test_f64_ueq_q:
580; NOVSX:       # %bb.0:
581; NOVSX-NEXT:    fcmpu cr0, f1, f2
582; NOVSX-NEXT:    cror 4*cr5+lt, eq, un
583; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
584; NOVSX-NEXT:    blr
585  %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
586                                               double %f1, double %f2, metadata !"ueq",
587                                               metadata !"fpexcept.strict") #0
588  %res = select i1 %cond, i32 %a, i32 %b
589  ret i32 %res
590}
591
592define i32 @test_f64_ugt_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
593; P8-LABEL: test_f64_ugt_q:
594; P8:       # %bb.0:
595; P8-NEXT:    fcmpu cr0, f1, f2
596; P8-NEXT:    cror 4*cr5+lt, gt, un
597; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
598; P8-NEXT:    blr
599;
600; P9-LABEL: test_f64_ugt_q:
601; P9:       # %bb.0:
602; P9-NEXT:    fcmpu cr0, f1, f2
603; P9-NEXT:    cror 4*cr5+lt, gt, un
604; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
605; P9-NEXT:    blr
606;
607; NOVSX-LABEL: test_f64_ugt_q:
608; NOVSX:       # %bb.0:
609; NOVSX-NEXT:    fcmpu cr0, f1, f2
610; NOVSX-NEXT:    cror 4*cr5+lt, gt, un
611; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
612; NOVSX-NEXT:    blr
613  %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
614                                               double %f1, double %f2, metadata !"ugt",
615                                               metadata !"fpexcept.strict") #0
616  %res = select i1 %cond, i32 %a, i32 %b
617  ret i32 %res
618}
619
620define i32 @test_f64_uge_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
621; P8-LABEL: test_f64_uge_q:
622; P8:       # %bb.0:
623; P8-NEXT:    fcmpu cr0, f1, f2
624; P8-NEXT:    isellt r3, r4, r3
625; P8-NEXT:    blr
626;
627; P9-LABEL: test_f64_uge_q:
628; P9:       # %bb.0:
629; P9-NEXT:    fcmpu cr0, f1, f2
630; P9-NEXT:    isellt r3, r4, r3
631; P9-NEXT:    blr
632;
633; NOVSX-LABEL: test_f64_uge_q:
634; NOVSX:       # %bb.0:
635; NOVSX-NEXT:    fcmpu cr0, f1, f2
636; NOVSX-NEXT:    isellt r3, r4, r3
637; NOVSX-NEXT:    blr
638  %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
639                                               double %f1, double %f2, metadata !"uge",
640                                               metadata !"fpexcept.strict") #0
641  %res = select i1 %cond, i32 %a, i32 %b
642  ret i32 %res
643}
644
645define i32 @test_f64_ult_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
646; P8-LABEL: test_f64_ult_q:
647; P8:       # %bb.0:
648; P8-NEXT:    fcmpu cr0, f1, f2
649; P8-NEXT:    cror 4*cr5+lt, lt, un
650; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
651; P8-NEXT:    blr
652;
653; P9-LABEL: test_f64_ult_q:
654; P9:       # %bb.0:
655; P9-NEXT:    fcmpu cr0, f1, f2
656; P9-NEXT:    cror 4*cr5+lt, lt, un
657; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
658; P9-NEXT:    blr
659;
660; NOVSX-LABEL: test_f64_ult_q:
661; NOVSX:       # %bb.0:
662; NOVSX-NEXT:    fcmpu cr0, f1, f2
663; NOVSX-NEXT:    cror 4*cr5+lt, lt, un
664; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
665; NOVSX-NEXT:    blr
666  %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
667                                               double %f1, double %f2, metadata !"ult",
668                                               metadata !"fpexcept.strict") #0
669  %res = select i1 %cond, i32 %a, i32 %b
670  ret i32 %res
671}
672
673define i32 @test_f64_ule_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
674; P8-LABEL: test_f64_ule_q:
675; P8:       # %bb.0:
676; P8-NEXT:    fcmpu cr0, f1, f2
677; P8-NEXT:    iselgt r3, r4, r3
678; P8-NEXT:    blr
679;
680; P9-LABEL: test_f64_ule_q:
681; P9:       # %bb.0:
682; P9-NEXT:    fcmpu cr0, f1, f2
683; P9-NEXT:    iselgt r3, r4, r3
684; P9-NEXT:    blr
685;
686; NOVSX-LABEL: test_f64_ule_q:
687; NOVSX:       # %bb.0:
688; NOVSX-NEXT:    fcmpu cr0, f1, f2
689; NOVSX-NEXT:    iselgt r3, r4, r3
690; NOVSX-NEXT:    blr
691  %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
692                                               double %f1, double %f2, metadata !"ule",
693                                               metadata !"fpexcept.strict") #0
694  %res = select i1 %cond, i32 %a, i32 %b
695  ret i32 %res
696}
697
698define i32 @test_f64_une_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
699; P8-LABEL: test_f64_une_q:
700; P8:       # %bb.0:
701; P8-NEXT:    fcmpu cr0, f1, f2
702; P8-NEXT:    iseleq r3, r4, r3
703; P8-NEXT:    blr
704;
705; P9-LABEL: test_f64_une_q:
706; P9:       # %bb.0:
707; P9-NEXT:    fcmpu cr0, f1, f2
708; P9-NEXT:    iseleq r3, r4, r3
709; P9-NEXT:    blr
710;
711; NOVSX-LABEL: test_f64_une_q:
712; NOVSX:       # %bb.0:
713; NOVSX-NEXT:    fcmpu cr0, f1, f2
714; NOVSX-NEXT:    iseleq r3, r4, r3
715; NOVSX-NEXT:    blr
716  %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
717                                               double %f1, double %f2, metadata !"une",
718                                               metadata !"fpexcept.strict") #0
719  %res = select i1 %cond, i32 %a, i32 %b
720  ret i32 %res
721}
722
723define i32 @test_f64_uno_q(i32 %a, i32 %b, double %f1, double %f2) #0 {
724; P8-LABEL: test_f64_uno_q:
725; P8:       # %bb.0:
726; P8-NEXT:    fcmpu cr0, f1, f2
727; P8-NEXT:    isel r3, r3, r4, un
728; P8-NEXT:    blr
729;
730; P9-LABEL: test_f64_uno_q:
731; P9:       # %bb.0:
732; P9-NEXT:    fcmpu cr0, f1, f2
733; P9-NEXT:    isel r3, r3, r4, un
734; P9-NEXT:    blr
735;
736; NOVSX-LABEL: test_f64_uno_q:
737; NOVSX:       # %bb.0:
738; NOVSX-NEXT:    fcmpu cr0, f1, f2
739; NOVSX-NEXT:    isel r3, r3, r4, un
740; NOVSX-NEXT:    blr
741  %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
742                                               double %f1, double %f2, metadata !"uno",
743                                               metadata !"fpexcept.strict") #0
744  %res = select i1 %cond, i32 %a, i32 %b
745  ret i32 %res
746}
747
748define i32 @test_f32_oeq_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
749; P8-LABEL: test_f32_oeq_s:
750; P8:       # %bb.0:
751; P8-NEXT:    fcmpo cr0, f1, f2
752; P8-NEXT:    iseleq r3, r3, r4
753; P8-NEXT:    blr
754;
755; P9-LABEL: test_f32_oeq_s:
756; P9:       # %bb.0:
757; P9-NEXT:    fcmpo cr0, f1, f2
758; P9-NEXT:    iseleq r3, r3, r4
759; P9-NEXT:    blr
760;
761; NOVSX-LABEL: test_f32_oeq_s:
762; NOVSX:       # %bb.0:
763; NOVSX-NEXT:    fcmpo cr0, f1, f2
764; NOVSX-NEXT:    iseleq r3, r3, r4
765; NOVSX-NEXT:    blr
766  %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
767                                               float %f1, float %f2, metadata !"oeq",
768                                               metadata !"fpexcept.strict") #0
769  %res = select i1 %cond, i32 %a, i32 %b
770  ret i32 %res
771}
772
773define i32 @test_f32_ogt_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
774; P8-LABEL: test_f32_ogt_s:
775; P8:       # %bb.0:
776; P8-NEXT:    fcmpo cr0, f1, f2
777; P8-NEXT:    iselgt r3, r3, r4
778; P8-NEXT:    blr
779;
780; P9-LABEL: test_f32_ogt_s:
781; P9:       # %bb.0:
782; P9-NEXT:    fcmpo cr0, f1, f2
783; P9-NEXT:    iselgt r3, r3, r4
784; P9-NEXT:    blr
785;
786; NOVSX-LABEL: test_f32_ogt_s:
787; NOVSX:       # %bb.0:
788; NOVSX-NEXT:    fcmpo cr0, f1, f2
789; NOVSX-NEXT:    iselgt r3, r3, r4
790; NOVSX-NEXT:    blr
791  %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
792                                               float %f1, float %f2, metadata !"ogt",
793                                               metadata !"fpexcept.strict") #0
794  %res = select i1 %cond, i32 %a, i32 %b
795  ret i32 %res
796}
797
798define i32 @test_f32_oge_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
799; P8-LABEL: test_f32_oge_s:
800; P8:       # %bb.0:
801; P8-NEXT:    fcmpo cr0, f1, f2
802; P8-NEXT:    crnor 4*cr5+lt, un, lt
803; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
804; P8-NEXT:    blr
805;
806; P9-LABEL: test_f32_oge_s:
807; P9:       # %bb.0:
808; P9-NEXT:    fcmpo cr0, f1, f2
809; P9-NEXT:    crnor 4*cr5+lt, un, lt
810; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
811; P9-NEXT:    blr
812;
813; NOVSX-LABEL: test_f32_oge_s:
814; NOVSX:       # %bb.0:
815; NOVSX-NEXT:    fcmpo cr0, f1, f2
816; NOVSX-NEXT:    crnor 4*cr5+lt, un, lt
817; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
818; NOVSX-NEXT:    blr
819  %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
820                                               float %f1, float %f2, metadata !"oge",
821                                               metadata !"fpexcept.strict") #0
822  %res = select i1 %cond, i32 %a, i32 %b
823  ret i32 %res
824}
825
826define i32 @test_f32_olt_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
827; P8-LABEL: test_f32_olt_s:
828; P8:       # %bb.0:
829; P8-NEXT:    fcmpo cr0, f1, f2
830; P8-NEXT:    isellt r3, r3, r4
831; P8-NEXT:    blr
832;
833; P9-LABEL: test_f32_olt_s:
834; P9:       # %bb.0:
835; P9-NEXT:    fcmpo cr0, f1, f2
836; P9-NEXT:    isellt r3, r3, r4
837; P9-NEXT:    blr
838;
839; NOVSX-LABEL: test_f32_olt_s:
840; NOVSX:       # %bb.0:
841; NOVSX-NEXT:    fcmpo cr0, f1, f2
842; NOVSX-NEXT:    isellt r3, r3, r4
843; NOVSX-NEXT:    blr
844  %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
845                                               float %f1, float %f2, metadata !"olt",
846                                               metadata !"fpexcept.strict") #0
847  %res = select i1 %cond, i32 %a, i32 %b
848  ret i32 %res
849}
850
851define i32 @test_f32_ole_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
852; P8-LABEL: test_f32_ole_s:
853; P8:       # %bb.0:
854; P8-NEXT:    fcmpo cr0, f1, f2
855; P8-NEXT:    crnor 4*cr5+lt, un, gt
856; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
857; P8-NEXT:    blr
858;
859; P9-LABEL: test_f32_ole_s:
860; P9:       # %bb.0:
861; P9-NEXT:    fcmpo cr0, f1, f2
862; P9-NEXT:    crnor 4*cr5+lt, un, gt
863; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
864; P9-NEXT:    blr
865;
866; NOVSX-LABEL: test_f32_ole_s:
867; NOVSX:       # %bb.0:
868; NOVSX-NEXT:    fcmpo cr0, f1, f2
869; NOVSX-NEXT:    crnor 4*cr5+lt, un, gt
870; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
871; NOVSX-NEXT:    blr
872  %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
873                                               float %f1, float %f2, metadata !"ole",
874                                               metadata !"fpexcept.strict") #0
875  %res = select i1 %cond, i32 %a, i32 %b
876  ret i32 %res
877}
878
879define i32 @test_f32_one_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
880; P8-LABEL: test_f32_one_s:
881; P8:       # %bb.0:
882; P8-NEXT:    fcmpo cr0, f1, f2
883; P8-NEXT:    crnor 4*cr5+lt, un, eq
884; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
885; P8-NEXT:    blr
886;
887; P9-LABEL: test_f32_one_s:
888; P9:       # %bb.0:
889; P9-NEXT:    fcmpo cr0, f1, f2
890; P9-NEXT:    crnor 4*cr5+lt, un, eq
891; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
892; P9-NEXT:    blr
893;
894; NOVSX-LABEL: test_f32_one_s:
895; NOVSX:       # %bb.0:
896; NOVSX-NEXT:    fcmpo cr0, f1, f2
897; NOVSX-NEXT:    crnor 4*cr5+lt, un, eq
898; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
899; NOVSX-NEXT:    blr
900  %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
901                                               float %f1, float %f2, metadata !"one",
902                                               metadata !"fpexcept.strict") #0
903  %res = select i1 %cond, i32 %a, i32 %b
904  ret i32 %res
905}
906
907define i32 @test_f32_ord_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
908; P8-LABEL: test_f32_ord_s:
909; P8:       # %bb.0:
910; P8-NEXT:    fcmpo cr0, f1, f2
911; P8-NEXT:    isel r3, r4, r3, un
912; P8-NEXT:    blr
913;
914; P9-LABEL: test_f32_ord_s:
915; P9:       # %bb.0:
916; P9-NEXT:    fcmpo cr0, f1, f2
917; P9-NEXT:    isel r3, r4, r3, un
918; P9-NEXT:    blr
919;
920; NOVSX-LABEL: test_f32_ord_s:
921; NOVSX:       # %bb.0:
922; NOVSX-NEXT:    fcmpo cr0, f1, f2
923; NOVSX-NEXT:    isel r3, r4, r3, un
924; NOVSX-NEXT:    blr
925  %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
926                                               float %f1, float %f2, metadata !"ord",
927                                               metadata !"fpexcept.strict") #0
928  %res = select i1 %cond, i32 %a, i32 %b
929  ret i32 %res
930}
931
932define i32 @test_f32_ueq_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
933; P8-LABEL: test_f32_ueq_s:
934; P8:       # %bb.0:
935; P8-NEXT:    fcmpo cr0, f1, f2
936; P8-NEXT:    cror 4*cr5+lt, eq, un
937; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
938; P8-NEXT:    blr
939;
940; P9-LABEL: test_f32_ueq_s:
941; P9:       # %bb.0:
942; P9-NEXT:    fcmpo cr0, f1, f2
943; P9-NEXT:    cror 4*cr5+lt, eq, un
944; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
945; P9-NEXT:    blr
946;
947; NOVSX-LABEL: test_f32_ueq_s:
948; NOVSX:       # %bb.0:
949; NOVSX-NEXT:    fcmpo cr0, f1, f2
950; NOVSX-NEXT:    cror 4*cr5+lt, eq, un
951; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
952; NOVSX-NEXT:    blr
953  %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
954                                               float %f1, float %f2, metadata !"ueq",
955                                               metadata !"fpexcept.strict") #0
956  %res = select i1 %cond, i32 %a, i32 %b
957  ret i32 %res
958}
959
960define i32 @test_f32_ugt_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
961; P8-LABEL: test_f32_ugt_s:
962; P8:       # %bb.0:
963; P8-NEXT:    fcmpo cr0, f1, f2
964; P8-NEXT:    cror 4*cr5+lt, gt, un
965; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
966; P8-NEXT:    blr
967;
968; P9-LABEL: test_f32_ugt_s:
969; P9:       # %bb.0:
970; P9-NEXT:    fcmpo cr0, f1, f2
971; P9-NEXT:    cror 4*cr5+lt, gt, un
972; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
973; P9-NEXT:    blr
974;
975; NOVSX-LABEL: test_f32_ugt_s:
976; NOVSX:       # %bb.0:
977; NOVSX-NEXT:    fcmpo cr0, f1, f2
978; NOVSX-NEXT:    cror 4*cr5+lt, gt, un
979; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
980; NOVSX-NEXT:    blr
981  %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
982                                               float %f1, float %f2, metadata !"ugt",
983                                               metadata !"fpexcept.strict") #0
984  %res = select i1 %cond, i32 %a, i32 %b
985  ret i32 %res
986}
987
988define i32 @test_f32_uge_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
989; P8-LABEL: test_f32_uge_s:
990; P8:       # %bb.0:
991; P8-NEXT:    fcmpo cr0, f1, f2
992; P8-NEXT:    isellt r3, r4, r3
993; P8-NEXT:    blr
994;
995; P9-LABEL: test_f32_uge_s:
996; P9:       # %bb.0:
997; P9-NEXT:    fcmpo cr0, f1, f2
998; P9-NEXT:    isellt r3, r4, r3
999; P9-NEXT:    blr
1000;
1001; NOVSX-LABEL: test_f32_uge_s:
1002; NOVSX:       # %bb.0:
1003; NOVSX-NEXT:    fcmpo cr0, f1, f2
1004; NOVSX-NEXT:    isellt r3, r4, r3
1005; NOVSX-NEXT:    blr
1006  %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
1007                                               float %f1, float %f2, metadata !"uge",
1008                                               metadata !"fpexcept.strict") #0
1009  %res = select i1 %cond, i32 %a, i32 %b
1010  ret i32 %res
1011}
1012
1013define i32 @test_f32_ult_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
1014; P8-LABEL: test_f32_ult_s:
1015; P8:       # %bb.0:
1016; P8-NEXT:    fcmpo cr0, f1, f2
1017; P8-NEXT:    cror 4*cr5+lt, lt, un
1018; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
1019; P8-NEXT:    blr
1020;
1021; P9-LABEL: test_f32_ult_s:
1022; P9:       # %bb.0:
1023; P9-NEXT:    fcmpo cr0, f1, f2
1024; P9-NEXT:    cror 4*cr5+lt, lt, un
1025; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
1026; P9-NEXT:    blr
1027;
1028; NOVSX-LABEL: test_f32_ult_s:
1029; NOVSX:       # %bb.0:
1030; NOVSX-NEXT:    fcmpo cr0, f1, f2
1031; NOVSX-NEXT:    cror 4*cr5+lt, lt, un
1032; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
1033; NOVSX-NEXT:    blr
1034  %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
1035                                               float %f1, float %f2, metadata !"ult",
1036                                               metadata !"fpexcept.strict") #0
1037  %res = select i1 %cond, i32 %a, i32 %b
1038  ret i32 %res
1039}
1040
1041define i32 @test_f32_ule_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
1042; P8-LABEL: test_f32_ule_s:
1043; P8:       # %bb.0:
1044; P8-NEXT:    fcmpo cr0, f1, f2
1045; P8-NEXT:    iselgt r3, r4, r3
1046; P8-NEXT:    blr
1047;
1048; P9-LABEL: test_f32_ule_s:
1049; P9:       # %bb.0:
1050; P9-NEXT:    fcmpo cr0, f1, f2
1051; P9-NEXT:    iselgt r3, r4, r3
1052; P9-NEXT:    blr
1053;
1054; NOVSX-LABEL: test_f32_ule_s:
1055; NOVSX:       # %bb.0:
1056; NOVSX-NEXT:    fcmpo cr0, f1, f2
1057; NOVSX-NEXT:    iselgt r3, r4, r3
1058; NOVSX-NEXT:    blr
1059  %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
1060                                               float %f1, float %f2, metadata !"ule",
1061                                               metadata !"fpexcept.strict") #0
1062  %res = select i1 %cond, i32 %a, i32 %b
1063  ret i32 %res
1064}
1065
1066define i32 @test_f32_une_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
1067; P8-LABEL: test_f32_une_s:
1068; P8:       # %bb.0:
1069; P8-NEXT:    fcmpo cr0, f1, f2
1070; P8-NEXT:    iseleq r3, r4, r3
1071; P8-NEXT:    blr
1072;
1073; P9-LABEL: test_f32_une_s:
1074; P9:       # %bb.0:
1075; P9-NEXT:    fcmpo cr0, f1, f2
1076; P9-NEXT:    iseleq r3, r4, r3
1077; P9-NEXT:    blr
1078;
1079; NOVSX-LABEL: test_f32_une_s:
1080; NOVSX:       # %bb.0:
1081; NOVSX-NEXT:    fcmpo cr0, f1, f2
1082; NOVSX-NEXT:    iseleq r3, r4, r3
1083; NOVSX-NEXT:    blr
1084  %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
1085                                               float %f1, float %f2, metadata !"une",
1086                                               metadata !"fpexcept.strict") #0
1087  %res = select i1 %cond, i32 %a, i32 %b
1088  ret i32 %res
1089}
1090
1091define i32 @test_f32_uno_s(i32 %a, i32 %b, float %f1, float %f2) #0 {
1092; P8-LABEL: test_f32_uno_s:
1093; P8:       # %bb.0:
1094; P8-NEXT:    fcmpo cr0, f1, f2
1095; P8-NEXT:    isel r3, r3, r4, un
1096; P8-NEXT:    blr
1097;
1098; P9-LABEL: test_f32_uno_s:
1099; P9:       # %bb.0:
1100; P9-NEXT:    fcmpo cr0, f1, f2
1101; P9-NEXT:    isel r3, r3, r4, un
1102; P9-NEXT:    blr
1103;
1104; NOVSX-LABEL: test_f32_uno_s:
1105; NOVSX:       # %bb.0:
1106; NOVSX-NEXT:    fcmpo cr0, f1, f2
1107; NOVSX-NEXT:    isel r3, r3, r4, un
1108; NOVSX-NEXT:    blr
1109  %cond = call i1 @llvm.experimental.constrained.fcmps.f32(
1110                                               float %f1, float %f2, metadata !"uno",
1111                                               metadata !"fpexcept.strict") #0
1112  %res = select i1 %cond, i32 %a, i32 %b
1113  ret i32 %res
1114}
1115
1116define i32 @test_f64_oeq_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
1117; P8-LABEL: test_f64_oeq_s:
1118; P8:       # %bb.0:
1119; P8-NEXT:    fcmpo cr0, f1, f2
1120; P8-NEXT:    iseleq r3, r3, r4
1121; P8-NEXT:    blr
1122;
1123; P9-LABEL: test_f64_oeq_s:
1124; P9:       # %bb.0:
1125; P9-NEXT:    fcmpo cr0, f1, f2
1126; P9-NEXT:    iseleq r3, r3, r4
1127; P9-NEXT:    blr
1128;
1129; NOVSX-LABEL: test_f64_oeq_s:
1130; NOVSX:       # %bb.0:
1131; NOVSX-NEXT:    fcmpo cr0, f1, f2
1132; NOVSX-NEXT:    iseleq r3, r3, r4
1133; NOVSX-NEXT:    blr
1134  %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
1135                                               double %f1, double %f2, metadata !"oeq",
1136                                               metadata !"fpexcept.strict") #0
1137  %res = select i1 %cond, i32 %a, i32 %b
1138  ret i32 %res
1139}
1140
1141define i32 @test_f64_ogt_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
1142; P8-LABEL: test_f64_ogt_s:
1143; P8:       # %bb.0:
1144; P8-NEXT:    fcmpo cr0, f1, f2
1145; P8-NEXT:    iselgt r3, r3, r4
1146; P8-NEXT:    blr
1147;
1148; P9-LABEL: test_f64_ogt_s:
1149; P9:       # %bb.0:
1150; P9-NEXT:    fcmpo cr0, f1, f2
1151; P9-NEXT:    iselgt r3, r3, r4
1152; P9-NEXT:    blr
1153;
1154; NOVSX-LABEL: test_f64_ogt_s:
1155; NOVSX:       # %bb.0:
1156; NOVSX-NEXT:    fcmpo cr0, f1, f2
1157; NOVSX-NEXT:    iselgt r3, r3, r4
1158; NOVSX-NEXT:    blr
1159  %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
1160                                               double %f1, double %f2, metadata !"ogt",
1161                                               metadata !"fpexcept.strict") #0
1162  %res = select i1 %cond, i32 %a, i32 %b
1163  ret i32 %res
1164}
1165
1166define i32 @test_f64_oge_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
1167; P8-LABEL: test_f64_oge_s:
1168; P8:       # %bb.0:
1169; P8-NEXT:    fcmpo cr0, f1, f2
1170; P8-NEXT:    crnor 4*cr5+lt, un, lt
1171; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
1172; P8-NEXT:    blr
1173;
1174; P9-LABEL: test_f64_oge_s:
1175; P9:       # %bb.0:
1176; P9-NEXT:    fcmpo cr0, f1, f2
1177; P9-NEXT:    crnor 4*cr5+lt, un, lt
1178; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
1179; P9-NEXT:    blr
1180;
1181; NOVSX-LABEL: test_f64_oge_s:
1182; NOVSX:       # %bb.0:
1183; NOVSX-NEXT:    fcmpo cr0, f1, f2
1184; NOVSX-NEXT:    crnor 4*cr5+lt, un, lt
1185; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
1186; NOVSX-NEXT:    blr
1187  %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
1188                                               double %f1, double %f2, metadata !"oge",
1189                                               metadata !"fpexcept.strict") #0
1190  %res = select i1 %cond, i32 %a, i32 %b
1191  ret i32 %res
1192}
1193
1194define i32 @test_f64_olt_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
1195; P8-LABEL: test_f64_olt_s:
1196; P8:       # %bb.0:
1197; P8-NEXT:    fcmpo cr0, f1, f2
1198; P8-NEXT:    isellt r3, r3, r4
1199; P8-NEXT:    blr
1200;
1201; P9-LABEL: test_f64_olt_s:
1202; P9:       # %bb.0:
1203; P9-NEXT:    fcmpo cr0, f1, f2
1204; P9-NEXT:    isellt r3, r3, r4
1205; P9-NEXT:    blr
1206;
1207; NOVSX-LABEL: test_f64_olt_s:
1208; NOVSX:       # %bb.0:
1209; NOVSX-NEXT:    fcmpo cr0, f1, f2
1210; NOVSX-NEXT:    isellt r3, r3, r4
1211; NOVSX-NEXT:    blr
1212  %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
1213                                               double %f1, double %f2, metadata !"olt",
1214                                               metadata !"fpexcept.strict") #0
1215  %res = select i1 %cond, i32 %a, i32 %b
1216  ret i32 %res
1217}
1218
1219define i32 @test_f64_ole_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
1220; P8-LABEL: test_f64_ole_s:
1221; P8:       # %bb.0:
1222; P8-NEXT:    fcmpo cr0, f1, f2
1223; P8-NEXT:    crnor 4*cr5+lt, un, gt
1224; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
1225; P8-NEXT:    blr
1226;
1227; P9-LABEL: test_f64_ole_s:
1228; P9:       # %bb.0:
1229; P9-NEXT:    fcmpo cr0, f1, f2
1230; P9-NEXT:    crnor 4*cr5+lt, un, gt
1231; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
1232; P9-NEXT:    blr
1233;
1234; NOVSX-LABEL: test_f64_ole_s:
1235; NOVSX:       # %bb.0:
1236; NOVSX-NEXT:    fcmpo cr0, f1, f2
1237; NOVSX-NEXT:    crnor 4*cr5+lt, un, gt
1238; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
1239; NOVSX-NEXT:    blr
1240  %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
1241                                               double %f1, double %f2, metadata !"ole",
1242                                               metadata !"fpexcept.strict") #0
1243  %res = select i1 %cond, i32 %a, i32 %b
1244  ret i32 %res
1245}
1246
1247define i32 @test_f64_one_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
1248; P8-LABEL: test_f64_one_s:
1249; P8:       # %bb.0:
1250; P8-NEXT:    fcmpo cr0, f1, f2
1251; P8-NEXT:    crnor 4*cr5+lt, un, eq
1252; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
1253; P8-NEXT:    blr
1254;
1255; P9-LABEL: test_f64_one_s:
1256; P9:       # %bb.0:
1257; P9-NEXT:    fcmpo cr0, f1, f2
1258; P9-NEXT:    crnor 4*cr5+lt, un, eq
1259; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
1260; P9-NEXT:    blr
1261;
1262; NOVSX-LABEL: test_f64_one_s:
1263; NOVSX:       # %bb.0:
1264; NOVSX-NEXT:    fcmpo cr0, f1, f2
1265; NOVSX-NEXT:    crnor 4*cr5+lt, un, eq
1266; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
1267; NOVSX-NEXT:    blr
1268  %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
1269                                               double %f1, double %f2, metadata !"one",
1270                                               metadata !"fpexcept.strict") #0
1271  %res = select i1 %cond, i32 %a, i32 %b
1272  ret i32 %res
1273}
1274
1275define i32 @test_f64_ord_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
1276; P8-LABEL: test_f64_ord_s:
1277; P8:       # %bb.0:
1278; P8-NEXT:    fcmpo cr0, f1, f2
1279; P8-NEXT:    isel r3, r4, r3, un
1280; P8-NEXT:    blr
1281;
1282; P9-LABEL: test_f64_ord_s:
1283; P9:       # %bb.0:
1284; P9-NEXT:    fcmpo cr0, f1, f2
1285; P9-NEXT:    isel r3, r4, r3, un
1286; P9-NEXT:    blr
1287;
1288; NOVSX-LABEL: test_f64_ord_s:
1289; NOVSX:       # %bb.0:
1290; NOVSX-NEXT:    fcmpo cr0, f1, f2
1291; NOVSX-NEXT:    isel r3, r4, r3, un
1292; NOVSX-NEXT:    blr
1293  %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
1294                                               double %f1, double %f2, metadata !"ord",
1295                                               metadata !"fpexcept.strict") #0
1296  %res = select i1 %cond, i32 %a, i32 %b
1297  ret i32 %res
1298}
1299
1300define i32 @test_f64_ueq_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
1301; P8-LABEL: test_f64_ueq_s:
1302; P8:       # %bb.0:
1303; P8-NEXT:    fcmpo cr0, f1, f2
1304; P8-NEXT:    cror 4*cr5+lt, eq, un
1305; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
1306; P8-NEXT:    blr
1307;
1308; P9-LABEL: test_f64_ueq_s:
1309; P9:       # %bb.0:
1310; P9-NEXT:    fcmpo cr0, f1, f2
1311; P9-NEXT:    cror 4*cr5+lt, eq, un
1312; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
1313; P9-NEXT:    blr
1314;
1315; NOVSX-LABEL: test_f64_ueq_s:
1316; NOVSX:       # %bb.0:
1317; NOVSX-NEXT:    fcmpo cr0, f1, f2
1318; NOVSX-NEXT:    cror 4*cr5+lt, eq, un
1319; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
1320; NOVSX-NEXT:    blr
1321  %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
1322                                               double %f1, double %f2, metadata !"ueq",
1323                                               metadata !"fpexcept.strict") #0
1324  %res = select i1 %cond, i32 %a, i32 %b
1325  ret i32 %res
1326}
1327
1328define i32 @test_f64_ugt_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
1329; P8-LABEL: test_f64_ugt_s:
1330; P8:       # %bb.0:
1331; P8-NEXT:    fcmpo cr0, f1, f2
1332; P8-NEXT:    cror 4*cr5+lt, gt, un
1333; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
1334; P8-NEXT:    blr
1335;
1336; P9-LABEL: test_f64_ugt_s:
1337; P9:       # %bb.0:
1338; P9-NEXT:    fcmpo cr0, f1, f2
1339; P9-NEXT:    cror 4*cr5+lt, gt, un
1340; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
1341; P9-NEXT:    blr
1342;
1343; NOVSX-LABEL: test_f64_ugt_s:
1344; NOVSX:       # %bb.0:
1345; NOVSX-NEXT:    fcmpo cr0, f1, f2
1346; NOVSX-NEXT:    cror 4*cr5+lt, gt, un
1347; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
1348; NOVSX-NEXT:    blr
1349  %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
1350                                               double %f1, double %f2, metadata !"ugt",
1351                                               metadata !"fpexcept.strict") #0
1352  %res = select i1 %cond, i32 %a, i32 %b
1353  ret i32 %res
1354}
1355
1356define i32 @test_f64_uge_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
1357; P8-LABEL: test_f64_uge_s:
1358; P8:       # %bb.0:
1359; P8-NEXT:    fcmpo cr0, f1, f2
1360; P8-NEXT:    isellt r3, r4, r3
1361; P8-NEXT:    blr
1362;
1363; P9-LABEL: test_f64_uge_s:
1364; P9:       # %bb.0:
1365; P9-NEXT:    fcmpo cr0, f1, f2
1366; P9-NEXT:    isellt r3, r4, r3
1367; P9-NEXT:    blr
1368;
1369; NOVSX-LABEL: test_f64_uge_s:
1370; NOVSX:       # %bb.0:
1371; NOVSX-NEXT:    fcmpo cr0, f1, f2
1372; NOVSX-NEXT:    isellt r3, r4, r3
1373; NOVSX-NEXT:    blr
1374  %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
1375                                               double %f1, double %f2, metadata !"uge",
1376                                               metadata !"fpexcept.strict") #0
1377  %res = select i1 %cond, i32 %a, i32 %b
1378  ret i32 %res
1379}
1380
1381define i32 @test_f64_ult_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
1382; P8-LABEL: test_f64_ult_s:
1383; P8:       # %bb.0:
1384; P8-NEXT:    fcmpo cr0, f1, f2
1385; P8-NEXT:    cror 4*cr5+lt, lt, un
1386; P8-NEXT:    isel r3, r3, r4, 4*cr5+lt
1387; P8-NEXT:    blr
1388;
1389; P9-LABEL: test_f64_ult_s:
1390; P9:       # %bb.0:
1391; P9-NEXT:    fcmpo cr0, f1, f2
1392; P9-NEXT:    cror 4*cr5+lt, lt, un
1393; P9-NEXT:    isel r3, r3, r4, 4*cr5+lt
1394; P9-NEXT:    blr
1395;
1396; NOVSX-LABEL: test_f64_ult_s:
1397; NOVSX:       # %bb.0:
1398; NOVSX-NEXT:    fcmpo cr0, f1, f2
1399; NOVSX-NEXT:    cror 4*cr5+lt, lt, un
1400; NOVSX-NEXT:    isel r3, r3, r4, 4*cr5+lt
1401; NOVSX-NEXT:    blr
1402  %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
1403                                               double %f1, double %f2, metadata !"ult",
1404                                               metadata !"fpexcept.strict") #0
1405  %res = select i1 %cond, i32 %a, i32 %b
1406  ret i32 %res
1407}
1408
1409define i32 @test_f64_ule_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
1410; P8-LABEL: test_f64_ule_s:
1411; P8:       # %bb.0:
1412; P8-NEXT:    fcmpo cr0, f1, f2
1413; P8-NEXT:    iselgt r3, r4, r3
1414; P8-NEXT:    blr
1415;
1416; P9-LABEL: test_f64_ule_s:
1417; P9:       # %bb.0:
1418; P9-NEXT:    fcmpo cr0, f1, f2
1419; P9-NEXT:    iselgt r3, r4, r3
1420; P9-NEXT:    blr
1421;
1422; NOVSX-LABEL: test_f64_ule_s:
1423; NOVSX:       # %bb.0:
1424; NOVSX-NEXT:    fcmpo cr0, f1, f2
1425; NOVSX-NEXT:    iselgt r3, r4, r3
1426; NOVSX-NEXT:    blr
1427  %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
1428                                               double %f1, double %f2, metadata !"ule",
1429                                               metadata !"fpexcept.strict") #0
1430  %res = select i1 %cond, i32 %a, i32 %b
1431  ret i32 %res
1432}
1433
1434define i32 @test_f64_une_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
1435; P8-LABEL: test_f64_une_s:
1436; P8:       # %bb.0:
1437; P8-NEXT:    fcmpo cr0, f1, f2
1438; P8-NEXT:    iseleq r3, r4, r3
1439; P8-NEXT:    blr
1440;
1441; P9-LABEL: test_f64_une_s:
1442; P9:       # %bb.0:
1443; P9-NEXT:    fcmpo cr0, f1, f2
1444; P9-NEXT:    iseleq r3, r4, r3
1445; P9-NEXT:    blr
1446;
1447; NOVSX-LABEL: test_f64_une_s:
1448; NOVSX:       # %bb.0:
1449; NOVSX-NEXT:    fcmpo cr0, f1, f2
1450; NOVSX-NEXT:    iseleq r3, r4, r3
1451; NOVSX-NEXT:    blr
1452  %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
1453                                               double %f1, double %f2, metadata !"une",
1454                                               metadata !"fpexcept.strict") #0
1455  %res = select i1 %cond, i32 %a, i32 %b
1456  ret i32 %res
1457}
1458
1459define i32 @test_f64_uno_s(i32 %a, i32 %b, double %f1, double %f2) #0 {
1460; P8-LABEL: test_f64_uno_s:
1461; P8:       # %bb.0:
1462; P8-NEXT:    fcmpo cr0, f1, f2
1463; P8-NEXT:    isel r3, r3, r4, un
1464; P8-NEXT:    blr
1465;
1466; P9-LABEL: test_f64_uno_s:
1467; P9:       # %bb.0:
1468; P9-NEXT:    fcmpo cr0, f1, f2
1469; P9-NEXT:    isel r3, r3, r4, un
1470; P9-NEXT:    blr
1471;
1472; NOVSX-LABEL: test_f64_uno_s:
1473; NOVSX:       # %bb.0:
1474; NOVSX-NEXT:    fcmpo cr0, f1, f2
1475; NOVSX-NEXT:    isel r3, r3, r4, un
1476; NOVSX-NEXT:    blr
1477  %cond = call i1 @llvm.experimental.constrained.fcmps.f64(
1478                                               double %f1, double %f2, metadata !"uno",
1479                                               metadata !"fpexcept.strict") #0
1480  %res = select i1 %cond, i32 %a, i32 %b
1481  ret i32 %res
1482}
1483
1484define i32 @fcmp_olt_f128(fp128 %a, fp128 %b) #0 {
1485; P8-LABEL: fcmp_olt_f128:
1486; P8:       # %bb.0:
1487; P8-NEXT:    mflr r0
1488; P8-NEXT:    stdu r1, -112(r1)
1489; P8-NEXT:    std r0, 128(r1)
1490; P8-NEXT:    bl __ltkf2
1491; P8-NEXT:    nop
1492; P8-NEXT:    rlwinm r3, r3, 1, 31, 31
1493; P8-NEXT:    addi r1, r1, 112
1494; P8-NEXT:    ld r0, 16(r1)
1495; P8-NEXT:    mtlr r0
1496; P8-NEXT:    blr
1497;
1498; P9-LABEL: fcmp_olt_f128:
1499; P9:       # %bb.0:
1500; P9-NEXT:    xscmpuqp cr0, v2, v3
1501; P9-NEXT:    li r3, 0
1502; P9-NEXT:    li r4, 1
1503; P9-NEXT:    isellt r3, r4, r3
1504; P9-NEXT:    blr
1505;
1506; NOVSX-LABEL: fcmp_olt_f128:
1507; NOVSX:       # %bb.0:
1508; NOVSX-NEXT:    mflr r0
1509; NOVSX-NEXT:    stdu r1, -32(r1)
1510; NOVSX-NEXT:    std r0, 48(r1)
1511; NOVSX-NEXT:    bl __ltkf2
1512; NOVSX-NEXT:    nop
1513; NOVSX-NEXT:    rlwinm r3, r3, 1, 31, 31
1514; NOVSX-NEXT:    addi r1, r1, 32
1515; NOVSX-NEXT:    ld r0, 16(r1)
1516; NOVSX-NEXT:    mtlr r0
1517; NOVSX-NEXT:    blr
1518  %cmp = call i1 @llvm.experimental.constrained.fcmp.f128(fp128 %a, fp128 %b, metadata !"olt", metadata !"fpexcept.strict") #0
1519  %conv = zext i1 %cmp to i32
1520  ret i32 %conv
1521}
1522
1523define i32 @fcmp_ole_f128(fp128 %a, fp128 %b) #0 {
1524; P8-LABEL: fcmp_ole_f128:
1525; P8:       # %bb.0:
1526; P8-NEXT:    mflr r0
1527; P8-NEXT:    stdu r1, -112(r1)
1528; P8-NEXT:    std r0, 128(r1)
1529; P8-NEXT:    bl __lekf2
1530; P8-NEXT:    nop
1531; P8-NEXT:    extsw r3, r3
1532; P8-NEXT:    neg r3, r3
1533; P8-NEXT:    rldicl r3, r3, 1, 63
1534; P8-NEXT:    xori r3, r3, 1
1535; P8-NEXT:    addi r1, r1, 112
1536; P8-NEXT:    ld r0, 16(r1)
1537; P8-NEXT:    mtlr r0
1538; P8-NEXT:    blr
1539;
1540; P9-LABEL: fcmp_ole_f128:
1541; P9:       # %bb.0:
1542; P9-NEXT:    xscmpuqp cr0, v2, v3
1543; P9-NEXT:    li r3, 1
1544; P9-NEXT:    cror 4*cr5+lt, un, gt
1545; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
1546; P9-NEXT:    blr
1547;
1548; NOVSX-LABEL: fcmp_ole_f128:
1549; NOVSX:       # %bb.0:
1550; NOVSX-NEXT:    mflr r0
1551; NOVSX-NEXT:    stdu r1, -32(r1)
1552; NOVSX-NEXT:    std r0, 48(r1)
1553; NOVSX-NEXT:    bl __lekf2
1554; NOVSX-NEXT:    nop
1555; NOVSX-NEXT:    extsw r3, r3
1556; NOVSX-NEXT:    neg r3, r3
1557; NOVSX-NEXT:    rldicl r3, r3, 1, 63
1558; NOVSX-NEXT:    xori r3, r3, 1
1559; NOVSX-NEXT:    addi r1, r1, 32
1560; NOVSX-NEXT:    ld r0, 16(r1)
1561; NOVSX-NEXT:    mtlr r0
1562; NOVSX-NEXT:    blr
1563  %cmp = call i1 @llvm.experimental.constrained.fcmp.f128(fp128 %a, fp128 %b, metadata !"ole", metadata !"fpexcept.strict") #0
1564  %conv = zext i1 %cmp to i32
1565  ret i32 %conv
1566}
1567
1568define i32 @fcmp_ogt_f128(fp128 %a, fp128 %b) #0 {
1569; P8-LABEL: fcmp_ogt_f128:
1570; P8:       # %bb.0:
1571; P8-NEXT:    mflr r0
1572; P8-NEXT:    stdu r1, -112(r1)
1573; P8-NEXT:    std r0, 128(r1)
1574; P8-NEXT:    bl __gtkf2
1575; P8-NEXT:    nop
1576; P8-NEXT:    extsw r3, r3
1577; P8-NEXT:    neg r3, r3
1578; P8-NEXT:    rldicl r3, r3, 1, 63
1579; P8-NEXT:    addi r1, r1, 112
1580; P8-NEXT:    ld r0, 16(r1)
1581; P8-NEXT:    mtlr r0
1582; P8-NEXT:    blr
1583;
1584; P9-LABEL: fcmp_ogt_f128:
1585; P9:       # %bb.0:
1586; P9-NEXT:    xscmpuqp cr0, v2, v3
1587; P9-NEXT:    li r3, 0
1588; P9-NEXT:    li r4, 1
1589; P9-NEXT:    iselgt r3, r4, r3
1590; P9-NEXT:    blr
1591;
1592; NOVSX-LABEL: fcmp_ogt_f128:
1593; NOVSX:       # %bb.0:
1594; NOVSX-NEXT:    mflr r0
1595; NOVSX-NEXT:    stdu r1, -32(r1)
1596; NOVSX-NEXT:    std r0, 48(r1)
1597; NOVSX-NEXT:    bl __gtkf2
1598; NOVSX-NEXT:    nop
1599; NOVSX-NEXT:    extsw r3, r3
1600; NOVSX-NEXT:    neg r3, r3
1601; NOVSX-NEXT:    rldicl r3, r3, 1, 63
1602; NOVSX-NEXT:    addi r1, r1, 32
1603; NOVSX-NEXT:    ld r0, 16(r1)
1604; NOVSX-NEXT:    mtlr r0
1605; NOVSX-NEXT:    blr
1606  %cmp = call i1 @llvm.experimental.constrained.fcmp.f128(fp128 %a, fp128 %b, metadata !"ogt", metadata !"fpexcept.strict") #0
1607  %conv = zext i1 %cmp to i32
1608  ret i32 %conv
1609}
1610
1611define i32 @fcmp_oge_f128(fp128 %a, fp128 %b) #0 {
1612; P8-LABEL: fcmp_oge_f128:
1613; P8:       # %bb.0:
1614; P8-NEXT:    mflr r0
1615; P8-NEXT:    stdu r1, -112(r1)
1616; P8-NEXT:    std r0, 128(r1)
1617; P8-NEXT:    bl __gekf2
1618; P8-NEXT:    nop
1619; P8-NEXT:    rlwinm r3, r3, 1, 31, 31
1620; P8-NEXT:    xori r3, r3, 1
1621; P8-NEXT:    addi r1, r1, 112
1622; P8-NEXT:    ld r0, 16(r1)
1623; P8-NEXT:    mtlr r0
1624; P8-NEXT:    blr
1625;
1626; P9-LABEL: fcmp_oge_f128:
1627; P9:       # %bb.0:
1628; P9-NEXT:    xscmpuqp cr0, v2, v3
1629; P9-NEXT:    li r3, 1
1630; P9-NEXT:    cror 4*cr5+lt, un, lt
1631; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
1632; P9-NEXT:    blr
1633;
1634; NOVSX-LABEL: fcmp_oge_f128:
1635; NOVSX:       # %bb.0:
1636; NOVSX-NEXT:    mflr r0
1637; NOVSX-NEXT:    stdu r1, -32(r1)
1638; NOVSX-NEXT:    std r0, 48(r1)
1639; NOVSX-NEXT:    bl __gekf2
1640; NOVSX-NEXT:    nop
1641; NOVSX-NEXT:    rlwinm r3, r3, 1, 31, 31
1642; NOVSX-NEXT:    xori r3, r3, 1
1643; NOVSX-NEXT:    addi r1, r1, 32
1644; NOVSX-NEXT:    ld r0, 16(r1)
1645; NOVSX-NEXT:    mtlr r0
1646; NOVSX-NEXT:    blr
1647  %cmp = call i1 @llvm.experimental.constrained.fcmp.f128(fp128 %a, fp128 %b, metadata !"oge", metadata !"fpexcept.strict") #0
1648  %conv = zext i1 %cmp to i32
1649  ret i32 %conv
1650}
1651
1652define i32 @fcmp_oeq_f128(fp128 %a, fp128 %b) #0 {
1653; P8-LABEL: fcmp_oeq_f128:
1654; P8:       # %bb.0:
1655; P8-NEXT:    mflr r0
1656; P8-NEXT:    stdu r1, -112(r1)
1657; P8-NEXT:    std r0, 128(r1)
1658; P8-NEXT:    bl __eqkf2
1659; P8-NEXT:    nop
1660; P8-NEXT:    cntlzw r3, r3
1661; P8-NEXT:    srwi r3, r3, 5
1662; P8-NEXT:    addi r1, r1, 112
1663; P8-NEXT:    ld r0, 16(r1)
1664; P8-NEXT:    mtlr r0
1665; P8-NEXT:    blr
1666;
1667; P9-LABEL: fcmp_oeq_f128:
1668; P9:       # %bb.0:
1669; P9-NEXT:    xscmpuqp cr0, v2, v3
1670; P9-NEXT:    li r3, 0
1671; P9-NEXT:    li r4, 1
1672; P9-NEXT:    iseleq r3, r4, r3
1673; P9-NEXT:    blr
1674;
1675; NOVSX-LABEL: fcmp_oeq_f128:
1676; NOVSX:       # %bb.0:
1677; NOVSX-NEXT:    mflr r0
1678; NOVSX-NEXT:    stdu r1, -32(r1)
1679; NOVSX-NEXT:    std r0, 48(r1)
1680; NOVSX-NEXT:    bl __eqkf2
1681; NOVSX-NEXT:    nop
1682; NOVSX-NEXT:    cntlzw r3, r3
1683; NOVSX-NEXT:    srwi r3, r3, 5
1684; NOVSX-NEXT:    addi r1, r1, 32
1685; NOVSX-NEXT:    ld r0, 16(r1)
1686; NOVSX-NEXT:    mtlr r0
1687; NOVSX-NEXT:    blr
1688  %cmp = call i1 @llvm.experimental.constrained.fcmp.f128(fp128 %a, fp128 %b, metadata !"oeq", metadata !"fpexcept.strict") #0
1689  %conv = zext i1 %cmp to i32
1690  ret i32 %conv
1691}
1692
1693define i32 @fcmp_one_f128(fp128 %a, fp128 %b) #0 {
1694; P8-LABEL: fcmp_one_f128:
1695; P8:       # %bb.0:
1696; P8-NEXT:    mflr r0
1697; P8-NEXT:    stdu r1, -176(r1)
1698; P8-NEXT:    li r3, 128
1699; P8-NEXT:    std r0, 192(r1)
1700; P8-NEXT:    std r30, 160(r1) # 8-byte Folded Spill
1701; P8-NEXT:    stxvd2x v30, r1, r3 # 16-byte Folded Spill
1702; P8-NEXT:    li r3, 144
1703; P8-NEXT:    vmr v30, v2
1704; P8-NEXT:    stxvd2x v31, r1, r3 # 16-byte Folded Spill
1705; P8-NEXT:    vmr v31, v3
1706; P8-NEXT:    bl __unordkf2
1707; P8-NEXT:    nop
1708; P8-NEXT:    cntlzw r3, r3
1709; P8-NEXT:    vmr v2, v30
1710; P8-NEXT:    vmr v3, v31
1711; P8-NEXT:    srwi r30, r3, 5
1712; P8-NEXT:    bl __eqkf2
1713; P8-NEXT:    nop
1714; P8-NEXT:    cntlzw r3, r3
1715; P8-NEXT:    li r4, 144
1716; P8-NEXT:    lxvd2x v31, r1, r4 # 16-byte Folded Reload
1717; P8-NEXT:    li r4, 128
1718; P8-NEXT:    srwi r3, r3, 5
1719; P8-NEXT:    lxvd2x v30, r1, r4 # 16-byte Folded Reload
1720; P8-NEXT:    xori r3, r3, 1
1721; P8-NEXT:    and r3, r30, r3
1722; P8-NEXT:    ld r30, 160(r1) # 8-byte Folded Reload
1723; P8-NEXT:    addi r1, r1, 176
1724; P8-NEXT:    ld r0, 16(r1)
1725; P8-NEXT:    mtlr r0
1726; P8-NEXT:    blr
1727;
1728; P9-LABEL: fcmp_one_f128:
1729; P9:       # %bb.0:
1730; P9-NEXT:    xscmpuqp cr0, v2, v3
1731; P9-NEXT:    li r3, 1
1732; P9-NEXT:    cror 4*cr5+lt, un, eq
1733; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
1734; P9-NEXT:    blr
1735;
1736; NOVSX-LABEL: fcmp_one_f128:
1737; NOVSX:       # %bb.0:
1738; NOVSX-NEXT:    mflr r0
1739; NOVSX-NEXT:    std r26, -48(r1) # 8-byte Folded Spill
1740; NOVSX-NEXT:    std r27, -40(r1) # 8-byte Folded Spill
1741; NOVSX-NEXT:    std r28, -32(r1) # 8-byte Folded Spill
1742; NOVSX-NEXT:    std r29, -24(r1) # 8-byte Folded Spill
1743; NOVSX-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
1744; NOVSX-NEXT:    stdu r1, -80(r1)
1745; NOVSX-NEXT:    std r0, 96(r1)
1746; NOVSX-NEXT:    mr r30, r6
1747; NOVSX-NEXT:    mr r29, r5
1748; NOVSX-NEXT:    mr r28, r4
1749; NOVSX-NEXT:    mr r27, r3
1750; NOVSX-NEXT:    bl __unordkf2
1751; NOVSX-NEXT:    nop
1752; NOVSX-NEXT:    cntlzw r3, r3
1753; NOVSX-NEXT:    mr r4, r28
1754; NOVSX-NEXT:    mr r5, r29
1755; NOVSX-NEXT:    mr r6, r30
1756; NOVSX-NEXT:    srwi r26, r3, 5
1757; NOVSX-NEXT:    mr r3, r27
1758; NOVSX-NEXT:    bl __eqkf2
1759; NOVSX-NEXT:    nop
1760; NOVSX-NEXT:    cntlzw r3, r3
1761; NOVSX-NEXT:    srwi r3, r3, 5
1762; NOVSX-NEXT:    xori r3, r3, 1
1763; NOVSX-NEXT:    and r3, r26, r3
1764; NOVSX-NEXT:    addi r1, r1, 80
1765; NOVSX-NEXT:    ld r0, 16(r1)
1766; NOVSX-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
1767; NOVSX-NEXT:    ld r29, -24(r1) # 8-byte Folded Reload
1768; NOVSX-NEXT:    ld r28, -32(r1) # 8-byte Folded Reload
1769; NOVSX-NEXT:    ld r27, -40(r1) # 8-byte Folded Reload
1770; NOVSX-NEXT:    ld r26, -48(r1) # 8-byte Folded Reload
1771; NOVSX-NEXT:    mtlr r0
1772; NOVSX-NEXT:    blr
1773  %cmp = call i1 @llvm.experimental.constrained.fcmp.f128(fp128 %a, fp128 %b, metadata !"one", metadata !"fpexcept.strict") #0
1774  %conv = zext i1 %cmp to i32
1775  ret i32 %conv
1776}
1777
1778define i32 @fcmp_ult_f128(fp128 %a, fp128 %b) #0 {
1779; P8-LABEL: fcmp_ult_f128:
1780; P8:       # %bb.0:
1781; P8-NEXT:    mflr r0
1782; P8-NEXT:    stdu r1, -112(r1)
1783; P8-NEXT:    std r0, 128(r1)
1784; P8-NEXT:    bl __gekf2
1785; P8-NEXT:    nop
1786; P8-NEXT:    rlwinm r3, r3, 1, 31, 31
1787; P8-NEXT:    addi r1, r1, 112
1788; P8-NEXT:    ld r0, 16(r1)
1789; P8-NEXT:    mtlr r0
1790; P8-NEXT:    blr
1791;
1792; P9-LABEL: fcmp_ult_f128:
1793; P9:       # %bb.0:
1794; P9-NEXT:    xscmpuqp cr0, v2, v3
1795; P9-NEXT:    li r3, 1
1796; P9-NEXT:    crnor 4*cr5+lt, lt, un
1797; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
1798; P9-NEXT:    blr
1799;
1800; NOVSX-LABEL: fcmp_ult_f128:
1801; NOVSX:       # %bb.0:
1802; NOVSX-NEXT:    mflr r0
1803; NOVSX-NEXT:    stdu r1, -32(r1)
1804; NOVSX-NEXT:    std r0, 48(r1)
1805; NOVSX-NEXT:    bl __gekf2
1806; NOVSX-NEXT:    nop
1807; NOVSX-NEXT:    rlwinm r3, r3, 1, 31, 31
1808; NOVSX-NEXT:    addi r1, r1, 32
1809; NOVSX-NEXT:    ld r0, 16(r1)
1810; NOVSX-NEXT:    mtlr r0
1811; NOVSX-NEXT:    blr
1812  %cmp = call i1 @llvm.experimental.constrained.fcmp.f128(fp128 %a, fp128 %b, metadata !"ult", metadata !"fpexcept.strict") #0
1813  %conv = zext i1 %cmp to i32
1814  ret i32 %conv
1815}
1816
1817define i32 @fcmp_ule_f128(fp128 %a, fp128 %b) #0 {
1818; P8-LABEL: fcmp_ule_f128:
1819; P8:       # %bb.0:
1820; P8-NEXT:    mflr r0
1821; P8-NEXT:    stdu r1, -112(r1)
1822; P8-NEXT:    std r0, 128(r1)
1823; P8-NEXT:    bl __gtkf2
1824; P8-NEXT:    nop
1825; P8-NEXT:    extsw r3, r3
1826; P8-NEXT:    neg r3, r3
1827; P8-NEXT:    rldicl r3, r3, 1, 63
1828; P8-NEXT:    xori r3, r3, 1
1829; P8-NEXT:    addi r1, r1, 112
1830; P8-NEXT:    ld r0, 16(r1)
1831; P8-NEXT:    mtlr r0
1832; P8-NEXT:    blr
1833;
1834; P9-LABEL: fcmp_ule_f128:
1835; P9:       # %bb.0:
1836; P9-NEXT:    xscmpuqp cr0, v2, v3
1837; P9-NEXT:    li r3, 1
1838; P9-NEXT:    iselgt r3, 0, r3
1839; P9-NEXT:    blr
1840;
1841; NOVSX-LABEL: fcmp_ule_f128:
1842; NOVSX:       # %bb.0:
1843; NOVSX-NEXT:    mflr r0
1844; NOVSX-NEXT:    stdu r1, -32(r1)
1845; NOVSX-NEXT:    std r0, 48(r1)
1846; NOVSX-NEXT:    bl __gtkf2
1847; NOVSX-NEXT:    nop
1848; NOVSX-NEXT:    extsw r3, r3
1849; NOVSX-NEXT:    neg r3, r3
1850; NOVSX-NEXT:    rldicl r3, r3, 1, 63
1851; NOVSX-NEXT:    xori r3, r3, 1
1852; NOVSX-NEXT:    addi r1, r1, 32
1853; NOVSX-NEXT:    ld r0, 16(r1)
1854; NOVSX-NEXT:    mtlr r0
1855; NOVSX-NEXT:    blr
1856  %cmp = call i1 @llvm.experimental.constrained.fcmp.f128(fp128 %a, fp128 %b, metadata !"ule", metadata !"fpexcept.strict") #0
1857  %conv = zext i1 %cmp to i32
1858  ret i32 %conv
1859}
1860
1861define i32 @fcmp_ugt_f128(fp128 %a, fp128 %b) #0 {
1862; P8-LABEL: fcmp_ugt_f128:
1863; P8:       # %bb.0:
1864; P8-NEXT:    mflr r0
1865; P8-NEXT:    stdu r1, -112(r1)
1866; P8-NEXT:    std r0, 128(r1)
1867; P8-NEXT:    bl __lekf2
1868; P8-NEXT:    nop
1869; P8-NEXT:    extsw r3, r3
1870; P8-NEXT:    neg r3, r3
1871; P8-NEXT:    rldicl r3, r3, 1, 63
1872; P8-NEXT:    addi r1, r1, 112
1873; P8-NEXT:    ld r0, 16(r1)
1874; P8-NEXT:    mtlr r0
1875; P8-NEXT:    blr
1876;
1877; P9-LABEL: fcmp_ugt_f128:
1878; P9:       # %bb.0:
1879; P9-NEXT:    xscmpuqp cr0, v2, v3
1880; P9-NEXT:    li r3, 1
1881; P9-NEXT:    crnor 4*cr5+lt, gt, un
1882; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
1883; P9-NEXT:    blr
1884;
1885; NOVSX-LABEL: fcmp_ugt_f128:
1886; NOVSX:       # %bb.0:
1887; NOVSX-NEXT:    mflr r0
1888; NOVSX-NEXT:    stdu r1, -32(r1)
1889; NOVSX-NEXT:    std r0, 48(r1)
1890; NOVSX-NEXT:    bl __lekf2
1891; NOVSX-NEXT:    nop
1892; NOVSX-NEXT:    extsw r3, r3
1893; NOVSX-NEXT:    neg r3, r3
1894; NOVSX-NEXT:    rldicl r3, r3, 1, 63
1895; NOVSX-NEXT:    addi r1, r1, 32
1896; NOVSX-NEXT:    ld r0, 16(r1)
1897; NOVSX-NEXT:    mtlr r0
1898; NOVSX-NEXT:    blr
1899  %cmp = call i1 @llvm.experimental.constrained.fcmp.f128(fp128 %a, fp128 %b, metadata !"ugt", metadata !"fpexcept.strict") #0
1900  %conv = zext i1 %cmp to i32
1901  ret i32 %conv
1902}
1903
1904define i32 @fcmp_uge_f128(fp128 %a, fp128 %b) #0 {
1905; P8-LABEL: fcmp_uge_f128:
1906; P8:       # %bb.0:
1907; P8-NEXT:    mflr r0
1908; P8-NEXT:    stdu r1, -112(r1)
1909; P8-NEXT:    std r0, 128(r1)
1910; P8-NEXT:    bl __ltkf2
1911; P8-NEXT:    nop
1912; P8-NEXT:    rlwinm r3, r3, 1, 31, 31
1913; P8-NEXT:    xori r3, r3, 1
1914; P8-NEXT:    addi r1, r1, 112
1915; P8-NEXT:    ld r0, 16(r1)
1916; P8-NEXT:    mtlr r0
1917; P8-NEXT:    blr
1918;
1919; P9-LABEL: fcmp_uge_f128:
1920; P9:       # %bb.0:
1921; P9-NEXT:    xscmpuqp cr0, v2, v3
1922; P9-NEXT:    li r3, 1
1923; P9-NEXT:    isellt r3, 0, r3
1924; P9-NEXT:    blr
1925;
1926; NOVSX-LABEL: fcmp_uge_f128:
1927; NOVSX:       # %bb.0:
1928; NOVSX-NEXT:    mflr r0
1929; NOVSX-NEXT:    stdu r1, -32(r1)
1930; NOVSX-NEXT:    std r0, 48(r1)
1931; NOVSX-NEXT:    bl __ltkf2
1932; NOVSX-NEXT:    nop
1933; NOVSX-NEXT:    rlwinm r3, r3, 1, 31, 31
1934; NOVSX-NEXT:    xori r3, r3, 1
1935; NOVSX-NEXT:    addi r1, r1, 32
1936; NOVSX-NEXT:    ld r0, 16(r1)
1937; NOVSX-NEXT:    mtlr r0
1938; NOVSX-NEXT:    blr
1939  %cmp = call i1 @llvm.experimental.constrained.fcmp.f128(fp128 %a, fp128 %b, metadata !"uge", metadata !"fpexcept.strict") #0
1940  %conv = zext i1 %cmp to i32
1941  ret i32 %conv
1942}
1943
1944define i32 @fcmp_ueq_f128(fp128 %a, fp128 %b) #0 {
1945; P8-LABEL: fcmp_ueq_f128:
1946; P8:       # %bb.0:
1947; P8-NEXT:    mflr r0
1948; P8-NEXT:    stdu r1, -176(r1)
1949; P8-NEXT:    li r3, 128
1950; P8-NEXT:    std r0, 192(r1)
1951; P8-NEXT:    std r30, 160(r1) # 8-byte Folded Spill
1952; P8-NEXT:    stxvd2x v30, r1, r3 # 16-byte Folded Spill
1953; P8-NEXT:    li r3, 144
1954; P8-NEXT:    vmr v30, v2
1955; P8-NEXT:    stxvd2x v31, r1, r3 # 16-byte Folded Spill
1956; P8-NEXT:    vmr v31, v3
1957; P8-NEXT:    bl __eqkf2
1958; P8-NEXT:    nop
1959; P8-NEXT:    cntlzw r3, r3
1960; P8-NEXT:    vmr v2, v30
1961; P8-NEXT:    vmr v3, v31
1962; P8-NEXT:    srwi r30, r3, 5
1963; P8-NEXT:    bl __unordkf2
1964; P8-NEXT:    nop
1965; P8-NEXT:    cntlzw r3, r3
1966; P8-NEXT:    li r4, 144
1967; P8-NEXT:    lxvd2x v31, r1, r4 # 16-byte Folded Reload
1968; P8-NEXT:    li r4, 128
1969; P8-NEXT:    srwi r3, r3, 5
1970; P8-NEXT:    lxvd2x v30, r1, r4 # 16-byte Folded Reload
1971; P8-NEXT:    xori r3, r3, 1
1972; P8-NEXT:    or r3, r3, r30
1973; P8-NEXT:    ld r30, 160(r1) # 8-byte Folded Reload
1974; P8-NEXT:    addi r1, r1, 176
1975; P8-NEXT:    ld r0, 16(r1)
1976; P8-NEXT:    mtlr r0
1977; P8-NEXT:    blr
1978;
1979; P9-LABEL: fcmp_ueq_f128:
1980; P9:       # %bb.0:
1981; P9-NEXT:    xscmpuqp cr0, v2, v3
1982; P9-NEXT:    li r3, 1
1983; P9-NEXT:    crnor 4*cr5+lt, eq, un
1984; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
1985; P9-NEXT:    blr
1986;
1987; NOVSX-LABEL: fcmp_ueq_f128:
1988; NOVSX:       # %bb.0:
1989; NOVSX-NEXT:    mflr r0
1990; NOVSX-NEXT:    std r26, -48(r1) # 8-byte Folded Spill
1991; NOVSX-NEXT:    std r27, -40(r1) # 8-byte Folded Spill
1992; NOVSX-NEXT:    std r28, -32(r1) # 8-byte Folded Spill
1993; NOVSX-NEXT:    std r29, -24(r1) # 8-byte Folded Spill
1994; NOVSX-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
1995; NOVSX-NEXT:    stdu r1, -80(r1)
1996; NOVSX-NEXT:    std r0, 96(r1)
1997; NOVSX-NEXT:    mr r30, r6
1998; NOVSX-NEXT:    mr r29, r5
1999; NOVSX-NEXT:    mr r28, r4
2000; NOVSX-NEXT:    mr r27, r3
2001; NOVSX-NEXT:    bl __eqkf2
2002; NOVSX-NEXT:    nop
2003; NOVSX-NEXT:    cntlzw r3, r3
2004; NOVSX-NEXT:    mr r4, r28
2005; NOVSX-NEXT:    mr r5, r29
2006; NOVSX-NEXT:    mr r6, r30
2007; NOVSX-NEXT:    srwi r26, r3, 5
2008; NOVSX-NEXT:    mr r3, r27
2009; NOVSX-NEXT:    bl __unordkf2
2010; NOVSX-NEXT:    nop
2011; NOVSX-NEXT:    cntlzw r3, r3
2012; NOVSX-NEXT:    srwi r3, r3, 5
2013; NOVSX-NEXT:    xori r3, r3, 1
2014; NOVSX-NEXT:    or r3, r3, r26
2015; NOVSX-NEXT:    addi r1, r1, 80
2016; NOVSX-NEXT:    ld r0, 16(r1)
2017; NOVSX-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
2018; NOVSX-NEXT:    ld r29, -24(r1) # 8-byte Folded Reload
2019; NOVSX-NEXT:    ld r28, -32(r1) # 8-byte Folded Reload
2020; NOVSX-NEXT:    ld r27, -40(r1) # 8-byte Folded Reload
2021; NOVSX-NEXT:    ld r26, -48(r1) # 8-byte Folded Reload
2022; NOVSX-NEXT:    mtlr r0
2023; NOVSX-NEXT:    blr
2024  %cmp = call i1 @llvm.experimental.constrained.fcmp.f128(fp128 %a, fp128 %b, metadata !"ueq", metadata !"fpexcept.strict") #0
2025  %conv = zext i1 %cmp to i32
2026  ret i32 %conv
2027}
2028
2029define i32 @fcmp_une_f128(fp128 %a, fp128 %b) #0 {
2030; P8-LABEL: fcmp_une_f128:
2031; P8:       # %bb.0:
2032; P8-NEXT:    mflr r0
2033; P8-NEXT:    stdu r1, -112(r1)
2034; P8-NEXT:    std r0, 128(r1)
2035; P8-NEXT:    bl __nekf2
2036; P8-NEXT:    nop
2037; P8-NEXT:    cntlzw r3, r3
2038; P8-NEXT:    srwi r3, r3, 5
2039; P8-NEXT:    xori r3, r3, 1
2040; P8-NEXT:    addi r1, r1, 112
2041; P8-NEXT:    ld r0, 16(r1)
2042; P8-NEXT:    mtlr r0
2043; P8-NEXT:    blr
2044;
2045; P9-LABEL: fcmp_une_f128:
2046; P9:       # %bb.0:
2047; P9-NEXT:    xscmpuqp cr0, v2, v3
2048; P9-NEXT:    li r3, 1
2049; P9-NEXT:    iseleq r3, 0, r3
2050; P9-NEXT:    blr
2051;
2052; NOVSX-LABEL: fcmp_une_f128:
2053; NOVSX:       # %bb.0:
2054; NOVSX-NEXT:    mflr r0
2055; NOVSX-NEXT:    stdu r1, -32(r1)
2056; NOVSX-NEXT:    std r0, 48(r1)
2057; NOVSX-NEXT:    bl __nekf2
2058; NOVSX-NEXT:    nop
2059; NOVSX-NEXT:    cntlzw r3, r3
2060; NOVSX-NEXT:    srwi r3, r3, 5
2061; NOVSX-NEXT:    xori r3, r3, 1
2062; NOVSX-NEXT:    addi r1, r1, 32
2063; NOVSX-NEXT:    ld r0, 16(r1)
2064; NOVSX-NEXT:    mtlr r0
2065; NOVSX-NEXT:    blr
2066  %cmp = call i1 @llvm.experimental.constrained.fcmp.f128(fp128 %a, fp128 %b, metadata !"une", metadata !"fpexcept.strict") #0
2067  %conv = zext i1 %cmp to i32
2068  ret i32 %conv
2069}
2070
2071define i32 @fcmps_olt_f128(fp128 %a, fp128 %b) #0 {
2072; P8-LABEL: fcmps_olt_f128:
2073; P8:       # %bb.0:
2074; P8-NEXT:    mflr r0
2075; P8-NEXT:    stdu r1, -112(r1)
2076; P8-NEXT:    std r0, 128(r1)
2077; P8-NEXT:    bl __ltkf2
2078; P8-NEXT:    nop
2079; P8-NEXT:    rlwinm r3, r3, 1, 31, 31
2080; P8-NEXT:    addi r1, r1, 112
2081; P8-NEXT:    ld r0, 16(r1)
2082; P8-NEXT:    mtlr r0
2083; P8-NEXT:    blr
2084;
2085; P9-LABEL: fcmps_olt_f128:
2086; P9:       # %bb.0:
2087; P9-NEXT:    xscmpoqp cr0, v2, v3
2088; P9-NEXT:    li r3, 0
2089; P9-NEXT:    li r4, 1
2090; P9-NEXT:    isellt r3, r4, r3
2091; P9-NEXT:    blr
2092;
2093; NOVSX-LABEL: fcmps_olt_f128:
2094; NOVSX:       # %bb.0:
2095; NOVSX-NEXT:    mflr r0
2096; NOVSX-NEXT:    stdu r1, -32(r1)
2097; NOVSX-NEXT:    std r0, 48(r1)
2098; NOVSX-NEXT:    bl __ltkf2
2099; NOVSX-NEXT:    nop
2100; NOVSX-NEXT:    rlwinm r3, r3, 1, 31, 31
2101; NOVSX-NEXT:    addi r1, r1, 32
2102; NOVSX-NEXT:    ld r0, 16(r1)
2103; NOVSX-NEXT:    mtlr r0
2104; NOVSX-NEXT:    blr
2105  %cmp = call i1 @llvm.experimental.constrained.fcmps.f128(fp128 %a, fp128 %b, metadata !"olt", metadata !"fpexcept.strict") #0
2106  %conv = zext i1 %cmp to i32
2107  ret i32 %conv
2108}
2109
2110define i32 @fcmps_ole_f128(fp128 %a, fp128 %b) #0 {
2111; P8-LABEL: fcmps_ole_f128:
2112; P8:       # %bb.0:
2113; P8-NEXT:    mflr r0
2114; P8-NEXT:    stdu r1, -112(r1)
2115; P8-NEXT:    std r0, 128(r1)
2116; P8-NEXT:    bl __lekf2
2117; P8-NEXT:    nop
2118; P8-NEXT:    extsw r3, r3
2119; P8-NEXT:    neg r3, r3
2120; P8-NEXT:    rldicl r3, r3, 1, 63
2121; P8-NEXT:    xori r3, r3, 1
2122; P8-NEXT:    addi r1, r1, 112
2123; P8-NEXT:    ld r0, 16(r1)
2124; P8-NEXT:    mtlr r0
2125; P8-NEXT:    blr
2126;
2127; P9-LABEL: fcmps_ole_f128:
2128; P9:       # %bb.0:
2129; P9-NEXT:    xscmpoqp cr0, v2, v3
2130; P9-NEXT:    li r3, 1
2131; P9-NEXT:    cror 4*cr5+lt, un, gt
2132; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
2133; P9-NEXT:    blr
2134;
2135; NOVSX-LABEL: fcmps_ole_f128:
2136; NOVSX:       # %bb.0:
2137; NOVSX-NEXT:    mflr r0
2138; NOVSX-NEXT:    stdu r1, -32(r1)
2139; NOVSX-NEXT:    std r0, 48(r1)
2140; NOVSX-NEXT:    bl __lekf2
2141; NOVSX-NEXT:    nop
2142; NOVSX-NEXT:    extsw r3, r3
2143; NOVSX-NEXT:    neg r3, r3
2144; NOVSX-NEXT:    rldicl r3, r3, 1, 63
2145; NOVSX-NEXT:    xori r3, r3, 1
2146; NOVSX-NEXT:    addi r1, r1, 32
2147; NOVSX-NEXT:    ld r0, 16(r1)
2148; NOVSX-NEXT:    mtlr r0
2149; NOVSX-NEXT:    blr
2150  %cmp = call i1 @llvm.experimental.constrained.fcmps.f128(fp128 %a, fp128 %b, metadata !"ole", metadata !"fpexcept.strict") #0
2151  %conv = zext i1 %cmp to i32
2152  ret i32 %conv
2153}
2154
2155define i32 @fcmps_ogt_f128(fp128 %a, fp128 %b) #0 {
2156; P8-LABEL: fcmps_ogt_f128:
2157; P8:       # %bb.0:
2158; P8-NEXT:    mflr r0
2159; P8-NEXT:    stdu r1, -112(r1)
2160; P8-NEXT:    std r0, 128(r1)
2161; P8-NEXT:    bl __gtkf2
2162; P8-NEXT:    nop
2163; P8-NEXT:    extsw r3, r3
2164; P8-NEXT:    neg r3, r3
2165; P8-NEXT:    rldicl r3, r3, 1, 63
2166; P8-NEXT:    addi r1, r1, 112
2167; P8-NEXT:    ld r0, 16(r1)
2168; P8-NEXT:    mtlr r0
2169; P8-NEXT:    blr
2170;
2171; P9-LABEL: fcmps_ogt_f128:
2172; P9:       # %bb.0:
2173; P9-NEXT:    xscmpoqp cr0, v2, v3
2174; P9-NEXT:    li r3, 0
2175; P9-NEXT:    li r4, 1
2176; P9-NEXT:    iselgt r3, r4, r3
2177; P9-NEXT:    blr
2178;
2179; NOVSX-LABEL: fcmps_ogt_f128:
2180; NOVSX:       # %bb.0:
2181; NOVSX-NEXT:    mflr r0
2182; NOVSX-NEXT:    stdu r1, -32(r1)
2183; NOVSX-NEXT:    std r0, 48(r1)
2184; NOVSX-NEXT:    bl __gtkf2
2185; NOVSX-NEXT:    nop
2186; NOVSX-NEXT:    extsw r3, r3
2187; NOVSX-NEXT:    neg r3, r3
2188; NOVSX-NEXT:    rldicl r3, r3, 1, 63
2189; NOVSX-NEXT:    addi r1, r1, 32
2190; NOVSX-NEXT:    ld r0, 16(r1)
2191; NOVSX-NEXT:    mtlr r0
2192; NOVSX-NEXT:    blr
2193  %cmp = call i1 @llvm.experimental.constrained.fcmps.f128(fp128 %a, fp128 %b, metadata !"ogt", metadata !"fpexcept.strict") #0
2194  %conv = zext i1 %cmp to i32
2195  ret i32 %conv
2196}
2197
2198define i32 @fcmps_oge_f128(fp128 %a, fp128 %b) #0 {
2199; P8-LABEL: fcmps_oge_f128:
2200; P8:       # %bb.0:
2201; P8-NEXT:    mflr r0
2202; P8-NEXT:    stdu r1, -112(r1)
2203; P8-NEXT:    std r0, 128(r1)
2204; P8-NEXT:    bl __gekf2
2205; P8-NEXT:    nop
2206; P8-NEXT:    rlwinm r3, r3, 1, 31, 31
2207; P8-NEXT:    xori r3, r3, 1
2208; P8-NEXT:    addi r1, r1, 112
2209; P8-NEXT:    ld r0, 16(r1)
2210; P8-NEXT:    mtlr r0
2211; P8-NEXT:    blr
2212;
2213; P9-LABEL: fcmps_oge_f128:
2214; P9:       # %bb.0:
2215; P9-NEXT:    xscmpoqp cr0, v2, v3
2216; P9-NEXT:    li r3, 1
2217; P9-NEXT:    cror 4*cr5+lt, un, lt
2218; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
2219; P9-NEXT:    blr
2220;
2221; NOVSX-LABEL: fcmps_oge_f128:
2222; NOVSX:       # %bb.0:
2223; NOVSX-NEXT:    mflr r0
2224; NOVSX-NEXT:    stdu r1, -32(r1)
2225; NOVSX-NEXT:    std r0, 48(r1)
2226; NOVSX-NEXT:    bl __gekf2
2227; NOVSX-NEXT:    nop
2228; NOVSX-NEXT:    rlwinm r3, r3, 1, 31, 31
2229; NOVSX-NEXT:    xori r3, r3, 1
2230; NOVSX-NEXT:    addi r1, r1, 32
2231; NOVSX-NEXT:    ld r0, 16(r1)
2232; NOVSX-NEXT:    mtlr r0
2233; NOVSX-NEXT:    blr
2234  %cmp = call i1 @llvm.experimental.constrained.fcmps.f128(fp128 %a, fp128 %b, metadata !"oge", metadata !"fpexcept.strict") #0
2235  %conv = zext i1 %cmp to i32
2236  ret i32 %conv
2237}
2238
2239define i32 @fcmps_oeq_f128(fp128 %a, fp128 %b) #0 {
2240; P8-LABEL: fcmps_oeq_f128:
2241; P8:       # %bb.0:
2242; P8-NEXT:    mflr r0
2243; P8-NEXT:    stdu r1, -112(r1)
2244; P8-NEXT:    std r0, 128(r1)
2245; P8-NEXT:    bl __eqkf2
2246; P8-NEXT:    nop
2247; P8-NEXT:    cntlzw r3, r3
2248; P8-NEXT:    srwi r3, r3, 5
2249; P8-NEXT:    addi r1, r1, 112
2250; P8-NEXT:    ld r0, 16(r1)
2251; P8-NEXT:    mtlr r0
2252; P8-NEXT:    blr
2253;
2254; P9-LABEL: fcmps_oeq_f128:
2255; P9:       # %bb.0:
2256; P9-NEXT:    xscmpoqp cr0, v2, v3
2257; P9-NEXT:    li r3, 0
2258; P9-NEXT:    li r4, 1
2259; P9-NEXT:    iseleq r3, r4, r3
2260; P9-NEXT:    blr
2261;
2262; NOVSX-LABEL: fcmps_oeq_f128:
2263; NOVSX:       # %bb.0:
2264; NOVSX-NEXT:    mflr r0
2265; NOVSX-NEXT:    stdu r1, -32(r1)
2266; NOVSX-NEXT:    std r0, 48(r1)
2267; NOVSX-NEXT:    bl __eqkf2
2268; NOVSX-NEXT:    nop
2269; NOVSX-NEXT:    cntlzw r3, r3
2270; NOVSX-NEXT:    srwi r3, r3, 5
2271; NOVSX-NEXT:    addi r1, r1, 32
2272; NOVSX-NEXT:    ld r0, 16(r1)
2273; NOVSX-NEXT:    mtlr r0
2274; NOVSX-NEXT:    blr
2275  %cmp = call i1 @llvm.experimental.constrained.fcmps.f128(fp128 %a, fp128 %b, metadata !"oeq", metadata !"fpexcept.strict") #0
2276  %conv = zext i1 %cmp to i32
2277  ret i32 %conv
2278}
2279
2280define i32 @fcmps_one_f128(fp128 %a, fp128 %b) #0 {
2281; P8-LABEL: fcmps_one_f128:
2282; P8:       # %bb.0:
2283; P8-NEXT:    mflr r0
2284; P8-NEXT:    stdu r1, -176(r1)
2285; P8-NEXT:    li r3, 128
2286; P8-NEXT:    std r0, 192(r1)
2287; P8-NEXT:    std r30, 160(r1) # 8-byte Folded Spill
2288; P8-NEXT:    stxvd2x v30, r1, r3 # 16-byte Folded Spill
2289; P8-NEXT:    li r3, 144
2290; P8-NEXT:    vmr v30, v2
2291; P8-NEXT:    stxvd2x v31, r1, r3 # 16-byte Folded Spill
2292; P8-NEXT:    vmr v31, v3
2293; P8-NEXT:    bl __unordkf2
2294; P8-NEXT:    nop
2295; P8-NEXT:    cntlzw r3, r3
2296; P8-NEXT:    vmr v2, v30
2297; P8-NEXT:    vmr v3, v31
2298; P8-NEXT:    srwi r30, r3, 5
2299; P8-NEXT:    bl __eqkf2
2300; P8-NEXT:    nop
2301; P8-NEXT:    cntlzw r3, r3
2302; P8-NEXT:    li r4, 144
2303; P8-NEXT:    lxvd2x v31, r1, r4 # 16-byte Folded Reload
2304; P8-NEXT:    li r4, 128
2305; P8-NEXT:    srwi r3, r3, 5
2306; P8-NEXT:    lxvd2x v30, r1, r4 # 16-byte Folded Reload
2307; P8-NEXT:    xori r3, r3, 1
2308; P8-NEXT:    and r3, r30, r3
2309; P8-NEXT:    ld r30, 160(r1) # 8-byte Folded Reload
2310; P8-NEXT:    addi r1, r1, 176
2311; P8-NEXT:    ld r0, 16(r1)
2312; P8-NEXT:    mtlr r0
2313; P8-NEXT:    blr
2314;
2315; P9-LABEL: fcmps_one_f128:
2316; P9:       # %bb.0:
2317; P9-NEXT:    xscmpoqp cr0, v2, v3
2318; P9-NEXT:    li r3, 1
2319; P9-NEXT:    cror 4*cr5+lt, un, eq
2320; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
2321; P9-NEXT:    blr
2322;
2323; NOVSX-LABEL: fcmps_one_f128:
2324; NOVSX:       # %bb.0:
2325; NOVSX-NEXT:    mflr r0
2326; NOVSX-NEXT:    std r26, -48(r1) # 8-byte Folded Spill
2327; NOVSX-NEXT:    std r27, -40(r1) # 8-byte Folded Spill
2328; NOVSX-NEXT:    std r28, -32(r1) # 8-byte Folded Spill
2329; NOVSX-NEXT:    std r29, -24(r1) # 8-byte Folded Spill
2330; NOVSX-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
2331; NOVSX-NEXT:    stdu r1, -80(r1)
2332; NOVSX-NEXT:    std r0, 96(r1)
2333; NOVSX-NEXT:    mr r30, r6
2334; NOVSX-NEXT:    mr r29, r5
2335; NOVSX-NEXT:    mr r28, r4
2336; NOVSX-NEXT:    mr r27, r3
2337; NOVSX-NEXT:    bl __unordkf2
2338; NOVSX-NEXT:    nop
2339; NOVSX-NEXT:    cntlzw r3, r3
2340; NOVSX-NEXT:    mr r4, r28
2341; NOVSX-NEXT:    mr r5, r29
2342; NOVSX-NEXT:    mr r6, r30
2343; NOVSX-NEXT:    srwi r26, r3, 5
2344; NOVSX-NEXT:    mr r3, r27
2345; NOVSX-NEXT:    bl __eqkf2
2346; NOVSX-NEXT:    nop
2347; NOVSX-NEXT:    cntlzw r3, r3
2348; NOVSX-NEXT:    srwi r3, r3, 5
2349; NOVSX-NEXT:    xori r3, r3, 1
2350; NOVSX-NEXT:    and r3, r26, r3
2351; NOVSX-NEXT:    addi r1, r1, 80
2352; NOVSX-NEXT:    ld r0, 16(r1)
2353; NOVSX-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
2354; NOVSX-NEXT:    ld r29, -24(r1) # 8-byte Folded Reload
2355; NOVSX-NEXT:    ld r28, -32(r1) # 8-byte Folded Reload
2356; NOVSX-NEXT:    ld r27, -40(r1) # 8-byte Folded Reload
2357; NOVSX-NEXT:    ld r26, -48(r1) # 8-byte Folded Reload
2358; NOVSX-NEXT:    mtlr r0
2359; NOVSX-NEXT:    blr
2360  %cmp = call i1 @llvm.experimental.constrained.fcmps.f128(fp128 %a, fp128 %b, metadata !"one", metadata !"fpexcept.strict") #0
2361  %conv = zext i1 %cmp to i32
2362  ret i32 %conv
2363}
2364
2365define i32 @fcmps_ult_f128(fp128 %a, fp128 %b) #0 {
2366; P8-LABEL: fcmps_ult_f128:
2367; P8:       # %bb.0:
2368; P8-NEXT:    mflr r0
2369; P8-NEXT:    stdu r1, -112(r1)
2370; P8-NEXT:    std r0, 128(r1)
2371; P8-NEXT:    bl __gekf2
2372; P8-NEXT:    nop
2373; P8-NEXT:    rlwinm r3, r3, 1, 31, 31
2374; P8-NEXT:    addi r1, r1, 112
2375; P8-NEXT:    ld r0, 16(r1)
2376; P8-NEXT:    mtlr r0
2377; P8-NEXT:    blr
2378;
2379; P9-LABEL: fcmps_ult_f128:
2380; P9:       # %bb.0:
2381; P9-NEXT:    xscmpoqp cr0, v2, v3
2382; P9-NEXT:    li r3, 1
2383; P9-NEXT:    crnor 4*cr5+lt, lt, un
2384; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
2385; P9-NEXT:    blr
2386;
2387; NOVSX-LABEL: fcmps_ult_f128:
2388; NOVSX:       # %bb.0:
2389; NOVSX-NEXT:    mflr r0
2390; NOVSX-NEXT:    stdu r1, -32(r1)
2391; NOVSX-NEXT:    std r0, 48(r1)
2392; NOVSX-NEXT:    bl __gekf2
2393; NOVSX-NEXT:    nop
2394; NOVSX-NEXT:    rlwinm r3, r3, 1, 31, 31
2395; NOVSX-NEXT:    addi r1, r1, 32
2396; NOVSX-NEXT:    ld r0, 16(r1)
2397; NOVSX-NEXT:    mtlr r0
2398; NOVSX-NEXT:    blr
2399  %cmp = call i1 @llvm.experimental.constrained.fcmps.f128(fp128 %a, fp128 %b, metadata !"ult", metadata !"fpexcept.strict") #0
2400  %conv = zext i1 %cmp to i32
2401  ret i32 %conv
2402}
2403
2404define i32 @fcmps_ule_f128(fp128 %a, fp128 %b) #0 {
2405; P8-LABEL: fcmps_ule_f128:
2406; P8:       # %bb.0:
2407; P8-NEXT:    mflr r0
2408; P8-NEXT:    stdu r1, -112(r1)
2409; P8-NEXT:    std r0, 128(r1)
2410; P8-NEXT:    bl __gtkf2
2411; P8-NEXT:    nop
2412; P8-NEXT:    extsw r3, r3
2413; P8-NEXT:    neg r3, r3
2414; P8-NEXT:    rldicl r3, r3, 1, 63
2415; P8-NEXT:    xori r3, r3, 1
2416; P8-NEXT:    addi r1, r1, 112
2417; P8-NEXT:    ld r0, 16(r1)
2418; P8-NEXT:    mtlr r0
2419; P8-NEXT:    blr
2420;
2421; P9-LABEL: fcmps_ule_f128:
2422; P9:       # %bb.0:
2423; P9-NEXT:    xscmpoqp cr0, v2, v3
2424; P9-NEXT:    li r3, 1
2425; P9-NEXT:    iselgt r3, 0, r3
2426; P9-NEXT:    blr
2427;
2428; NOVSX-LABEL: fcmps_ule_f128:
2429; NOVSX:       # %bb.0:
2430; NOVSX-NEXT:    mflr r0
2431; NOVSX-NEXT:    stdu r1, -32(r1)
2432; NOVSX-NEXT:    std r0, 48(r1)
2433; NOVSX-NEXT:    bl __gtkf2
2434; NOVSX-NEXT:    nop
2435; NOVSX-NEXT:    extsw r3, r3
2436; NOVSX-NEXT:    neg r3, r3
2437; NOVSX-NEXT:    rldicl r3, r3, 1, 63
2438; NOVSX-NEXT:    xori r3, r3, 1
2439; NOVSX-NEXT:    addi r1, r1, 32
2440; NOVSX-NEXT:    ld r0, 16(r1)
2441; NOVSX-NEXT:    mtlr r0
2442; NOVSX-NEXT:    blr
2443  %cmp = call i1 @llvm.experimental.constrained.fcmps.f128(fp128 %a, fp128 %b, metadata !"ule", metadata !"fpexcept.strict") #0
2444  %conv = zext i1 %cmp to i32
2445  ret i32 %conv
2446}
2447
2448define i32 @fcmps_ugt_f128(fp128 %a, fp128 %b) #0 {
2449; P8-LABEL: fcmps_ugt_f128:
2450; P8:       # %bb.0:
2451; P8-NEXT:    mflr r0
2452; P8-NEXT:    stdu r1, -112(r1)
2453; P8-NEXT:    std r0, 128(r1)
2454; P8-NEXT:    bl __lekf2
2455; P8-NEXT:    nop
2456; P8-NEXT:    extsw r3, r3
2457; P8-NEXT:    neg r3, r3
2458; P8-NEXT:    rldicl r3, r3, 1, 63
2459; P8-NEXT:    addi r1, r1, 112
2460; P8-NEXT:    ld r0, 16(r1)
2461; P8-NEXT:    mtlr r0
2462; P8-NEXT:    blr
2463;
2464; P9-LABEL: fcmps_ugt_f128:
2465; P9:       # %bb.0:
2466; P9-NEXT:    xscmpoqp cr0, v2, v3
2467; P9-NEXT:    li r3, 1
2468; P9-NEXT:    crnor 4*cr5+lt, gt, un
2469; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
2470; P9-NEXT:    blr
2471;
2472; NOVSX-LABEL: fcmps_ugt_f128:
2473; NOVSX:       # %bb.0:
2474; NOVSX-NEXT:    mflr r0
2475; NOVSX-NEXT:    stdu r1, -32(r1)
2476; NOVSX-NEXT:    std r0, 48(r1)
2477; NOVSX-NEXT:    bl __lekf2
2478; NOVSX-NEXT:    nop
2479; NOVSX-NEXT:    extsw r3, r3
2480; NOVSX-NEXT:    neg r3, r3
2481; NOVSX-NEXT:    rldicl r3, r3, 1, 63
2482; NOVSX-NEXT:    addi r1, r1, 32
2483; NOVSX-NEXT:    ld r0, 16(r1)
2484; NOVSX-NEXT:    mtlr r0
2485; NOVSX-NEXT:    blr
2486  %cmp = call i1 @llvm.experimental.constrained.fcmps.f128(fp128 %a, fp128 %b, metadata !"ugt", metadata !"fpexcept.strict") #0
2487  %conv = zext i1 %cmp to i32
2488  ret i32 %conv
2489}
2490
2491define i32 @fcmps_uge_f128(fp128 %a, fp128 %b) #0 {
2492; P8-LABEL: fcmps_uge_f128:
2493; P8:       # %bb.0:
2494; P8-NEXT:    mflr r0
2495; P8-NEXT:    stdu r1, -112(r1)
2496; P8-NEXT:    std r0, 128(r1)
2497; P8-NEXT:    bl __ltkf2
2498; P8-NEXT:    nop
2499; P8-NEXT:    rlwinm r3, r3, 1, 31, 31
2500; P8-NEXT:    xori r3, r3, 1
2501; P8-NEXT:    addi r1, r1, 112
2502; P8-NEXT:    ld r0, 16(r1)
2503; P8-NEXT:    mtlr r0
2504; P8-NEXT:    blr
2505;
2506; P9-LABEL: fcmps_uge_f128:
2507; P9:       # %bb.0:
2508; P9-NEXT:    xscmpoqp cr0, v2, v3
2509; P9-NEXT:    li r3, 1
2510; P9-NEXT:    isellt r3, 0, r3
2511; P9-NEXT:    blr
2512;
2513; NOVSX-LABEL: fcmps_uge_f128:
2514; NOVSX:       # %bb.0:
2515; NOVSX-NEXT:    mflr r0
2516; NOVSX-NEXT:    stdu r1, -32(r1)
2517; NOVSX-NEXT:    std r0, 48(r1)
2518; NOVSX-NEXT:    bl __ltkf2
2519; NOVSX-NEXT:    nop
2520; NOVSX-NEXT:    rlwinm r3, r3, 1, 31, 31
2521; NOVSX-NEXT:    xori r3, r3, 1
2522; NOVSX-NEXT:    addi r1, r1, 32
2523; NOVSX-NEXT:    ld r0, 16(r1)
2524; NOVSX-NEXT:    mtlr r0
2525; NOVSX-NEXT:    blr
2526  %cmp = call i1 @llvm.experimental.constrained.fcmps.f128(fp128 %a, fp128 %b, metadata !"uge", metadata !"fpexcept.strict") #0
2527  %conv = zext i1 %cmp to i32
2528  ret i32 %conv
2529}
2530
2531define i32 @fcmps_ueq_f128(fp128 %a, fp128 %b) #0 {
2532; P8-LABEL: fcmps_ueq_f128:
2533; P8:       # %bb.0:
2534; P8-NEXT:    mflr r0
2535; P8-NEXT:    stdu r1, -176(r1)
2536; P8-NEXT:    li r3, 128
2537; P8-NEXT:    std r0, 192(r1)
2538; P8-NEXT:    std r30, 160(r1) # 8-byte Folded Spill
2539; P8-NEXT:    stxvd2x v30, r1, r3 # 16-byte Folded Spill
2540; P8-NEXT:    li r3, 144
2541; P8-NEXT:    vmr v30, v2
2542; P8-NEXT:    stxvd2x v31, r1, r3 # 16-byte Folded Spill
2543; P8-NEXT:    vmr v31, v3
2544; P8-NEXT:    bl __eqkf2
2545; P8-NEXT:    nop
2546; P8-NEXT:    cntlzw r3, r3
2547; P8-NEXT:    vmr v2, v30
2548; P8-NEXT:    vmr v3, v31
2549; P8-NEXT:    srwi r30, r3, 5
2550; P8-NEXT:    bl __unordkf2
2551; P8-NEXT:    nop
2552; P8-NEXT:    cntlzw r3, r3
2553; P8-NEXT:    li r4, 144
2554; P8-NEXT:    lxvd2x v31, r1, r4 # 16-byte Folded Reload
2555; P8-NEXT:    li r4, 128
2556; P8-NEXT:    srwi r3, r3, 5
2557; P8-NEXT:    lxvd2x v30, r1, r4 # 16-byte Folded Reload
2558; P8-NEXT:    xori r3, r3, 1
2559; P8-NEXT:    or r3, r3, r30
2560; P8-NEXT:    ld r30, 160(r1) # 8-byte Folded Reload
2561; P8-NEXT:    addi r1, r1, 176
2562; P8-NEXT:    ld r0, 16(r1)
2563; P8-NEXT:    mtlr r0
2564; P8-NEXT:    blr
2565;
2566; P9-LABEL: fcmps_ueq_f128:
2567; P9:       # %bb.0:
2568; P9-NEXT:    xscmpoqp cr0, v2, v3
2569; P9-NEXT:    li r3, 1
2570; P9-NEXT:    crnor 4*cr5+lt, eq, un
2571; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
2572; P9-NEXT:    blr
2573;
2574; NOVSX-LABEL: fcmps_ueq_f128:
2575; NOVSX:       # %bb.0:
2576; NOVSX-NEXT:    mflr r0
2577; NOVSX-NEXT:    std r26, -48(r1) # 8-byte Folded Spill
2578; NOVSX-NEXT:    std r27, -40(r1) # 8-byte Folded Spill
2579; NOVSX-NEXT:    std r28, -32(r1) # 8-byte Folded Spill
2580; NOVSX-NEXT:    std r29, -24(r1) # 8-byte Folded Spill
2581; NOVSX-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
2582; NOVSX-NEXT:    stdu r1, -80(r1)
2583; NOVSX-NEXT:    std r0, 96(r1)
2584; NOVSX-NEXT:    mr r30, r6
2585; NOVSX-NEXT:    mr r29, r5
2586; NOVSX-NEXT:    mr r28, r4
2587; NOVSX-NEXT:    mr r27, r3
2588; NOVSX-NEXT:    bl __eqkf2
2589; NOVSX-NEXT:    nop
2590; NOVSX-NEXT:    cntlzw r3, r3
2591; NOVSX-NEXT:    mr r4, r28
2592; NOVSX-NEXT:    mr r5, r29
2593; NOVSX-NEXT:    mr r6, r30
2594; NOVSX-NEXT:    srwi r26, r3, 5
2595; NOVSX-NEXT:    mr r3, r27
2596; NOVSX-NEXT:    bl __unordkf2
2597; NOVSX-NEXT:    nop
2598; NOVSX-NEXT:    cntlzw r3, r3
2599; NOVSX-NEXT:    srwi r3, r3, 5
2600; NOVSX-NEXT:    xori r3, r3, 1
2601; NOVSX-NEXT:    or r3, r3, r26
2602; NOVSX-NEXT:    addi r1, r1, 80
2603; NOVSX-NEXT:    ld r0, 16(r1)
2604; NOVSX-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
2605; NOVSX-NEXT:    ld r29, -24(r1) # 8-byte Folded Reload
2606; NOVSX-NEXT:    ld r28, -32(r1) # 8-byte Folded Reload
2607; NOVSX-NEXT:    ld r27, -40(r1) # 8-byte Folded Reload
2608; NOVSX-NEXT:    ld r26, -48(r1) # 8-byte Folded Reload
2609; NOVSX-NEXT:    mtlr r0
2610; NOVSX-NEXT:    blr
2611  %cmp = call i1 @llvm.experimental.constrained.fcmps.f128(fp128 %a, fp128 %b, metadata !"ueq", metadata !"fpexcept.strict") #0
2612  %conv = zext i1 %cmp to i32
2613  ret i32 %conv
2614}
2615
2616define i32 @fcmps_une_f128(fp128 %a, fp128 %b) #0 {
2617; P8-LABEL: fcmps_une_f128:
2618; P8:       # %bb.0:
2619; P8-NEXT:    mflr r0
2620; P8-NEXT:    stdu r1, -112(r1)
2621; P8-NEXT:    std r0, 128(r1)
2622; P8-NEXT:    bl __nekf2
2623; P8-NEXT:    nop
2624; P8-NEXT:    cntlzw r3, r3
2625; P8-NEXT:    srwi r3, r3, 5
2626; P8-NEXT:    xori r3, r3, 1
2627; P8-NEXT:    addi r1, r1, 112
2628; P8-NEXT:    ld r0, 16(r1)
2629; P8-NEXT:    mtlr r0
2630; P8-NEXT:    blr
2631;
2632; P9-LABEL: fcmps_une_f128:
2633; P9:       # %bb.0:
2634; P9-NEXT:    xscmpoqp cr0, v2, v3
2635; P9-NEXT:    li r3, 1
2636; P9-NEXT:    iseleq r3, 0, r3
2637; P9-NEXT:    blr
2638;
2639; NOVSX-LABEL: fcmps_une_f128:
2640; NOVSX:       # %bb.0:
2641; NOVSX-NEXT:    mflr r0
2642; NOVSX-NEXT:    stdu r1, -32(r1)
2643; NOVSX-NEXT:    std r0, 48(r1)
2644; NOVSX-NEXT:    bl __nekf2
2645; NOVSX-NEXT:    nop
2646; NOVSX-NEXT:    cntlzw r3, r3
2647; NOVSX-NEXT:    srwi r3, r3, 5
2648; NOVSX-NEXT:    xori r3, r3, 1
2649; NOVSX-NEXT:    addi r1, r1, 32
2650; NOVSX-NEXT:    ld r0, 16(r1)
2651; NOVSX-NEXT:    mtlr r0
2652; NOVSX-NEXT:    blr
2653  %cmp = call i1 @llvm.experimental.constrained.fcmps.f128(fp128 %a, fp128 %b, metadata !"une", metadata !"fpexcept.strict") #0
2654  %conv = zext i1 %cmp to i32
2655  ret i32 %conv
2656}
2657
2658define i32 @fcmp_olt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
2659; P8-LABEL: fcmp_olt_ppcf128:
2660; P8:       # %bb.0:
2661; P8-NEXT:    fcmpu cr0, f1, f3
2662; P8-NEXT:    li r3, 1
2663; P8-NEXT:    crandc 4*cr5+gt, lt, eq
2664; P8-NEXT:    fcmpu cr1, f2, f4
2665; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr1+lt
2666; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2667; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
2668; P8-NEXT:    blr
2669;
2670; P9-LABEL: fcmp_olt_ppcf128:
2671; P9:       # %bb.0:
2672; P9-NEXT:    fcmpu cr0, f1, f3
2673; P9-NEXT:    fcmpu cr1, f2, f4
2674; P9-NEXT:    li r3, 1
2675; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr1+lt
2676; P9-NEXT:    crandc 4*cr5+gt, lt, eq
2677; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2678; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
2679; P9-NEXT:    blr
2680;
2681; NOVSX-LABEL: fcmp_olt_ppcf128:
2682; NOVSX:       # %bb.0:
2683; NOVSX-NEXT:    fcmpu cr0, f1, f3
2684; NOVSX-NEXT:    li r3, 1
2685; NOVSX-NEXT:    crandc 4*cr5+gt, lt, eq
2686; NOVSX-NEXT:    fcmpu cr1, f2, f4
2687; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr1+lt
2688; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2689; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
2690; NOVSX-NEXT:    blr
2691  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"olt", metadata !"fpexcept.strict") #0
2692  %conv = zext i1 %cmp to i32
2693  ret i32 %conv
2694}
2695
2696define i32 @fcmp_ole_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
2697; P8-LABEL: fcmp_ole_ppcf128:
2698; P8:       # %bb.0:
2699; P8-NEXT:    fcmpu cr0, f2, f4
2700; P8-NEXT:    li r3, 1
2701; P8-NEXT:    crnor 4*cr5+lt, un, gt
2702; P8-NEXT:    fcmpu cr0, f1, f3
2703; P8-NEXT:    crnor 4*cr5+gt, un, gt
2704; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
2705; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
2706; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2707; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
2708; P8-NEXT:    blr
2709;
2710; P9-LABEL: fcmp_ole_ppcf128:
2711; P9:       # %bb.0:
2712; P9-NEXT:    fcmpu cr0, f2, f4
2713; P9-NEXT:    li r3, 1
2714; P9-NEXT:    crnor 4*cr5+lt, un, gt
2715; P9-NEXT:    fcmpu cr0, f1, f3
2716; P9-NEXT:    crnor 4*cr5+gt, un, gt
2717; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
2718; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
2719; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2720; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
2721; P9-NEXT:    blr
2722;
2723; NOVSX-LABEL: fcmp_ole_ppcf128:
2724; NOVSX:       # %bb.0:
2725; NOVSX-NEXT:    fcmpu cr0, f2, f4
2726; NOVSX-NEXT:    li r3, 1
2727; NOVSX-NEXT:    crnor 4*cr5+lt, un, gt
2728; NOVSX-NEXT:    fcmpu cr0, f1, f3
2729; NOVSX-NEXT:    crnor 4*cr5+gt, un, gt
2730; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
2731; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
2732; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2733; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
2734; NOVSX-NEXT:    blr
2735  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ole", metadata !"fpexcept.strict") #0
2736  %conv = zext i1 %cmp to i32
2737  ret i32 %conv
2738}
2739
2740define i32 @fcmp_ogt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
2741; P8-LABEL: fcmp_ogt_ppcf128:
2742; P8:       # %bb.0:
2743; P8-NEXT:    fcmpu cr0, f1, f3
2744; P8-NEXT:    li r3, 1
2745; P8-NEXT:    crandc 4*cr5+gt, gt, eq
2746; P8-NEXT:    fcmpu cr1, f2, f4
2747; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr1+gt
2748; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2749; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
2750; P8-NEXT:    blr
2751;
2752; P9-LABEL: fcmp_ogt_ppcf128:
2753; P9:       # %bb.0:
2754; P9-NEXT:    fcmpu cr0, f1, f3
2755; P9-NEXT:    fcmpu cr1, f2, f4
2756; P9-NEXT:    li r3, 1
2757; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr1+gt
2758; P9-NEXT:    crandc 4*cr5+gt, gt, eq
2759; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2760; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
2761; P9-NEXT:    blr
2762;
2763; NOVSX-LABEL: fcmp_ogt_ppcf128:
2764; NOVSX:       # %bb.0:
2765; NOVSX-NEXT:    fcmpu cr0, f1, f3
2766; NOVSX-NEXT:    li r3, 1
2767; NOVSX-NEXT:    crandc 4*cr5+gt, gt, eq
2768; NOVSX-NEXT:    fcmpu cr1, f2, f4
2769; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr1+gt
2770; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2771; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
2772; NOVSX-NEXT:    blr
2773  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ogt", metadata !"fpexcept.strict") #0
2774  %conv = zext i1 %cmp to i32
2775  ret i32 %conv
2776}
2777
2778define i32 @fcmp_oge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
2779; P8-LABEL: fcmp_oge_ppcf128:
2780; P8:       # %bb.0:
2781; P8-NEXT:    fcmpu cr0, f2, f4
2782; P8-NEXT:    li r3, 1
2783; P8-NEXT:    crnor 4*cr5+lt, un, lt
2784; P8-NEXT:    fcmpu cr0, f1, f3
2785; P8-NEXT:    crnor 4*cr5+gt, un, lt
2786; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
2787; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
2788; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2789; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
2790; P8-NEXT:    blr
2791;
2792; P9-LABEL: fcmp_oge_ppcf128:
2793; P9:       # %bb.0:
2794; P9-NEXT:    fcmpu cr0, f2, f4
2795; P9-NEXT:    li r3, 1
2796; P9-NEXT:    crnor 4*cr5+lt, un, lt
2797; P9-NEXT:    fcmpu cr0, f1, f3
2798; P9-NEXT:    crnor 4*cr5+gt, un, lt
2799; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
2800; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
2801; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2802; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
2803; P9-NEXT:    blr
2804;
2805; NOVSX-LABEL: fcmp_oge_ppcf128:
2806; NOVSX:       # %bb.0:
2807; NOVSX-NEXT:    fcmpu cr0, f2, f4
2808; NOVSX-NEXT:    li r3, 1
2809; NOVSX-NEXT:    crnor 4*cr5+lt, un, lt
2810; NOVSX-NEXT:    fcmpu cr0, f1, f3
2811; NOVSX-NEXT:    crnor 4*cr5+gt, un, lt
2812; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
2813; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
2814; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2815; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
2816; NOVSX-NEXT:    blr
2817  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"oge", metadata !"fpexcept.strict") #0
2818  %conv = zext i1 %cmp to i32
2819  ret i32 %conv
2820}
2821
2822define i32 @fcmp_oeq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
2823; P8-LABEL: fcmp_oeq_ppcf128:
2824; P8:       # %bb.0:
2825; P8-NEXT:    fcmpu cr0, f1, f3
2826; P8-NEXT:    li r3, 1
2827; P8-NEXT:    crandc 4*cr5+gt, eq, eq
2828; P8-NEXT:    fcmpu cr1, f2, f4
2829; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr1+eq
2830; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2831; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
2832; P8-NEXT:    blr
2833;
2834; P9-LABEL: fcmp_oeq_ppcf128:
2835; P9:       # %bb.0:
2836; P9-NEXT:    fcmpu cr0, f1, f3
2837; P9-NEXT:    fcmpu cr1, f2, f4
2838; P9-NEXT:    li r3, 1
2839; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr1+eq
2840; P9-NEXT:    crandc 4*cr5+gt, eq, eq
2841; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2842; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
2843; P9-NEXT:    blr
2844;
2845; NOVSX-LABEL: fcmp_oeq_ppcf128:
2846; NOVSX:       # %bb.0:
2847; NOVSX-NEXT:    fcmpu cr0, f1, f3
2848; NOVSX-NEXT:    li r3, 1
2849; NOVSX-NEXT:    crandc 4*cr5+gt, eq, eq
2850; NOVSX-NEXT:    fcmpu cr1, f2, f4
2851; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr1+eq
2852; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2853; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
2854; NOVSX-NEXT:    blr
2855  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"oeq", metadata !"fpexcept.strict") #0
2856  %conv = zext i1 %cmp to i32
2857  ret i32 %conv
2858}
2859
2860define i32 @fcmp_one_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
2861; P8-LABEL: fcmp_one_ppcf128:
2862; P8:       # %bb.0:
2863; P8-NEXT:    fcmpu cr0, f2, f4
2864; P8-NEXT:    li r3, 1
2865; P8-NEXT:    crnor 4*cr5+lt, un, eq
2866; P8-NEXT:    fcmpu cr0, f1, f3
2867; P8-NEXT:    crnor 4*cr5+gt, un, eq
2868; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
2869; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
2870; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2871; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
2872; P8-NEXT:    blr
2873;
2874; P9-LABEL: fcmp_one_ppcf128:
2875; P9:       # %bb.0:
2876; P9-NEXT:    fcmpu cr0, f2, f4
2877; P9-NEXT:    li r3, 1
2878; P9-NEXT:    crnor 4*cr5+lt, un, eq
2879; P9-NEXT:    fcmpu cr0, f1, f3
2880; P9-NEXT:    crnor 4*cr5+gt, un, eq
2881; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
2882; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
2883; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2884; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
2885; P9-NEXT:    blr
2886;
2887; NOVSX-LABEL: fcmp_one_ppcf128:
2888; NOVSX:       # %bb.0:
2889; NOVSX-NEXT:    fcmpu cr0, f2, f4
2890; NOVSX-NEXT:    li r3, 1
2891; NOVSX-NEXT:    crnor 4*cr5+lt, un, eq
2892; NOVSX-NEXT:    fcmpu cr0, f1, f3
2893; NOVSX-NEXT:    crnor 4*cr5+gt, un, eq
2894; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
2895; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
2896; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2897; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
2898; NOVSX-NEXT:    blr
2899  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"one", metadata !"fpexcept.strict") #0
2900  %conv = zext i1 %cmp to i32
2901  ret i32 %conv
2902}
2903
2904define i32 @fcmp_ult_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
2905; P8-LABEL: fcmp_ult_ppcf128:
2906; P8:       # %bb.0:
2907; P8-NEXT:    fcmpu cr0, f1, f3
2908; P8-NEXT:    li r3, 1
2909; P8-NEXT:    cror 4*cr5+gt, lt, un
2910; P8-NEXT:    fcmpu cr1, f2, f4
2911; P8-NEXT:    cror 4*cr5+lt, 4*cr1+lt, 4*cr1+un
2912; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
2913; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
2914; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2915; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
2916; P8-NEXT:    blr
2917;
2918; P9-LABEL: fcmp_ult_ppcf128:
2919; P9:       # %bb.0:
2920; P9-NEXT:    fcmpu cr0, f1, f3
2921; P9-NEXT:    fcmpu cr1, f2, f4
2922; P9-NEXT:    li r3, 1
2923; P9-NEXT:    cror 4*cr5+lt, 4*cr1+lt, 4*cr1+un
2924; P9-NEXT:    cror 4*cr5+gt, lt, un
2925; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
2926; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
2927; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2928; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
2929; P9-NEXT:    blr
2930;
2931; NOVSX-LABEL: fcmp_ult_ppcf128:
2932; NOVSX:       # %bb.0:
2933; NOVSX-NEXT:    fcmpu cr0, f1, f3
2934; NOVSX-NEXT:    li r3, 1
2935; NOVSX-NEXT:    cror 4*cr5+gt, lt, un
2936; NOVSX-NEXT:    fcmpu cr1, f2, f4
2937; NOVSX-NEXT:    cror 4*cr5+lt, 4*cr1+lt, 4*cr1+un
2938; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
2939; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
2940; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2941; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
2942; NOVSX-NEXT:    blr
2943  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ult", metadata !"fpexcept.strict") #0
2944  %conv = zext i1 %cmp to i32
2945  ret i32 %conv
2946}
2947
2948define i32 @fcmp_ule_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
2949; P8-LABEL: fcmp_ule_ppcf128:
2950; P8:       # %bb.0:
2951; P8-NEXT:    fcmpu cr0, f2, f4
2952; P8-NEXT:    li r3, 1
2953; P8-NEXT:    fcmpu cr1, f1, f3
2954; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, gt
2955; P8-NEXT:    crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
2956; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2957; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
2958; P8-NEXT:    blr
2959;
2960; P9-LABEL: fcmp_ule_ppcf128:
2961; P9:       # %bb.0:
2962; P9-NEXT:    fcmpu cr0, f2, f4
2963; P9-NEXT:    fcmpu cr1, f1, f3
2964; P9-NEXT:    li r3, 1
2965; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, gt
2966; P9-NEXT:    crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
2967; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2968; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
2969; P9-NEXT:    blr
2970;
2971; NOVSX-LABEL: fcmp_ule_ppcf128:
2972; NOVSX:       # %bb.0:
2973; NOVSX-NEXT:    fcmpu cr0, f2, f4
2974; NOVSX-NEXT:    li r3, 1
2975; NOVSX-NEXT:    fcmpu cr1, f1, f3
2976; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, gt
2977; NOVSX-NEXT:    crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
2978; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2979; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
2980; NOVSX-NEXT:    blr
2981  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ule", metadata !"fpexcept.strict") #0
2982  %conv = zext i1 %cmp to i32
2983  ret i32 %conv
2984}
2985
2986define i32 @fcmp_ugt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
2987; P8-LABEL: fcmp_ugt_ppcf128:
2988; P8:       # %bb.0:
2989; P8-NEXT:    fcmpu cr0, f1, f3
2990; P8-NEXT:    li r3, 1
2991; P8-NEXT:    cror 4*cr5+gt, gt, un
2992; P8-NEXT:    fcmpu cr1, f2, f4
2993; P8-NEXT:    cror 4*cr5+lt, 4*cr1+gt, 4*cr1+un
2994; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
2995; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
2996; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
2997; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
2998; P8-NEXT:    blr
2999;
3000; P9-LABEL: fcmp_ugt_ppcf128:
3001; P9:       # %bb.0:
3002; P9-NEXT:    fcmpu cr0, f1, f3
3003; P9-NEXT:    fcmpu cr1, f2, f4
3004; P9-NEXT:    li r3, 1
3005; P9-NEXT:    cror 4*cr5+lt, 4*cr1+gt, 4*cr1+un
3006; P9-NEXT:    cror 4*cr5+gt, gt, un
3007; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3008; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3009; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3010; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3011; P9-NEXT:    blr
3012;
3013; NOVSX-LABEL: fcmp_ugt_ppcf128:
3014; NOVSX:       # %bb.0:
3015; NOVSX-NEXT:    fcmpu cr0, f1, f3
3016; NOVSX-NEXT:    li r3, 1
3017; NOVSX-NEXT:    cror 4*cr5+gt, gt, un
3018; NOVSX-NEXT:    fcmpu cr1, f2, f4
3019; NOVSX-NEXT:    cror 4*cr5+lt, 4*cr1+gt, 4*cr1+un
3020; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3021; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3022; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3023; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3024; NOVSX-NEXT:    blr
3025  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ugt", metadata !"fpexcept.strict") #0
3026  %conv = zext i1 %cmp to i32
3027  ret i32 %conv
3028}
3029
3030define i32 @fcmp_uge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
3031; P8-LABEL: fcmp_uge_ppcf128:
3032; P8:       # %bb.0:
3033; P8-NEXT:    fcmpu cr0, f2, f4
3034; P8-NEXT:    li r3, 1
3035; P8-NEXT:    fcmpu cr1, f1, f3
3036; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, lt
3037; P8-NEXT:    crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
3038; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3039; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
3040; P8-NEXT:    blr
3041;
3042; P9-LABEL: fcmp_uge_ppcf128:
3043; P9:       # %bb.0:
3044; P9-NEXT:    fcmpu cr0, f2, f4
3045; P9-NEXT:    fcmpu cr1, f1, f3
3046; P9-NEXT:    li r3, 1
3047; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, lt
3048; P9-NEXT:    crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
3049; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3050; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3051; P9-NEXT:    blr
3052;
3053; NOVSX-LABEL: fcmp_uge_ppcf128:
3054; NOVSX:       # %bb.0:
3055; NOVSX-NEXT:    fcmpu cr0, f2, f4
3056; NOVSX-NEXT:    li r3, 1
3057; NOVSX-NEXT:    fcmpu cr1, f1, f3
3058; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, lt
3059; NOVSX-NEXT:    crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
3060; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3061; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3062; NOVSX-NEXT:    blr
3063  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"uge", metadata !"fpexcept.strict") #0
3064  %conv = zext i1 %cmp to i32
3065  ret i32 %conv
3066}
3067
3068define i32 @fcmp_ueq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
3069; P8-LABEL: fcmp_ueq_ppcf128:
3070; P8:       # %bb.0:
3071; P8-NEXT:    fcmpu cr0, f1, f3
3072; P8-NEXT:    li r3, 1
3073; P8-NEXT:    cror 4*cr5+gt, eq, un
3074; P8-NEXT:    fcmpu cr1, f2, f4
3075; P8-NEXT:    cror 4*cr5+lt, 4*cr1+eq, 4*cr1+un
3076; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3077; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3078; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3079; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
3080; P8-NEXT:    blr
3081;
3082; P9-LABEL: fcmp_ueq_ppcf128:
3083; P9:       # %bb.0:
3084; P9-NEXT:    fcmpu cr0, f1, f3
3085; P9-NEXT:    fcmpu cr1, f2, f4
3086; P9-NEXT:    li r3, 1
3087; P9-NEXT:    cror 4*cr5+lt, 4*cr1+eq, 4*cr1+un
3088; P9-NEXT:    cror 4*cr5+gt, eq, un
3089; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3090; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3091; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3092; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3093; P9-NEXT:    blr
3094;
3095; NOVSX-LABEL: fcmp_ueq_ppcf128:
3096; NOVSX:       # %bb.0:
3097; NOVSX-NEXT:    fcmpu cr0, f1, f3
3098; NOVSX-NEXT:    li r3, 1
3099; NOVSX-NEXT:    cror 4*cr5+gt, eq, un
3100; NOVSX-NEXT:    fcmpu cr1, f2, f4
3101; NOVSX-NEXT:    cror 4*cr5+lt, 4*cr1+eq, 4*cr1+un
3102; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3103; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3104; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3105; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3106; NOVSX-NEXT:    blr
3107  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ueq", metadata !"fpexcept.strict") #0
3108  %conv = zext i1 %cmp to i32
3109  ret i32 %conv
3110}
3111
3112define i32 @fcmp_une_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
3113; P8-LABEL: fcmp_une_ppcf128:
3114; P8:       # %bb.0:
3115; P8-NEXT:    fcmpu cr0, f2, f4
3116; P8-NEXT:    li r3, 1
3117; P8-NEXT:    fcmpu cr1, f1, f3
3118; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, eq
3119; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
3120; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
3121; P8-NEXT:    blr
3122;
3123; P9-LABEL: fcmp_une_ppcf128:
3124; P9:       # %bb.0:
3125; P9-NEXT:    fcmpu cr0, f2, f4
3126; P9-NEXT:    fcmpu cr1, f1, f3
3127; P9-NEXT:    li r3, 1
3128; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, eq
3129; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
3130; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3131; P9-NEXT:    blr
3132;
3133; NOVSX-LABEL: fcmp_une_ppcf128:
3134; NOVSX:       # %bb.0:
3135; NOVSX-NEXT:    fcmpu cr0, f2, f4
3136; NOVSX-NEXT:    li r3, 1
3137; NOVSX-NEXT:    fcmpu cr1, f1, f3
3138; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, eq
3139; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
3140; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3141; NOVSX-NEXT:    blr
3142  %cmp = call i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"une", metadata !"fpexcept.strict") #0
3143  %conv = zext i1 %cmp to i32
3144  ret i32 %conv
3145}
3146
3147define i32 @fcmps_olt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
3148; P8-LABEL: fcmps_olt_ppcf128:
3149; P8:       # %bb.0:
3150; P8-NEXT:    fcmpo cr0, f1, f3
3151; P8-NEXT:    li r3, 1
3152; P8-NEXT:    crandc 4*cr5+gt, lt, eq
3153; P8-NEXT:    fcmpo cr1, f2, f4
3154; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr1+lt
3155; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3156; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
3157; P8-NEXT:    blr
3158;
3159; P9-LABEL: fcmps_olt_ppcf128:
3160; P9:       # %bb.0:
3161; P9-NEXT:    fcmpo cr0, f1, f3
3162; P9-NEXT:    fcmpo cr1, f2, f4
3163; P9-NEXT:    li r3, 1
3164; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr1+lt
3165; P9-NEXT:    crandc 4*cr5+gt, lt, eq
3166; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3167; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3168; P9-NEXT:    blr
3169;
3170; NOVSX-LABEL: fcmps_olt_ppcf128:
3171; NOVSX:       # %bb.0:
3172; NOVSX-NEXT:    fcmpo cr0, f1, f3
3173; NOVSX-NEXT:    li r3, 1
3174; NOVSX-NEXT:    crandc 4*cr5+gt, lt, eq
3175; NOVSX-NEXT:    fcmpo cr1, f2, f4
3176; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr1+lt
3177; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3178; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3179; NOVSX-NEXT:    blr
3180  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"olt", metadata !"fpexcept.strict") #0
3181  %conv = zext i1 %cmp to i32
3182  ret i32 %conv
3183}
3184
3185define i32 @fcmps_ole_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
3186; P8-LABEL: fcmps_ole_ppcf128:
3187; P8:       # %bb.0:
3188; P8-NEXT:    fcmpo cr0, f2, f4
3189; P8-NEXT:    li r3, 1
3190; P8-NEXT:    crnor 4*cr5+lt, un, gt
3191; P8-NEXT:    fcmpo cr0, f1, f3
3192; P8-NEXT:    crnor 4*cr5+gt, un, gt
3193; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3194; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3195; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3196; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
3197; P8-NEXT:    blr
3198;
3199; P9-LABEL: fcmps_ole_ppcf128:
3200; P9:       # %bb.0:
3201; P9-NEXT:    fcmpo cr0, f2, f4
3202; P9-NEXT:    li r3, 1
3203; P9-NEXT:    crnor 4*cr5+lt, un, gt
3204; P9-NEXT:    fcmpo cr0, f1, f3
3205; P9-NEXT:    crnor 4*cr5+gt, un, gt
3206; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3207; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3208; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3209; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3210; P9-NEXT:    blr
3211;
3212; NOVSX-LABEL: fcmps_ole_ppcf128:
3213; NOVSX:       # %bb.0:
3214; NOVSX-NEXT:    fcmpo cr0, f2, f4
3215; NOVSX-NEXT:    li r3, 1
3216; NOVSX-NEXT:    crnor 4*cr5+lt, un, gt
3217; NOVSX-NEXT:    fcmpo cr0, f1, f3
3218; NOVSX-NEXT:    crnor 4*cr5+gt, un, gt
3219; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3220; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3221; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3222; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3223; NOVSX-NEXT:    blr
3224  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ole", metadata !"fpexcept.strict") #0
3225  %conv = zext i1 %cmp to i32
3226  ret i32 %conv
3227}
3228
3229define i32 @fcmps_ogt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
3230; P8-LABEL: fcmps_ogt_ppcf128:
3231; P8:       # %bb.0:
3232; P8-NEXT:    fcmpo cr0, f1, f3
3233; P8-NEXT:    li r3, 1
3234; P8-NEXT:    crandc 4*cr5+gt, gt, eq
3235; P8-NEXT:    fcmpo cr1, f2, f4
3236; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr1+gt
3237; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3238; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
3239; P8-NEXT:    blr
3240;
3241; P9-LABEL: fcmps_ogt_ppcf128:
3242; P9:       # %bb.0:
3243; P9-NEXT:    fcmpo cr0, f1, f3
3244; P9-NEXT:    fcmpo cr1, f2, f4
3245; P9-NEXT:    li r3, 1
3246; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr1+gt
3247; P9-NEXT:    crandc 4*cr5+gt, gt, eq
3248; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3249; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3250; P9-NEXT:    blr
3251;
3252; NOVSX-LABEL: fcmps_ogt_ppcf128:
3253; NOVSX:       # %bb.0:
3254; NOVSX-NEXT:    fcmpo cr0, f1, f3
3255; NOVSX-NEXT:    li r3, 1
3256; NOVSX-NEXT:    crandc 4*cr5+gt, gt, eq
3257; NOVSX-NEXT:    fcmpo cr1, f2, f4
3258; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr1+gt
3259; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3260; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3261; NOVSX-NEXT:    blr
3262  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ogt", metadata !"fpexcept.strict") #0
3263  %conv = zext i1 %cmp to i32
3264  ret i32 %conv
3265}
3266
3267define i32 @fcmps_oge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
3268; P8-LABEL: fcmps_oge_ppcf128:
3269; P8:       # %bb.0:
3270; P8-NEXT:    fcmpo cr0, f2, f4
3271; P8-NEXT:    li r3, 1
3272; P8-NEXT:    crnor 4*cr5+lt, un, lt
3273; P8-NEXT:    fcmpo cr0, f1, f3
3274; P8-NEXT:    crnor 4*cr5+gt, un, lt
3275; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3276; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3277; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3278; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
3279; P8-NEXT:    blr
3280;
3281; P9-LABEL: fcmps_oge_ppcf128:
3282; P9:       # %bb.0:
3283; P9-NEXT:    fcmpo cr0, f2, f4
3284; P9-NEXT:    li r3, 1
3285; P9-NEXT:    crnor 4*cr5+lt, un, lt
3286; P9-NEXT:    fcmpo cr0, f1, f3
3287; P9-NEXT:    crnor 4*cr5+gt, un, lt
3288; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3289; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3290; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3291; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3292; P9-NEXT:    blr
3293;
3294; NOVSX-LABEL: fcmps_oge_ppcf128:
3295; NOVSX:       # %bb.0:
3296; NOVSX-NEXT:    fcmpo cr0, f2, f4
3297; NOVSX-NEXT:    li r3, 1
3298; NOVSX-NEXT:    crnor 4*cr5+lt, un, lt
3299; NOVSX-NEXT:    fcmpo cr0, f1, f3
3300; NOVSX-NEXT:    crnor 4*cr5+gt, un, lt
3301; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3302; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3303; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3304; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3305; NOVSX-NEXT:    blr
3306  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"oge", metadata !"fpexcept.strict") #0
3307  %conv = zext i1 %cmp to i32
3308  ret i32 %conv
3309}
3310
3311define i32 @fcmps_oeq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
3312; P8-LABEL: fcmps_oeq_ppcf128:
3313; P8:       # %bb.0:
3314; P8-NEXT:    fcmpo cr0, f1, f3
3315; P8-NEXT:    li r3, 1
3316; P8-NEXT:    crandc 4*cr5+gt, eq, eq
3317; P8-NEXT:    fcmpo cr1, f2, f4
3318; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr1+eq
3319; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3320; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
3321; P8-NEXT:    blr
3322;
3323; P9-LABEL: fcmps_oeq_ppcf128:
3324; P9:       # %bb.0:
3325; P9-NEXT:    fcmpo cr0, f1, f3
3326; P9-NEXT:    fcmpo cr1, f2, f4
3327; P9-NEXT:    li r3, 1
3328; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr1+eq
3329; P9-NEXT:    crandc 4*cr5+gt, eq, eq
3330; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3331; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3332; P9-NEXT:    blr
3333;
3334; NOVSX-LABEL: fcmps_oeq_ppcf128:
3335; NOVSX:       # %bb.0:
3336; NOVSX-NEXT:    fcmpo cr0, f1, f3
3337; NOVSX-NEXT:    li r3, 1
3338; NOVSX-NEXT:    crandc 4*cr5+gt, eq, eq
3339; NOVSX-NEXT:    fcmpo cr1, f2, f4
3340; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr1+eq
3341; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3342; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3343; NOVSX-NEXT:    blr
3344  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"oeq", metadata !"fpexcept.strict") #0
3345  %conv = zext i1 %cmp to i32
3346  ret i32 %conv
3347}
3348
3349define i32 @fcmps_one_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
3350; P8-LABEL: fcmps_one_ppcf128:
3351; P8:       # %bb.0:
3352; P8-NEXT:    fcmpo cr0, f2, f4
3353; P8-NEXT:    li r3, 1
3354; P8-NEXT:    crnor 4*cr5+lt, un, eq
3355; P8-NEXT:    fcmpo cr0, f1, f3
3356; P8-NEXT:    crnor 4*cr5+gt, un, eq
3357; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3358; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3359; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3360; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
3361; P8-NEXT:    blr
3362;
3363; P9-LABEL: fcmps_one_ppcf128:
3364; P9:       # %bb.0:
3365; P9-NEXT:    fcmpo cr0, f2, f4
3366; P9-NEXT:    li r3, 1
3367; P9-NEXT:    crnor 4*cr5+lt, un, eq
3368; P9-NEXT:    fcmpo cr0, f1, f3
3369; P9-NEXT:    crnor 4*cr5+gt, un, eq
3370; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3371; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3372; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3373; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3374; P9-NEXT:    blr
3375;
3376; NOVSX-LABEL: fcmps_one_ppcf128:
3377; NOVSX:       # %bb.0:
3378; NOVSX-NEXT:    fcmpo cr0, f2, f4
3379; NOVSX-NEXT:    li r3, 1
3380; NOVSX-NEXT:    crnor 4*cr5+lt, un, eq
3381; NOVSX-NEXT:    fcmpo cr0, f1, f3
3382; NOVSX-NEXT:    crnor 4*cr5+gt, un, eq
3383; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3384; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3385; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3386; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3387; NOVSX-NEXT:    blr
3388  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"one", metadata !"fpexcept.strict") #0
3389  %conv = zext i1 %cmp to i32
3390  ret i32 %conv
3391}
3392
3393define i32 @fcmps_ult_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
3394; P8-LABEL: fcmps_ult_ppcf128:
3395; P8:       # %bb.0:
3396; P8-NEXT:    fcmpo cr0, f1, f3
3397; P8-NEXT:    li r3, 1
3398; P8-NEXT:    cror 4*cr5+gt, lt, un
3399; P8-NEXT:    fcmpo cr1, f2, f4
3400; P8-NEXT:    cror 4*cr5+lt, 4*cr1+lt, 4*cr1+un
3401; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3402; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3403; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3404; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
3405; P8-NEXT:    blr
3406;
3407; P9-LABEL: fcmps_ult_ppcf128:
3408; P9:       # %bb.0:
3409; P9-NEXT:    fcmpo cr0, f1, f3
3410; P9-NEXT:    fcmpo cr1, f2, f4
3411; P9-NEXT:    li r3, 1
3412; P9-NEXT:    cror 4*cr5+lt, 4*cr1+lt, 4*cr1+un
3413; P9-NEXT:    cror 4*cr5+gt, lt, un
3414; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3415; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3416; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3417; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3418; P9-NEXT:    blr
3419;
3420; NOVSX-LABEL: fcmps_ult_ppcf128:
3421; NOVSX:       # %bb.0:
3422; NOVSX-NEXT:    fcmpo cr0, f1, f3
3423; NOVSX-NEXT:    li r3, 1
3424; NOVSX-NEXT:    cror 4*cr5+gt, lt, un
3425; NOVSX-NEXT:    fcmpo cr1, f2, f4
3426; NOVSX-NEXT:    cror 4*cr5+lt, 4*cr1+lt, 4*cr1+un
3427; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3428; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3429; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3430; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3431; NOVSX-NEXT:    blr
3432  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ult", metadata !"fpexcept.strict") #0
3433  %conv = zext i1 %cmp to i32
3434  ret i32 %conv
3435}
3436
3437define i32 @fcmps_ule_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
3438; P8-LABEL: fcmps_ule_ppcf128:
3439; P8:       # %bb.0:
3440; P8-NEXT:    fcmpo cr0, f2, f4
3441; P8-NEXT:    li r3, 1
3442; P8-NEXT:    fcmpo cr1, f1, f3
3443; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, gt
3444; P8-NEXT:    crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
3445; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3446; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
3447; P8-NEXT:    blr
3448;
3449; P9-LABEL: fcmps_ule_ppcf128:
3450; P9:       # %bb.0:
3451; P9-NEXT:    fcmpo cr0, f2, f4
3452; P9-NEXT:    fcmpo cr1, f1, f3
3453; P9-NEXT:    li r3, 1
3454; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, gt
3455; P9-NEXT:    crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
3456; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3457; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3458; P9-NEXT:    blr
3459;
3460; NOVSX-LABEL: fcmps_ule_ppcf128:
3461; NOVSX:       # %bb.0:
3462; NOVSX-NEXT:    fcmpo cr0, f2, f4
3463; NOVSX-NEXT:    li r3, 1
3464; NOVSX-NEXT:    fcmpo cr1, f1, f3
3465; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, gt
3466; NOVSX-NEXT:    crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
3467; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3468; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3469; NOVSX-NEXT:    blr
3470  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ule", metadata !"fpexcept.strict") #0
3471  %conv = zext i1 %cmp to i32
3472  ret i32 %conv
3473}
3474
3475define i32 @fcmps_ugt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
3476; P8-LABEL: fcmps_ugt_ppcf128:
3477; P8:       # %bb.0:
3478; P8-NEXT:    fcmpo cr0, f1, f3
3479; P8-NEXT:    li r3, 1
3480; P8-NEXT:    cror 4*cr5+gt, gt, un
3481; P8-NEXT:    fcmpo cr1, f2, f4
3482; P8-NEXT:    cror 4*cr5+lt, 4*cr1+gt, 4*cr1+un
3483; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3484; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3485; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3486; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
3487; P8-NEXT:    blr
3488;
3489; P9-LABEL: fcmps_ugt_ppcf128:
3490; P9:       # %bb.0:
3491; P9-NEXT:    fcmpo cr0, f1, f3
3492; P9-NEXT:    fcmpo cr1, f2, f4
3493; P9-NEXT:    li r3, 1
3494; P9-NEXT:    cror 4*cr5+lt, 4*cr1+gt, 4*cr1+un
3495; P9-NEXT:    cror 4*cr5+gt, gt, un
3496; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3497; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3498; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3499; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3500; P9-NEXT:    blr
3501;
3502; NOVSX-LABEL: fcmps_ugt_ppcf128:
3503; NOVSX:       # %bb.0:
3504; NOVSX-NEXT:    fcmpo cr0, f1, f3
3505; NOVSX-NEXT:    li r3, 1
3506; NOVSX-NEXT:    cror 4*cr5+gt, gt, un
3507; NOVSX-NEXT:    fcmpo cr1, f2, f4
3508; NOVSX-NEXT:    cror 4*cr5+lt, 4*cr1+gt, 4*cr1+un
3509; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3510; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3511; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3512; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3513; NOVSX-NEXT:    blr
3514  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ugt", metadata !"fpexcept.strict") #0
3515  %conv = zext i1 %cmp to i32
3516  ret i32 %conv
3517}
3518
3519define i32 @fcmps_uge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
3520; P8-LABEL: fcmps_uge_ppcf128:
3521; P8:       # %bb.0:
3522; P8-NEXT:    fcmpo cr0, f2, f4
3523; P8-NEXT:    li r3, 1
3524; P8-NEXT:    fcmpo cr1, f1, f3
3525; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, lt
3526; P8-NEXT:    crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
3527; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3528; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
3529; P8-NEXT:    blr
3530;
3531; P9-LABEL: fcmps_uge_ppcf128:
3532; P9:       # %bb.0:
3533; P9-NEXT:    fcmpo cr0, f2, f4
3534; P9-NEXT:    fcmpo cr1, f1, f3
3535; P9-NEXT:    li r3, 1
3536; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, lt
3537; P9-NEXT:    crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
3538; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3539; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3540; P9-NEXT:    blr
3541;
3542; NOVSX-LABEL: fcmps_uge_ppcf128:
3543; NOVSX:       # %bb.0:
3544; NOVSX-NEXT:    fcmpo cr0, f2, f4
3545; NOVSX-NEXT:    li r3, 1
3546; NOVSX-NEXT:    fcmpo cr1, f1, f3
3547; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, lt
3548; NOVSX-NEXT:    crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
3549; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3550; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3551; NOVSX-NEXT:    blr
3552  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"uge", metadata !"fpexcept.strict") #0
3553  %conv = zext i1 %cmp to i32
3554  ret i32 %conv
3555}
3556
3557define i32 @fcmps_ueq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
3558; P8-LABEL: fcmps_ueq_ppcf128:
3559; P8:       # %bb.0:
3560; P8-NEXT:    fcmpo cr0, f1, f3
3561; P8-NEXT:    li r3, 1
3562; P8-NEXT:    cror 4*cr5+gt, eq, un
3563; P8-NEXT:    fcmpo cr1, f2, f4
3564; P8-NEXT:    cror 4*cr5+lt, 4*cr1+eq, 4*cr1+un
3565; P8-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3566; P8-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3567; P8-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3568; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
3569; P8-NEXT:    blr
3570;
3571; P9-LABEL: fcmps_ueq_ppcf128:
3572; P9:       # %bb.0:
3573; P9-NEXT:    fcmpo cr0, f1, f3
3574; P9-NEXT:    fcmpo cr1, f2, f4
3575; P9-NEXT:    li r3, 1
3576; P9-NEXT:    cror 4*cr5+lt, 4*cr1+eq, 4*cr1+un
3577; P9-NEXT:    cror 4*cr5+gt, eq, un
3578; P9-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3579; P9-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3580; P9-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3581; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3582; P9-NEXT:    blr
3583;
3584; NOVSX-LABEL: fcmps_ueq_ppcf128:
3585; NOVSX:       # %bb.0:
3586; NOVSX-NEXT:    fcmpo cr0, f1, f3
3587; NOVSX-NEXT:    li r3, 1
3588; NOVSX-NEXT:    cror 4*cr5+gt, eq, un
3589; NOVSX-NEXT:    fcmpo cr1, f2, f4
3590; NOVSX-NEXT:    cror 4*cr5+lt, 4*cr1+eq, 4*cr1+un
3591; NOVSX-NEXT:    crand 4*cr5+lt, eq, 4*cr5+lt
3592; NOVSX-NEXT:    crandc 4*cr5+gt, 4*cr5+gt, eq
3593; NOVSX-NEXT:    crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
3594; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3595; NOVSX-NEXT:    blr
3596  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"ueq", metadata !"fpexcept.strict") #0
3597  %conv = zext i1 %cmp to i32
3598  ret i32 %conv
3599}
3600
3601define i32 @fcmps_une_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
3602; P8-LABEL: fcmps_une_ppcf128:
3603; P8:       # %bb.0:
3604; P8-NEXT:    fcmpo cr0, f2, f4
3605; P8-NEXT:    li r3, 1
3606; P8-NEXT:    fcmpo cr1, f1, f3
3607; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, eq
3608; P8-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
3609; P8-NEXT:    isel r3, 0, r3, 4*cr5+lt
3610; P8-NEXT:    blr
3611;
3612; P9-LABEL: fcmps_une_ppcf128:
3613; P9:       # %bb.0:
3614; P9-NEXT:    fcmpo cr0, f2, f4
3615; P9-NEXT:    fcmpo cr1, f1, f3
3616; P9-NEXT:    li r3, 1
3617; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, eq
3618; P9-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
3619; P9-NEXT:    isel r3, 0, r3, 4*cr5+lt
3620; P9-NEXT:    blr
3621;
3622; NOVSX-LABEL: fcmps_une_ppcf128:
3623; NOVSX:       # %bb.0:
3624; NOVSX-NEXT:    fcmpo cr0, f2, f4
3625; NOVSX-NEXT:    li r3, 1
3626; NOVSX-NEXT:    fcmpo cr1, f1, f3
3627; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, eq
3628; NOVSX-NEXT:    crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
3629; NOVSX-NEXT:    isel r3, 0, r3, 4*cr5+lt
3630; NOVSX-NEXT:    blr
3631  %cmp = call i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128 %a, ppc_fp128 %b, metadata !"une", metadata !"fpexcept.strict") #0
3632  %conv = zext i1 %cmp to i32
3633  ret i32 %conv
3634}
3635
3636attributes #0 = { strictfp nounwind }
3637
3638declare i1 @llvm.experimental.constrained.fcmp.f32(float, float, metadata, metadata)
3639declare i1 @llvm.experimental.constrained.fcmp.f64(double, double, metadata, metadata)
3640declare i1 @llvm.experimental.constrained.fcmps.f32(float, float, metadata, metadata)
3641declare i1 @llvm.experimental.constrained.fcmps.f64(double, double, metadata, metadata)
3642declare i1 @llvm.experimental.constrained.fcmps.f128(fp128, fp128, metadata, metadata)
3643declare i1 @llvm.experimental.constrained.fcmp.f128(fp128, fp128, metadata, metadata)
3644declare i1 @llvm.experimental.constrained.fcmps.ppcf128(ppc_fp128, ppc_fp128, metadata, metadata)
3645declare i1 @llvm.experimental.constrained.fcmp.ppcf128(ppc_fp128, ppc_fp128, metadata, metadata)
3646