xref: /llvm-project/llvm/test/CodeGen/PowerPC/fast-isel-load-store-vsx.ll (revision 427fb35192f1f7bb694a5910b05abc5925a798b2)
1; RUN: llc < %s -O0 -fast-isel -mattr=+vsx -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -ppc-late-peephole=false | FileCheck %s --check-prefix=ELF64VSX
2
3;; The semantics of VSX stores for when R0 is used is different depending on
4;; whether it is used as base or offset. If used as base, the effective
5;; address computation will use zero regardless of the content of R0. If used as
6;; an offset the content will be used in the effective address. We observed that
7;; for some constructors, the initialization values were being stored without
8;; an offset register being specified which was causing R0 to be used as offset
9;; in regions where it contained the value in the link register. This test
10;; verifies that R0 is used as base in these situations.
11
12%SomeStruct = type { double }
13
14; ELF64VSX-LABEL: SomeStructCtor
15define linkonce_odr void @SomeStructCtor(ptr %this, double %V) unnamed_addr align 2 {
16entry:
17  %this.addr = alloca ptr, align 8
18  %V.addr = alloca double, align 8
19  store ptr %this, ptr %this.addr, align 8
20; ELF64VSX: stfd {{[0-9][0-9]?}}, -{{[1-9][0-9]?}}({{[1-9][0-9]?}})
21  store double %V, ptr %V.addr, align 8
22  %this1 = load ptr, ptr %this.addr
23; ELF64VSX: stxsdx {{[0-9][0-9]?}}, 0, {{[1-9][0-9]?}}
24  %0 = load double, ptr %V.addr, align 8
25  store double %0, ptr %this1, align 8
26  ret void
27 }
28