1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=PPC64 2; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr7 | FileCheck %s --check-prefix=PPC64 3 4@a = global i8 1, align 1 5@b = global i16 2, align 2 6@c = global i32 4, align 4 7 8define void @t1() nounwind { 9; PPC64: t1 10 %1 = load i8, ptr @a, align 1 11 call void @foo1(i8 zeroext %1) 12; PPC64: lbz 13; PPC64-NOT: rldicl 14; PPC64-NOT: rlwinm 15 ret void 16} 17 18define void @t2() nounwind { 19; PPC64: t2 20 %1 = load i16, ptr @b, align 2 21 call void @foo2(i16 zeroext %1) 22; PPC64: lhz 23; PPC64-NOT: rldicl 24; PPC64-NOT: rlwinm 25 ret void 26} 27 28define void @t2a() nounwind { 29; PPC64: t2a 30 %1 = load i32, ptr @c, align 4 31 call void @foo3(i32 zeroext %1) 32; PPC64: lwz 33; PPC64-NOT: rldicl 34; PPC64-NOT: rlwinm 35 ret void 36} 37 38declare void @foo1(i8 zeroext) 39declare void @foo2(i16 zeroext) 40declare void @foo3(i32 zeroext) 41 42define i32 @t3() nounwind { 43; PPC64: t3 44 %1 = load i8, ptr @a, align 1 45 %2 = zext i8 %1 to i32 46; PPC64: lbz 47; PPC64-NOT: rlwinm 48 ret i32 %2 49} 50 51define i32 @t4() nounwind { 52; PPC64: t4 53 %1 = load i16, ptr @b, align 2 54 %2 = zext i16 %1 to i32 55; PPC64: lhz 56; PPC64-NOT: rlwinm 57 ret i32 %2 58} 59 60define i32 @t5() nounwind { 61; PPC64: t5 62 %1 = load i16, ptr @b, align 2 63 %2 = sext i16 %1 to i32 64; PPC64: lha 65; PPC64-NOT: rlwinm 66 ret i32 %2 67} 68 69define i32 @t6() nounwind { 70; PPC64: t6 71 %1 = load i8, ptr @a, align 2 72 %2 = sext i8 %1 to i32 73; PPC64: lbz 74; PPC64-NOT: rlwinm 75 ret i32 %2 76} 77 78define i64 @t7() nounwind { 79; PPC64: t7 80 %1 = load i8, ptr @a, align 1 81 %2 = zext i8 %1 to i64 82; PPC64: lbz 83; PPC64-NOT: rldicl 84 ret i64 %2 85} 86 87define i64 @t8() nounwind { 88; PPC64: t8 89 %1 = load i16, ptr @b, align 2 90 %2 = zext i16 %1 to i64 91; PPC64: lhz 92; PPC64-NOT: rldicl 93 ret i64 %2 94} 95 96define i64 @t9() nounwind { 97; PPC64: t9 98 %1 = load i16, ptr @b, align 2 99 %2 = sext i16 %1 to i64 100; PPC64: lha 101; PPC64-NOT: extsh 102 ret i64 %2 103} 104 105define i64 @t10() nounwind { 106; PPC64: t10 107 %1 = load i8, ptr @a, align 2 108 %2 = sext i8 %1 to i64 109; PPC64: lbz 110; PPC64: extsb 111 ret i64 %2 112} 113 114define i64 @t11() nounwind { 115; PPC64: t11 116 %1 = load i32, ptr @c, align 4 117 %2 = zext i32 %1 to i64 118; PPC64: lwz 119; PPC64-NOT: rldicl 120 ret i64 %2 121} 122 123define i64 @t12() nounwind { 124; PPC64: t12 125 %1 = load i32, ptr @c, align 4 126 %2 = sext i32 %1 to i64 127; PPC64: lwa 128; PPC64-NOT: extsw 129 ret i64 %2 130} 131