xref: /llvm-project/llvm/test/CodeGen/PowerPC/f128-rounding.ll (revision eb7d16ea25649909373e324e6ebf36774cabdbfa)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \
3; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s
4; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \
5; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
6; RUN:   -check-prefix=CHECK-P8
7
8define void @qp_trunc(ptr nocapture readonly %a, ptr nocapture %res) {
9; CHECK-LABEL: qp_trunc:
10; CHECK:       # %bb.0: # %entry
11; CHECK-NEXT:    lxv v2, 0(r3)
12; CHECK-NEXT:    xsrqpi 1, v2, v2, 1
13; CHECK-NEXT:    stxv v2, 0(r4)
14; CHECK-NEXT:    blr
15;
16; CHECK-P8-LABEL: qp_trunc:
17; CHECK-P8:       # %bb.0: # %entry
18; CHECK-P8-NEXT:    mflr r0
19; CHECK-P8-NEXT:    .cfi_def_cfa_offset 48
20; CHECK-P8-NEXT:    .cfi_offset lr, 16
21; CHECK-P8-NEXT:    .cfi_offset r30, -16
22; CHECK-P8-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
23; CHECK-P8-NEXT:    stdu r1, -48(r1)
24; CHECK-P8-NEXT:    std r0, 64(r1)
25; CHECK-P8-NEXT:    mr r30, r4
26; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
27; CHECK-P8-NEXT:    xxswapd v2, vs0
28; CHECK-P8-NEXT:    bl truncf128
29; CHECK-P8-NEXT:    nop
30; CHECK-P8-NEXT:    xxswapd vs0, v2
31; CHECK-P8-NEXT:    stxvd2x vs0, 0, r30
32; CHECK-P8-NEXT:    addi r1, r1, 48
33; CHECK-P8-NEXT:    ld r0, 16(r1)
34; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
35; CHECK-P8-NEXT:    mtlr r0
36; CHECK-P8-NEXT:    blr
37entry:
38  %0 = load fp128, ptr %a, align 16
39  %1 = tail call fp128 @llvm.trunc.f128(fp128 %0)
40  store fp128 %1, ptr %res, align 16
41  ret void
42}
43declare fp128     @llvm.trunc.f128(fp128 %Val)
44
45define void @qp_rint(ptr nocapture readonly %a, ptr nocapture %res) {
46; CHECK-LABEL: qp_rint:
47; CHECK:       # %bb.0: # %entry
48; CHECK-NEXT:    lxv v2, 0(r3)
49; CHECK-NEXT:    xsrqpix 0, v2, v2, 3
50; CHECK-NEXT:    stxv v2, 0(r4)
51; CHECK-NEXT:    blr
52;
53; CHECK-P8-LABEL: qp_rint:
54; CHECK-P8:       # %bb.0: # %entry
55; CHECK-P8-NEXT:    mflr r0
56; CHECK-P8-NEXT:    .cfi_def_cfa_offset 48
57; CHECK-P8-NEXT:    .cfi_offset lr, 16
58; CHECK-P8-NEXT:    .cfi_offset r30, -16
59; CHECK-P8-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
60; CHECK-P8-NEXT:    stdu r1, -48(r1)
61; CHECK-P8-NEXT:    std r0, 64(r1)
62; CHECK-P8-NEXT:    mr r30, r4
63; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
64; CHECK-P8-NEXT:    xxswapd v2, vs0
65; CHECK-P8-NEXT:    bl rintf128
66; CHECK-P8-NEXT:    nop
67; CHECK-P8-NEXT:    xxswapd vs0, v2
68; CHECK-P8-NEXT:    stxvd2x vs0, 0, r30
69; CHECK-P8-NEXT:    addi r1, r1, 48
70; CHECK-P8-NEXT:    ld r0, 16(r1)
71; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
72; CHECK-P8-NEXT:    mtlr r0
73; CHECK-P8-NEXT:    blr
74entry:
75  %0 = load fp128, ptr %a, align 16
76  %1 = tail call fp128 @llvm.rint.f128(fp128 %0)
77  store fp128 %1, ptr %res, align 16
78  ret void
79}
80declare fp128     @llvm.rint.f128(fp128 %Val)
81
82define void @qp_nearbyint(ptr nocapture readonly %a, ptr nocapture %res) {
83; CHECK-LABEL: qp_nearbyint:
84; CHECK:       # %bb.0: # %entry
85; CHECK-NEXT:    lxv v2, 0(r3)
86; CHECK-NEXT:    xsrqpi 0, v2, v2, 3
87; CHECK-NEXT:    stxv v2, 0(r4)
88; CHECK-NEXT:    blr
89;
90; CHECK-P8-LABEL: qp_nearbyint:
91; CHECK-P8:       # %bb.0: # %entry
92; CHECK-P8-NEXT:    mflr r0
93; CHECK-P8-NEXT:    .cfi_def_cfa_offset 48
94; CHECK-P8-NEXT:    .cfi_offset lr, 16
95; CHECK-P8-NEXT:    .cfi_offset r30, -16
96; CHECK-P8-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
97; CHECK-P8-NEXT:    stdu r1, -48(r1)
98; CHECK-P8-NEXT:    std r0, 64(r1)
99; CHECK-P8-NEXT:    mr r30, r4
100; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
101; CHECK-P8-NEXT:    xxswapd v2, vs0
102; CHECK-P8-NEXT:    bl nearbyintf128
103; CHECK-P8-NEXT:    nop
104; CHECK-P8-NEXT:    xxswapd vs0, v2
105; CHECK-P8-NEXT:    stxvd2x vs0, 0, r30
106; CHECK-P8-NEXT:    addi r1, r1, 48
107; CHECK-P8-NEXT:    ld r0, 16(r1)
108; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
109; CHECK-P8-NEXT:    mtlr r0
110; CHECK-P8-NEXT:    blr
111entry:
112  %0 = load fp128, ptr %a, align 16
113  %1 = tail call fp128 @llvm.nearbyint.f128(fp128 %0)
114  store fp128 %1, ptr %res, align 16
115  ret void
116}
117declare fp128     @llvm.nearbyint.f128(fp128 %Val)
118
119define void @qp_round(ptr nocapture readonly %a, ptr nocapture %res) {
120; CHECK-LABEL: qp_round:
121; CHECK:       # %bb.0: # %entry
122; CHECK-NEXT:    lxv v2, 0(r3)
123; CHECK-NEXT:    xsrqpi 0, v2, v2, 0
124; CHECK-NEXT:    stxv v2, 0(r4)
125; CHECK-NEXT:    blr
126;
127; CHECK-P8-LABEL: qp_round:
128; CHECK-P8:       # %bb.0: # %entry
129; CHECK-P8-NEXT:    mflr r0
130; CHECK-P8-NEXT:    .cfi_def_cfa_offset 48
131; CHECK-P8-NEXT:    .cfi_offset lr, 16
132; CHECK-P8-NEXT:    .cfi_offset r30, -16
133; CHECK-P8-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
134; CHECK-P8-NEXT:    stdu r1, -48(r1)
135; CHECK-P8-NEXT:    std r0, 64(r1)
136; CHECK-P8-NEXT:    mr r30, r4
137; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
138; CHECK-P8-NEXT:    xxswapd v2, vs0
139; CHECK-P8-NEXT:    bl roundf128
140; CHECK-P8-NEXT:    nop
141; CHECK-P8-NEXT:    xxswapd vs0, v2
142; CHECK-P8-NEXT:    stxvd2x vs0, 0, r30
143; CHECK-P8-NEXT:    addi r1, r1, 48
144; CHECK-P8-NEXT:    ld r0, 16(r1)
145; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
146; CHECK-P8-NEXT:    mtlr r0
147; CHECK-P8-NEXT:    blr
148entry:
149  %0 = load fp128, ptr %a, align 16
150  %1 = tail call fp128 @llvm.round.f128(fp128 %0)
151  store fp128 %1, ptr %res, align 16
152  ret void
153}
154declare fp128     @llvm.round.f128(fp128 %Val)
155
156define void @qp_floor(ptr nocapture readonly %a, ptr nocapture %res) {
157; CHECK-LABEL: qp_floor:
158; CHECK:       # %bb.0: # %entry
159; CHECK-NEXT:    lxv v2, 0(r3)
160; CHECK-NEXT:    xsrqpi 1, v2, v2, 3
161; CHECK-NEXT:    stxv v2, 0(r4)
162; CHECK-NEXT:    blr
163;
164; CHECK-P8-LABEL: qp_floor:
165; CHECK-P8:       # %bb.0: # %entry
166; CHECK-P8-NEXT:    mflr r0
167; CHECK-P8-NEXT:    .cfi_def_cfa_offset 48
168; CHECK-P8-NEXT:    .cfi_offset lr, 16
169; CHECK-P8-NEXT:    .cfi_offset r30, -16
170; CHECK-P8-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
171; CHECK-P8-NEXT:    stdu r1, -48(r1)
172; CHECK-P8-NEXT:    std r0, 64(r1)
173; CHECK-P8-NEXT:    mr r30, r4
174; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
175; CHECK-P8-NEXT:    xxswapd v2, vs0
176; CHECK-P8-NEXT:    bl floorf128
177; CHECK-P8-NEXT:    nop
178; CHECK-P8-NEXT:    xxswapd vs0, v2
179; CHECK-P8-NEXT:    stxvd2x vs0, 0, r30
180; CHECK-P8-NEXT:    addi r1, r1, 48
181; CHECK-P8-NEXT:    ld r0, 16(r1)
182; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
183; CHECK-P8-NEXT:    mtlr r0
184; CHECK-P8-NEXT:    blr
185entry:
186  %0 = load fp128, ptr %a, align 16
187  %1 = tail call fp128 @llvm.floor.f128(fp128 %0)
188  store fp128 %1, ptr %res, align 16
189  ret void
190}
191declare fp128     @llvm.floor.f128(fp128 %Val)
192
193define void @qp_ceil(ptr nocapture readonly %a, ptr nocapture %res) {
194; CHECK-LABEL: qp_ceil:
195; CHECK:       # %bb.0: # %entry
196; CHECK-NEXT:    lxv v2, 0(r3)
197; CHECK-NEXT:    xsrqpi 1, v2, v2, 2
198; CHECK-NEXT:    stxv v2, 0(r4)
199; CHECK-NEXT:    blr
200;
201; CHECK-P8-LABEL: qp_ceil:
202; CHECK-P8:       # %bb.0: # %entry
203; CHECK-P8-NEXT:    mflr r0
204; CHECK-P8-NEXT:    .cfi_def_cfa_offset 48
205; CHECK-P8-NEXT:    .cfi_offset lr, 16
206; CHECK-P8-NEXT:    .cfi_offset r30, -16
207; CHECK-P8-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
208; CHECK-P8-NEXT:    stdu r1, -48(r1)
209; CHECK-P8-NEXT:    std r0, 64(r1)
210; CHECK-P8-NEXT:    mr r30, r4
211; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
212; CHECK-P8-NEXT:    xxswapd v2, vs0
213; CHECK-P8-NEXT:    bl ceilf128
214; CHECK-P8-NEXT:    nop
215; CHECK-P8-NEXT:    xxswapd vs0, v2
216; CHECK-P8-NEXT:    stxvd2x vs0, 0, r30
217; CHECK-P8-NEXT:    addi r1, r1, 48
218; CHECK-P8-NEXT:    ld r0, 16(r1)
219; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
220; CHECK-P8-NEXT:    mtlr r0
221; CHECK-P8-NEXT:    blr
222entry:
223  %0 = load fp128, ptr %a, align 16
224  %1 = tail call fp128 @llvm.ceil.f128(fp128 %0)
225  store fp128 %1, ptr %res, align 16
226  ret void
227}
228declare fp128     @llvm.ceil.f128(fp128 %Val)
229
230