xref: /llvm-project/llvm/test/CodeGen/PowerPC/f128-passByValue.ll (revision 032014ef103157bfd8403418538e25f3f58efa9d) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown -ppc-vsr-nums-as-vr \
3; RUN:   -verify-machineinstrs -ppc-asm-full-reg-names < %s | FileCheck %s
4; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown -ppc-vsr-nums-as-vr \
5; RUN:   -verify-machineinstrs -ppc-asm-full-reg-names < %s | FileCheck %s \
6; RUN:   -check-prefix=CHECK-P8
7
8; Function Attrs: norecurse nounwind readnone
9define fp128 @loadConstant() {
10; CHECK-LABEL: loadConstant:
11; CHECK:       # %bb.0: # %entry
12; CHECK-NEXT:    addis r3, r2, .LCPI0_0@toc@ha
13; CHECK-NEXT:    addi r3, r3, .LCPI0_0@toc@l
14; CHECK-NEXT:    lxv v2, 0(r3)
15; CHECK-NEXT:    blr
16;
17; CHECK-P8-LABEL: loadConstant:
18; CHECK-P8:       # %bb.0: # %entry
19; CHECK-P8-NEXT:    addis r3, r2, .LCPI0_0@toc@ha
20; CHECK-P8-NEXT:    addi r3, r3, .LCPI0_0@toc@l
21; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
22; CHECK-P8-NEXT:    xxswapd v2, vs0
23; CHECK-P8-NEXT:    blr
24  entry:
25    ret fp128 0xL00000000000000004001400000000000
26}
27
28; Function Attrs: norecurse nounwind readnone
29define fp128 @loadConstant2(fp128 %a, fp128 %b) {
30; CHECK-LABEL: loadConstant2:
31; CHECK:       # %bb.0: # %entry
32; CHECK-NEXT:    xsaddqp v2, v2, v3
33; CHECK-NEXT:    addis r3, r2, .LCPI1_0@toc@ha
34; CHECK-NEXT:    addi r3, r3, .LCPI1_0@toc@l
35; CHECK-NEXT:    lxv v3, 0(r3)
36; CHECK-NEXT:    xsaddqp v2, v2, v3
37; CHECK-NEXT:    blr
38;
39; CHECK-P8-LABEL: loadConstant2:
40; CHECK-P8:       # %bb.0: # %entry
41; CHECK-P8-NEXT:    mflr r0
42; CHECK-P8-NEXT:    stdu r1, -32(r1)
43; CHECK-P8-NEXT:    std r0, 48(r1)
44; CHECK-P8-NEXT:    .cfi_def_cfa_offset 32
45; CHECK-P8-NEXT:    .cfi_offset lr, 16
46; CHECK-P8-NEXT:    bl __addkf3
47; CHECK-P8-NEXT:    nop
48; CHECK-P8-NEXT:    addis r3, r2, .LCPI1_0@toc@ha
49; CHECK-P8-NEXT:    addi r3, r3, .LCPI1_0@toc@l
50; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
51; CHECK-P8-NEXT:    xxswapd v3, vs0
52; CHECK-P8-NEXT:    bl __addkf3
53; CHECK-P8-NEXT:    nop
54; CHECK-P8-NEXT:    addi r1, r1, 32
55; CHECK-P8-NEXT:    ld r0, 16(r1)
56; CHECK-P8-NEXT:    mtlr r0
57; CHECK-P8-NEXT:    blr
58  entry:
59    %add = fadd fp128 %a, %b
60      %add1 = fadd fp128 %add, 0xL00000000000000004001400000000000
61        ret fp128 %add1
62}
63
64; Test passing float128 by value.
65; Function Attrs: norecurse nounwind readnone
66define signext i32 @fp128Param(fp128 %a) {
67; CHECK-LABEL: fp128Param:
68; CHECK:       # %bb.0: # %entry
69; CHECK-NEXT:    xscvqpswz v2, v2
70; CHECK-NEXT:    mfvsrwz r3, v2
71; CHECK-NEXT:    extsw r3, r3
72; CHECK-NEXT:    blr
73;
74; CHECK-P8-LABEL: fp128Param:
75; CHECK-P8:       # %bb.0: # %entry
76; CHECK-P8-NEXT:    mflr r0
77; CHECK-P8-NEXT:    stdu r1, -32(r1)
78; CHECK-P8-NEXT:    std r0, 48(r1)
79; CHECK-P8-NEXT:    .cfi_def_cfa_offset 32
80; CHECK-P8-NEXT:    .cfi_offset lr, 16
81; CHECK-P8-NEXT:    bl __fixkfsi
82; CHECK-P8-NEXT:    nop
83; CHECK-P8-NEXT:    extsw r3, r3
84; CHECK-P8-NEXT:    addi r1, r1, 32
85; CHECK-P8-NEXT:    ld r0, 16(r1)
86; CHECK-P8-NEXT:    mtlr r0
87; CHECK-P8-NEXT:    blr
88entry:
89  %conv = fptosi fp128 %a to i32
90  ret i32 %conv
91}
92
93; Test float128 as return value.
94; Function Attrs: norecurse nounwind readnone
95define fp128 @fp128Return(fp128 %a, fp128 %b) {
96; CHECK-LABEL: fp128Return:
97; CHECK:       # %bb.0: # %entry
98; CHECK-NEXT:    xsaddqp v2, v2, v3
99; CHECK-NEXT:    blr
100;
101; CHECK-P8-LABEL: fp128Return:
102; CHECK-P8:       # %bb.0: # %entry
103; CHECK-P8-NEXT:    mflr r0
104; CHECK-P8-NEXT:    stdu r1, -32(r1)
105; CHECK-P8-NEXT:    std r0, 48(r1)
106; CHECK-P8-NEXT:    .cfi_def_cfa_offset 32
107; CHECK-P8-NEXT:    .cfi_offset lr, 16
108; CHECK-P8-NEXT:    bl __addkf3
109; CHECK-P8-NEXT:    nop
110; CHECK-P8-NEXT:    addi r1, r1, 32
111; CHECK-P8-NEXT:    ld r0, 16(r1)
112; CHECK-P8-NEXT:    mtlr r0
113; CHECK-P8-NEXT:    blr
114entry:
115  %add = fadd fp128 %a, %b
116  ret fp128 %add
117}
118
119; array of float128 types
120; Function Attrs: norecurse nounwind readonly
121define fp128 @fp128Array(ptr nocapture readonly %farray,
122; CHECK-LABEL: fp128Array:
123; CHECK:       # %bb.0: # %entry
124; CHECK-NEXT:    sldi r4, r4, 4
125; CHECK-NEXT:    lxv v2, 0(r3)
126; CHECK-NEXT:    add r3, r3, r4
127; CHECK-NEXT:    lxv v3, -16(r3)
128; CHECK-NEXT:    xsaddqp v2, v2, v3
129; CHECK-NEXT:    blr
130;
131; CHECK-P8-LABEL: fp128Array:
132; CHECK-P8:       # %bb.0: # %entry
133; CHECK-P8-NEXT:    mflr r0
134; CHECK-P8-NEXT:    stdu r1, -32(r1)
135; CHECK-P8-NEXT:    std r0, 48(r1)
136; CHECK-P8-NEXT:    .cfi_def_cfa_offset 32
137; CHECK-P8-NEXT:    .cfi_offset lr, 16
138; CHECK-P8-NEXT:    sldi r4, r4, 4
139; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
140; CHECK-P8-NEXT:    add r3, r3, r4
141; CHECK-P8-NEXT:    addi r3, r3, -16
142; CHECK-P8-NEXT:    xxswapd v2, vs0
143; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
144; CHECK-P8-NEXT:    xxswapd v3, vs0
145; CHECK-P8-NEXT:    bl __addkf3
146; CHECK-P8-NEXT:    nop
147; CHECK-P8-NEXT:    addi r1, r1, 32
148; CHECK-P8-NEXT:    ld r0, 16(r1)
149; CHECK-P8-NEXT:    mtlr r0
150; CHECK-P8-NEXT:    blr
151                         i32 signext %loopcnt, ptr nocapture readnone %sum) {
152entry:
153  %0 = load fp128, ptr %farray, align 16
154  %sub = add nsw i32 %loopcnt, -1
155  %idxprom = sext i32 %sub to i64
156  %arrayidx1 = getelementptr inbounds fp128, ptr %farray, i64 %idxprom
157  %1 = load fp128, ptr %arrayidx1, align 16
158  %add = fadd fp128 %0, %1
159  ret fp128 %add
160}
161
162; Up to 12 qualified floating-point arguments can be passed in v2-v13.
163; Function to test passing 13 float128 parameters.
164; Function Attrs: norecurse nounwind readnone
165define fp128 @maxVecParam(fp128 %p1, fp128 %p2, fp128 %p3, fp128 %p4, fp128 %p5,
166; CHECK-LABEL: maxVecParam:
167; CHECK:       # %bb.0: # %entry
168; CHECK-NEXT:    xsaddqp v2, v2, v3
169; CHECK-NEXT:    lxv v0, 224(r1)
170; CHECK-NEXT:    xsaddqp v2, v2, v4
171; CHECK-NEXT:    xsaddqp v2, v2, v5
172; CHECK-NEXT:    xsaddqp v2, v2, v6
173; CHECK-NEXT:    xsaddqp v2, v2, v7
174; CHECK-NEXT:    xsaddqp v2, v2, v8
175; CHECK-NEXT:    xsaddqp v2, v2, v9
176; CHECK-NEXT:    xsaddqp v2, v2, v10
177; CHECK-NEXT:    xsaddqp v2, v2, v11
178; CHECK-NEXT:    xsaddqp v2, v2, v12
179; CHECK-NEXT:    xsaddqp v2, v2, v13
180; CHECK-NEXT:    xssubqp v2, v2, v0
181; CHECK-NEXT:    blr
182;
183; CHECK-P8-LABEL: maxVecParam:
184; CHECK-P8:       # %bb.0: # %entry
185; CHECK-P8-NEXT:    mflr r0
186; CHECK-P8-NEXT:    stdu r1, -224(r1)
187; CHECK-P8-NEXT:    std r0, 240(r1)
188; CHECK-P8-NEXT:    .cfi_def_cfa_offset 224
189; CHECK-P8-NEXT:    .cfi_offset lr, 16
190; CHECK-P8-NEXT:    .cfi_offset v21, -176
191; CHECK-P8-NEXT:    .cfi_offset v22, -160
192; CHECK-P8-NEXT:    .cfi_offset v23, -144
193; CHECK-P8-NEXT:    .cfi_offset v24, -128
194; CHECK-P8-NEXT:    .cfi_offset v25, -112
195; CHECK-P8-NEXT:    .cfi_offset v26, -96
196; CHECK-P8-NEXT:    .cfi_offset v27, -80
197; CHECK-P8-NEXT:    .cfi_offset v28, -64
198; CHECK-P8-NEXT:    .cfi_offset v29, -48
199; CHECK-P8-NEXT:    .cfi_offset v30, -32
200; CHECK-P8-NEXT:    .cfi_offset v31, -16
201; CHECK-P8-NEXT:    li r3, 48
202; CHECK-P8-NEXT:    stvx v21, r1, r3 # 16-byte Folded Spill
203; CHECK-P8-NEXT:    li r3, 64
204; CHECK-P8-NEXT:    stvx v22, r1, r3 # 16-byte Folded Spill
205; CHECK-P8-NEXT:    li r3, 80
206; CHECK-P8-NEXT:    vmr v22, v4
207; CHECK-P8-NEXT:    stvx v23, r1, r3 # 16-byte Folded Spill
208; CHECK-P8-NEXT:    li r3, 96
209; CHECK-P8-NEXT:    vmr v23, v5
210; CHECK-P8-NEXT:    stvx v24, r1, r3 # 16-byte Folded Spill
211; CHECK-P8-NEXT:    li r3, 112
212; CHECK-P8-NEXT:    vmr v24, v6
213; CHECK-P8-NEXT:    stvx v25, r1, r3 # 16-byte Folded Spill
214; CHECK-P8-NEXT:    li r3, 128
215; CHECK-P8-NEXT:    vmr v25, v7
216; CHECK-P8-NEXT:    stvx v26, r1, r3 # 16-byte Folded Spill
217; CHECK-P8-NEXT:    li r3, 144
218; CHECK-P8-NEXT:    vmr v26, v8
219; CHECK-P8-NEXT:    stvx v27, r1, r3 # 16-byte Folded Spill
220; CHECK-P8-NEXT:    li r3, 160
221; CHECK-P8-NEXT:    vmr v27, v9
222; CHECK-P8-NEXT:    stvx v28, r1, r3 # 16-byte Folded Spill
223; CHECK-P8-NEXT:    li r3, 176
224; CHECK-P8-NEXT:    vmr v28, v10
225; CHECK-P8-NEXT:    stvx v29, r1, r3 # 16-byte Folded Spill
226; CHECK-P8-NEXT:    li r3, 192
227; CHECK-P8-NEXT:    vmr v29, v11
228; CHECK-P8-NEXT:    stvx v30, r1, r3 # 16-byte Folded Spill
229; CHECK-P8-NEXT:    li r3, 208
230; CHECK-P8-NEXT:    vmr v30, v12
231; CHECK-P8-NEXT:    stvx v31, r1, r3 # 16-byte Folded Spill
232; CHECK-P8-NEXT:    addi r3, r1, 448
233; CHECK-P8-NEXT:    vmr v31, v13
234; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
235; CHECK-P8-NEXT:    xxswapd v21, vs0
236; CHECK-P8-NEXT:    bl __addkf3
237; CHECK-P8-NEXT:    nop
238; CHECK-P8-NEXT:    vmr v3, v22
239; CHECK-P8-NEXT:    bl __addkf3
240; CHECK-P8-NEXT:    nop
241; CHECK-P8-NEXT:    vmr v3, v23
242; CHECK-P8-NEXT:    bl __addkf3
243; CHECK-P8-NEXT:    nop
244; CHECK-P8-NEXT:    vmr v3, v24
245; CHECK-P8-NEXT:    bl __addkf3
246; CHECK-P8-NEXT:    nop
247; CHECK-P8-NEXT:    vmr v3, v25
248; CHECK-P8-NEXT:    bl __addkf3
249; CHECK-P8-NEXT:    nop
250; CHECK-P8-NEXT:    vmr v3, v26
251; CHECK-P8-NEXT:    bl __addkf3
252; CHECK-P8-NEXT:    nop
253; CHECK-P8-NEXT:    vmr v3, v27
254; CHECK-P8-NEXT:    bl __addkf3
255; CHECK-P8-NEXT:    nop
256; CHECK-P8-NEXT:    vmr v3, v28
257; CHECK-P8-NEXT:    bl __addkf3
258; CHECK-P8-NEXT:    nop
259; CHECK-P8-NEXT:    vmr v3, v29
260; CHECK-P8-NEXT:    bl __addkf3
261; CHECK-P8-NEXT:    nop
262; CHECK-P8-NEXT:    vmr v3, v30
263; CHECK-P8-NEXT:    bl __addkf3
264; CHECK-P8-NEXT:    nop
265; CHECK-P8-NEXT:    vmr v3, v31
266; CHECK-P8-NEXT:    bl __addkf3
267; CHECK-P8-NEXT:    nop
268; CHECK-P8-NEXT:    vmr v3, v21
269; CHECK-P8-NEXT:    bl __subkf3
270; CHECK-P8-NEXT:    nop
271; CHECK-P8-NEXT:    li r3, 208
272; CHECK-P8-NEXT:    lvx v31, r1, r3 # 16-byte Folded Reload
273; CHECK-P8-NEXT:    li r3, 192
274; CHECK-P8-NEXT:    lvx v30, r1, r3 # 16-byte Folded Reload
275; CHECK-P8-NEXT:    li r3, 176
276; CHECK-P8-NEXT:    lvx v29, r1, r3 # 16-byte Folded Reload
277; CHECK-P8-NEXT:    li r3, 160
278; CHECK-P8-NEXT:    lvx v28, r1, r3 # 16-byte Folded Reload
279; CHECK-P8-NEXT:    li r3, 144
280; CHECK-P8-NEXT:    lvx v27, r1, r3 # 16-byte Folded Reload
281; CHECK-P8-NEXT:    li r3, 128
282; CHECK-P8-NEXT:    lvx v26, r1, r3 # 16-byte Folded Reload
283; CHECK-P8-NEXT:    li r3, 112
284; CHECK-P8-NEXT:    lvx v25, r1, r3 # 16-byte Folded Reload
285; CHECK-P8-NEXT:    li r3, 96
286; CHECK-P8-NEXT:    lvx v24, r1, r3 # 16-byte Folded Reload
287; CHECK-P8-NEXT:    li r3, 80
288; CHECK-P8-NEXT:    lvx v23, r1, r3 # 16-byte Folded Reload
289; CHECK-P8-NEXT:    li r3, 64
290; CHECK-P8-NEXT:    lvx v22, r1, r3 # 16-byte Folded Reload
291; CHECK-P8-NEXT:    li r3, 48
292; CHECK-P8-NEXT:    lvx v21, r1, r3 # 16-byte Folded Reload
293; CHECK-P8-NEXT:    addi r1, r1, 224
294; CHECK-P8-NEXT:    ld r0, 16(r1)
295; CHECK-P8-NEXT:    mtlr r0
296; CHECK-P8-NEXT:    blr
297                          fp128 %p6, fp128 %p7, fp128 %p8, fp128 %p9, fp128 %p10,
298                          fp128 %p11, fp128 %p12, fp128 %p13) {
299entry:
300  %add = fadd fp128 %p1, %p2
301  %add1 = fadd fp128 %add, %p3
302  %add2 = fadd fp128 %add1, %p4
303  %add3 = fadd fp128 %add2, %p5
304  %add4 = fadd fp128 %add3, %p6
305  %add5 = fadd fp128 %add4, %p7
306  %add6 = fadd fp128 %add5, %p8
307  %add7 = fadd fp128 %add6, %p9
308  %add8 = fadd fp128 %add7, %p10
309  %add9 = fadd fp128 %add8, %p11
310  %add10 = fadd fp128 %add9, %p12
311  %sub = fsub fp128 %add10, %p13
312  ret fp128 %sub
313}
314
315; Passing a mix of float128 and other type parameters.
316; Function Attrs: norecurse nounwind readnone
317define fp128 @mixParam_01(fp128 %a, i32 signext %i, fp128 %b) {
318; CHECK-LABEL: mixParam_01:
319; CHECK:       # %bb.0: # %entry
320; CHECK-NEXT:    xsaddqp v2, v2, v3
321; CHECK-NEXT:    mtvsrwa v3, r5
322; CHECK-NEXT:    xscvsdqp v3, v3
323; CHECK-NEXT:    xsaddqp v2, v2, v3
324; CHECK-NEXT:    blr
325;
326; CHECK-P8-LABEL: mixParam_01:
327; CHECK-P8:       # %bb.0: # %entry
328; CHECK-P8-NEXT:    mflr r0
329; CHECK-P8-NEXT:    stdu r1, -80(r1)
330; CHECK-P8-NEXT:    std r0, 96(r1)
331; CHECK-P8-NEXT:    .cfi_def_cfa_offset 80
332; CHECK-P8-NEXT:    .cfi_offset lr, 16
333; CHECK-P8-NEXT:    .cfi_offset r30, -16
334; CHECK-P8-NEXT:    .cfi_offset v31, -32
335; CHECK-P8-NEXT:    li r3, 48
336; CHECK-P8-NEXT:    std r30, 64(r1) # 8-byte Folded Spill
337; CHECK-P8-NEXT:    mr r30, r5
338; CHECK-P8-NEXT:    stvx v31, r1, r3 # 16-byte Folded Spill
339; CHECK-P8-NEXT:    bl __addkf3
340; CHECK-P8-NEXT:    nop
341; CHECK-P8-NEXT:    mr r3, r30
342; CHECK-P8-NEXT:    vmr v31, v2
343; CHECK-P8-NEXT:    bl __floatsikf
344; CHECK-P8-NEXT:    nop
345; CHECK-P8-NEXT:    vmr v3, v2
346; CHECK-P8-NEXT:    vmr v2, v31
347; CHECK-P8-NEXT:    bl __addkf3
348; CHECK-P8-NEXT:    nop
349; CHECK-P8-NEXT:    li r3, 48
350; CHECK-P8-NEXT:    ld r30, 64(r1) # 8-byte Folded Reload
351; CHECK-P8-NEXT:    lvx v31, r1, r3 # 16-byte Folded Reload
352; CHECK-P8-NEXT:    addi r1, r1, 80
353; CHECK-P8-NEXT:    ld r0, 16(r1)
354; CHECK-P8-NEXT:    mtlr r0
355; CHECK-P8-NEXT:    blr
356entry:
357  %add = fadd fp128 %a, %b
358  %conv = sitofp i32 %i to fp128
359  %add1 = fadd fp128 %add, %conv
360  ret fp128 %add1
361}
362; Function Attrs: norecurse nounwind readnone
363define fastcc fp128 @mixParam_01f(fp128 %a, i32 signext %i, fp128 %b) {
364; CHECK-LABEL: mixParam_01f:
365; CHECK:       # %bb.0: # %entry
366; CHECK-NEXT:    xsaddqp v2, v2, v3
367; CHECK-NEXT:    mtvsrwa v3, r3
368; CHECK-NEXT:    xscvsdqp v3, v3
369; CHECK-NEXT:    xsaddqp v2, v2, v3
370; CHECK-NEXT:    blr
371;
372; CHECK-P8-LABEL: mixParam_01f:
373; CHECK-P8:       # %bb.0: # %entry
374; CHECK-P8-NEXT:    mflr r0
375; CHECK-P8-NEXT:    stdu r1, -80(r1)
376; CHECK-P8-NEXT:    std r0, 96(r1)
377; CHECK-P8-NEXT:    .cfi_def_cfa_offset 80
378; CHECK-P8-NEXT:    .cfi_offset lr, 16
379; CHECK-P8-NEXT:    .cfi_offset r30, -16
380; CHECK-P8-NEXT:    .cfi_offset v31, -32
381; CHECK-P8-NEXT:    li r4, 48
382; CHECK-P8-NEXT:    std r30, 64(r1) # 8-byte Folded Spill
383; CHECK-P8-NEXT:    mr r30, r3
384; CHECK-P8-NEXT:    stvx v31, r1, r4 # 16-byte Folded Spill
385; CHECK-P8-NEXT:    bl __addkf3
386; CHECK-P8-NEXT:    nop
387; CHECK-P8-NEXT:    mr r3, r30
388; CHECK-P8-NEXT:    vmr v31, v2
389; CHECK-P8-NEXT:    bl __floatsikf
390; CHECK-P8-NEXT:    nop
391; CHECK-P8-NEXT:    vmr v3, v2
392; CHECK-P8-NEXT:    vmr v2, v31
393; CHECK-P8-NEXT:    bl __addkf3
394; CHECK-P8-NEXT:    nop
395; CHECK-P8-NEXT:    li r3, 48
396; CHECK-P8-NEXT:    ld r30, 64(r1) # 8-byte Folded Reload
397; CHECK-P8-NEXT:    lvx v31, r1, r3 # 16-byte Folded Reload
398; CHECK-P8-NEXT:    addi r1, r1, 80
399; CHECK-P8-NEXT:    ld r0, 16(r1)
400; CHECK-P8-NEXT:    mtlr r0
401; CHECK-P8-NEXT:    blr
402entry:
403  %add = fadd fp128 %a, %b
404  %conv = sitofp i32 %i to fp128
405  %add1 = fadd fp128 %add, %conv
406  ret fp128 %add1
407}
408
409; Function Attrs: norecurse nounwind
410define fp128 @mixParam_02(fp128 %p1, double %p2, ptr nocapture %p3,
411; CHECK-LABEL: mixParam_02:
412; CHECK:       # %bb.0: # %entry
413; CHECK-NEXT:    lwz r3, 96(r1)
414; CHECK-NEXT:    add r4, r7, r9
415; CHECK-NEXT:    xscpsgndp v3, f1, f1
416; CHECK-NEXT:    add r4, r4, r10
417; CHECK-NEXT:    xscvdpqp v3, v3
418; CHECK-NEXT:    add r3, r4, r3
419; CHECK-NEXT:    clrldi r3, r3, 32
420; CHECK-NEXT:    std r3, 0(r6)
421; CHECK-NEXT:    lxv v4, 0(r8)
422; CHECK-NEXT:    xsaddqp v2, v4, v2
423; CHECK-NEXT:    xsaddqp v2, v2, v3
424; CHECK-NEXT:    blr
425;
426; CHECK-P8-LABEL: mixParam_02:
427; CHECK-P8:       # %bb.0: # %entry
428; CHECK-P8-NEXT:    mflr r0
429; CHECK-P8-NEXT:    stdu r1, -80(r1)
430; CHECK-P8-NEXT:    std r0, 96(r1)
431; CHECK-P8-NEXT:    .cfi_def_cfa_offset 80
432; CHECK-P8-NEXT:    .cfi_offset lr, 16
433; CHECK-P8-NEXT:    .cfi_offset f31, -8
434; CHECK-P8-NEXT:    .cfi_offset v31, -32
435; CHECK-P8-NEXT:    li r3, 48
436; CHECK-P8-NEXT:    add r4, r7, r9
437; CHECK-P8-NEXT:    vmr v3, v2
438; CHECK-P8-NEXT:    stfd f31, 72(r1) # 8-byte Folded Spill
439; CHECK-P8-NEXT:    fmr f31, f1
440; CHECK-P8-NEXT:    stvx v31, r1, r3 # 16-byte Folded Spill
441; CHECK-P8-NEXT:    lwz r3, 176(r1)
442; CHECK-P8-NEXT:    add r4, r4, r10
443; CHECK-P8-NEXT:    add r3, r4, r3
444; CHECK-P8-NEXT:    clrldi r3, r3, 32
445; CHECK-P8-NEXT:    std r3, 0(r6)
446; CHECK-P8-NEXT:    lxvd2x vs0, 0, r8
447; CHECK-P8-NEXT:    xxswapd v2, vs0
448; CHECK-P8-NEXT:    bl __addkf3
449; CHECK-P8-NEXT:    nop
450; CHECK-P8-NEXT:    fmr f1, f31
451; CHECK-P8-NEXT:    vmr v31, v2
452; CHECK-P8-NEXT:    bl __extenddfkf2
453; CHECK-P8-NEXT:    nop
454; CHECK-P8-NEXT:    vmr v3, v2
455; CHECK-P8-NEXT:    vmr v2, v31
456; CHECK-P8-NEXT:    bl __addkf3
457; CHECK-P8-NEXT:    nop
458; CHECK-P8-NEXT:    li r3, 48
459; CHECK-P8-NEXT:    lfd f31, 72(r1) # 8-byte Folded Reload
460; CHECK-P8-NEXT:    lvx v31, r1, r3 # 16-byte Folded Reload
461; CHECK-P8-NEXT:    addi r1, r1, 80
462; CHECK-P8-NEXT:    ld r0, 16(r1)
463; CHECK-P8-NEXT:    mtlr r0
464; CHECK-P8-NEXT:    blr
465                          i16 signext %p4, ptr nocapture readonly %p5,
466                          i32 signext %p6, i8 zeroext %p7, i32 zeroext %p8) {
467entry:
468  %conv = sext i16 %p4 to i32
469  %add = add nsw i32 %conv, %p6
470  %conv1 = zext i8 %p7 to i32
471  %add2 = add nsw i32 %add, %conv1
472  %add3 = add i32 %add2, %p8
473  %conv4 = zext i32 %add3 to i64
474  store i64 %conv4, ptr %p3, align 8
475  %0 = load fp128, ptr %p5, align 16
476  %add5 = fadd fp128 %0, %p1
477  %conv6 = fpext double %p2 to fp128
478  %add7 = fadd fp128 %add5, %conv6
479  ret fp128 %add7
480}
481
482; Function Attrs: norecurse nounwind
483define fastcc fp128 @mixParam_02f(fp128 %p1, double %p2, ptr nocapture %p3,
484; CHECK-LABEL: mixParam_02f:
485; CHECK:       # %bb.0: # %entry
486; CHECK-NEXT:    add r4, r4, r6
487; CHECK-NEXT:    xscpsgndp v3, f1, f1
488; CHECK-NEXT:    add r4, r4, r7
489; CHECK-NEXT:    xscvdpqp v3, v3
490; CHECK-NEXT:    add r4, r4, r8
491; CHECK-NEXT:    clrldi r4, r4, 32
492; CHECK-NEXT:    std r4, 0(r3)
493; CHECK-NEXT:    lxv v4, 0(r5)
494; CHECK-NEXT:    xsaddqp v2, v4, v2
495; CHECK-NEXT:    xsaddqp v2, v2, v3
496; CHECK-NEXT:    blr
497;
498; CHECK-P8-LABEL: mixParam_02f:
499; CHECK-P8:       # %bb.0: # %entry
500; CHECK-P8-NEXT:    mflr r0
501; CHECK-P8-NEXT:    stdu r1, -80(r1)
502; CHECK-P8-NEXT:    std r0, 96(r1)
503; CHECK-P8-NEXT:    .cfi_def_cfa_offset 80
504; CHECK-P8-NEXT:    .cfi_offset lr, 16
505; CHECK-P8-NEXT:    .cfi_offset f31, -8
506; CHECK-P8-NEXT:    .cfi_offset v31, -32
507; CHECK-P8-NEXT:    add r4, r4, r6
508; CHECK-P8-NEXT:    li r9, 48
509; CHECK-P8-NEXT:    vmr v3, v2
510; CHECK-P8-NEXT:    stfd f31, 72(r1) # 8-byte Folded Spill
511; CHECK-P8-NEXT:    fmr f31, f1
512; CHECK-P8-NEXT:    add r4, r4, r7
513; CHECK-P8-NEXT:    stvx v31, r1, r9 # 16-byte Folded Spill
514; CHECK-P8-NEXT:    add r4, r4, r8
515; CHECK-P8-NEXT:    clrldi r4, r4, 32
516; CHECK-P8-NEXT:    std r4, 0(r3)
517; CHECK-P8-NEXT:    lxvd2x vs0, 0, r5
518; CHECK-P8-NEXT:    xxswapd v2, vs0
519; CHECK-P8-NEXT:    bl __addkf3
520; CHECK-P8-NEXT:    nop
521; CHECK-P8-NEXT:    fmr f1, f31
522; CHECK-P8-NEXT:    vmr v31, v2
523; CHECK-P8-NEXT:    bl __extenddfkf2
524; CHECK-P8-NEXT:    nop
525; CHECK-P8-NEXT:    vmr v3, v2
526; CHECK-P8-NEXT:    vmr v2, v31
527; CHECK-P8-NEXT:    bl __addkf3
528; CHECK-P8-NEXT:    nop
529; CHECK-P8-NEXT:    li r3, 48
530; CHECK-P8-NEXT:    lfd f31, 72(r1) # 8-byte Folded Reload
531; CHECK-P8-NEXT:    lvx v31, r1, r3 # 16-byte Folded Reload
532; CHECK-P8-NEXT:    addi r1, r1, 80
533; CHECK-P8-NEXT:    ld r0, 16(r1)
534; CHECK-P8-NEXT:    mtlr r0
535; CHECK-P8-NEXT:    blr
536                                  i16 signext %p4, ptr nocapture readonly %p5,
537                                  i32 signext %p6, i8 zeroext %p7, i32 zeroext %p8) {
538entry:
539  %conv = sext i16 %p4 to i32
540  %add = add nsw i32 %conv, %p6
541  %conv1 = zext i8 %p7 to i32
542  %add2 = add nsw i32 %add, %conv1
543  %add3 = add i32 %add2, %p8
544  %conv4 = zext i32 %add3 to i64
545  store i64 %conv4, ptr %p3, align 8
546  %0 = load fp128, ptr %p5, align 16
547  %add5 = fadd fp128 %0, %p1
548  %conv6 = fpext double %p2 to fp128
549  %add7 = fadd fp128 %add5, %conv6
550  ret fp128 %add7
551}
552
553; Passing a mix of float128 and vector parameters.
554; Function Attrs: norecurse nounwind
555define void @mixParam_03(fp128 %f1, ptr nocapture %d1, <4 x i32> %vec1,
556; CHECK-LABEL: mixParam_03:
557; CHECK:       # %bb.0: # %entry
558; CHECK-NEXT:    ld r3, 104(r1)
559; CHECK-NEXT:    stxv v2, 0(r9)
560; CHECK-NEXT:    stxv v3, 0(r3)
561; CHECK-NEXT:    mtvsrwa v3, r10
562; CHECK-NEXT:    lxv v2, 0(r9)
563; CHECK-NEXT:    xscvsdqp v3, v3
564; CHECK-NEXT:    xsaddqp v2, v2, v3
565; CHECK-NEXT:    xscvqpdp v2, v2
566; CHECK-NEXT:    stxsd v2, 0(r5)
567; CHECK-NEXT:    blr
568;
569; CHECK-P8-LABEL: mixParam_03:
570; CHECK-P8:       # %bb.0: # %entry
571; CHECK-P8-NEXT:    mflr r0
572; CHECK-P8-NEXT:    stdu r1, -80(r1)
573; CHECK-P8-NEXT:    std r0, 96(r1)
574; CHECK-P8-NEXT:    .cfi_def_cfa_offset 80
575; CHECK-P8-NEXT:    .cfi_offset lr, 16
576; CHECK-P8-NEXT:    .cfi_offset r30, -16
577; CHECK-P8-NEXT:    .cfi_offset v31, -32
578; CHECK-P8-NEXT:    ld r4, 184(r1)
579; CHECK-P8-NEXT:    xxswapd vs0, v2
580; CHECK-P8-NEXT:    xxswapd vs1, v3
581; CHECK-P8-NEXT:    li r3, 48
582; CHECK-P8-NEXT:    std r30, 64(r1) # 8-byte Folded Spill
583; CHECK-P8-NEXT:    mr r30, r5
584; CHECK-P8-NEXT:    stxvd2x vs0, 0, r9
585; CHECK-P8-NEXT:    stvx v31, r1, r3 # 16-byte Folded Spill
586; CHECK-P8-NEXT:    mr r3, r10
587; CHECK-P8-NEXT:    stxvd2x vs1, 0, r4
588; CHECK-P8-NEXT:    lxvd2x vs0, 0, r9
589; CHECK-P8-NEXT:    xxswapd v31, vs0
590; CHECK-P8-NEXT:    bl __floatsikf
591; CHECK-P8-NEXT:    nop
592; CHECK-P8-NEXT:    vmr v3, v2
593; CHECK-P8-NEXT:    vmr v2, v31
594; CHECK-P8-NEXT:    bl __addkf3
595; CHECK-P8-NEXT:    nop
596; CHECK-P8-NEXT:    bl __trunckfdf2
597; CHECK-P8-NEXT:    nop
598; CHECK-P8-NEXT:    li r3, 48
599; CHECK-P8-NEXT:    stfd f1, 0(r30)
600; CHECK-P8-NEXT:    ld r30, 64(r1) # 8-byte Folded Reload
601; CHECK-P8-NEXT:    lvx v31, r1, r3 # 16-byte Folded Reload
602; CHECK-P8-NEXT:    addi r1, r1, 80
603; CHECK-P8-NEXT:    ld r0, 16(r1)
604; CHECK-P8-NEXT:    mtlr r0
605; CHECK-P8-NEXT:    blr
606                         ptr nocapture %f2, i32 signext %i1, i8 zeroext %c1,
607                         ptr nocapture %vec2) {
608entry:
609  store fp128 %f1, ptr %f2, align 16
610  store <4 x i32> %vec1, ptr %vec2, align 16
611  %0 = load fp128, ptr %f2, align 16
612  %conv = sitofp i32 %i1 to fp128
613  %add = fadd fp128 %0, %conv
614  %conv1 = fptrunc fp128 %add to double
615  store double %conv1, ptr %d1, align 8
616  ret void
617}
618
619; Function Attrs: norecurse nounwind
620define fastcc void @mixParam_03f(fp128 %f1, ptr nocapture %d1, <4 x i32> %vec1,
621; CHECK-LABEL: mixParam_03f:
622; CHECK:       # %bb.0: # %entry
623; CHECK-NEXT:    stxv v2, 0(r4)
624; CHECK-NEXT:    stxv v3, 0(r7)
625; CHECK-NEXT:    lxv v2, 0(r4)
626; CHECK-NEXT:    mtvsrwa v3, r5
627; CHECK-NEXT:    xscvsdqp v3, v3
628; CHECK-NEXT:    xsaddqp v2, v2, v3
629; CHECK-NEXT:    xscvqpdp v2, v2
630; CHECK-NEXT:    stxsd v2, 0(r3)
631; CHECK-NEXT:    blr
632;
633; CHECK-P8-LABEL: mixParam_03f:
634; CHECK-P8:       # %bb.0: # %entry
635; CHECK-P8-NEXT:    mflr r0
636; CHECK-P8-NEXT:    stdu r1, -80(r1)
637; CHECK-P8-NEXT:    std r0, 96(r1)
638; CHECK-P8-NEXT:    .cfi_def_cfa_offset 80
639; CHECK-P8-NEXT:    .cfi_offset lr, 16
640; CHECK-P8-NEXT:    .cfi_offset r30, -16
641; CHECK-P8-NEXT:    .cfi_offset v31, -32
642; CHECK-P8-NEXT:    xxswapd vs0, v2
643; CHECK-P8-NEXT:    xxswapd vs1, v3
644; CHECK-P8-NEXT:    std r30, 64(r1) # 8-byte Folded Spill
645; CHECK-P8-NEXT:    li r6, 48
646; CHECK-P8-NEXT:    mr r30, r3
647; CHECK-P8-NEXT:    mr r3, r5
648; CHECK-P8-NEXT:    stxvd2x vs0, 0, r4
649; CHECK-P8-NEXT:    stxvd2x vs1, 0, r7
650; CHECK-P8-NEXT:    stvx v31, r1, r6 # 16-byte Folded Spill
651; CHECK-P8-NEXT:    lxvd2x vs0, 0, r4
652; CHECK-P8-NEXT:    xxswapd v31, vs0
653; CHECK-P8-NEXT:    bl __floatsikf
654; CHECK-P8-NEXT:    nop
655; CHECK-P8-NEXT:    vmr v3, v2
656; CHECK-P8-NEXT:    vmr v2, v31
657; CHECK-P8-NEXT:    bl __addkf3
658; CHECK-P8-NEXT:    nop
659; CHECK-P8-NEXT:    bl __trunckfdf2
660; CHECK-P8-NEXT:    nop
661; CHECK-P8-NEXT:    li r3, 48
662; CHECK-P8-NEXT:    stfd f1, 0(r30)
663; CHECK-P8-NEXT:    ld r30, 64(r1) # 8-byte Folded Reload
664; CHECK-P8-NEXT:    lvx v31, r1, r3 # 16-byte Folded Reload
665; CHECK-P8-NEXT:    addi r1, r1, 80
666; CHECK-P8-NEXT:    ld r0, 16(r1)
667; CHECK-P8-NEXT:    mtlr r0
668; CHECK-P8-NEXT:    blr
669                                 ptr nocapture %f2, i32 signext %i1, i8 zeroext %c1,
670                                 ptr nocapture %vec2) {
671entry:
672  store fp128 %f1, ptr %f2, align 16
673  store <4 x i32> %vec1, ptr %vec2, align 16
674  %0 = load fp128, ptr %f2, align 16
675  %conv = sitofp i32 %i1 to fp128
676  %add = fadd fp128 %0, %conv
677  %conv1 = fptrunc fp128 %add to double
678  store double %conv1, ptr %d1, align 8
679  ret void
680}
681
682; Function Attrs: noinline optnone
683define signext i32 @noopt_call_crash() #0 {
684; CHECK-LABEL: noopt_call_crash:
685; CHECK:       # %bb.0: # %entry
686; CHECK-NEXT:    mflr r0
687; CHECK-NEXT:    stdu r1, -96(r1)
688; CHECK-NEXT:    std r0, 112(r1)
689; CHECK-NEXT:    .cfi_def_cfa_offset 96
690; CHECK-NEXT:    .cfi_offset lr, 16
691; CHECK-NEXT:    bl in
692; CHECK-NEXT:    nop
693; CHECK-NEXT:    bl out
694; CHECK-NEXT:    nop
695; CHECK-NEXT:    li r3, 0
696; CHECK-NEXT:    addi r1, r1, 96
697; CHECK-NEXT:    ld r0, 16(r1)
698; CHECK-NEXT:    mtlr r0
699; CHECK-NEXT:    blr
700;
701; CHECK-P8-LABEL: noopt_call_crash:
702; CHECK-P8:       # %bb.0: # %entry
703; CHECK-P8-NEXT:    mflr r0
704; CHECK-P8-NEXT:    stdu r1, -96(r1)
705; CHECK-P8-NEXT:    std r0, 112(r1)
706; CHECK-P8-NEXT:    .cfi_def_cfa_offset 96
707; CHECK-P8-NEXT:    .cfi_offset lr, 16
708; CHECK-P8-NEXT:    bl in
709; CHECK-P8-NEXT:    nop
710; CHECK-P8-NEXT:    bl out
711; CHECK-P8-NEXT:    nop
712; CHECK-P8-NEXT:    li r3, 0
713; CHECK-P8-NEXT:    addi r1, r1, 96
714; CHECK-P8-NEXT:    ld r0, 16(r1)
715; CHECK-P8-NEXT:    mtlr r0
716; CHECK-P8-NEXT:    blr
717entry:
718  %call = call fp128 @in()
719  call void @out(fp128 %call)
720  ret i32 0
721}
722
723declare void @out(fp128)
724declare fp128 @in()
725
726attributes #0 = { noinline optnone }
727