xref: /llvm-project/llvm/test/CodeGen/PowerPC/f128-bitcast.ll (revision 22067a8eb43a7194e65913b47a9c724fde3ed68f)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \
3; RUN:   -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s
4; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-unknown-unknown -verify-machineinstrs \
5; RUN:   -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
6; RUN:   FileCheck %s --check-prefix=CHECK-BE
7; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \
8; RUN:   -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s \
9; RUN:   -check-prefix=CHECK-P8
10
11; Function Attrs: norecurse nounwind readnone
12define i64 @getPart1(fp128 %in) local_unnamed_addr {
13; CHECK-LABEL: getPart1:
14; CHECK:       # %bb.0: # %entry
15; CHECK-NEXT:    mfvsrld r3, v2
16; CHECK-NEXT:    blr
17;
18; CHECK-BE-LABEL: getPart1:
19; CHECK-BE:       # %bb.0: # %entry
20; CHECK-BE-NEXT:    mfvsrld r3, v2
21; CHECK-BE-NEXT:    blr
22;
23; CHECK-P8-LABEL: getPart1:
24; CHECK-P8:       # %bb.0: # %entry
25; CHECK-P8-NEXT:    xxswapd vs0, v2
26; CHECK-P8-NEXT:    mffprd r3, f0
27; CHECK-P8-NEXT:    blr
28entry:
29  %0 = bitcast fp128 %in to i128
30  %a.sroa.0.0.extract.trunc = trunc i128 %0 to i64
31  ret i64 %a.sroa.0.0.extract.trunc
32}
33
34; Function Attrs: norecurse nounwind readnone
35define i64 @getPart2(fp128 %in) local_unnamed_addr {
36; CHECK-LABEL: getPart2:
37; CHECK:       # %bb.0: # %entry
38; CHECK-NEXT:    mfvsrd r3, v2
39; CHECK-NEXT:    blr
40;
41; CHECK-BE-LABEL: getPart2:
42; CHECK-BE:       # %bb.0: # %entry
43; CHECK-BE-NEXT:    mfvsrd r3, v2
44; CHECK-BE-NEXT:    blr
45;
46; CHECK-P8-LABEL: getPart2:
47; CHECK-P8:       # %bb.0: # %entry
48; CHECK-P8-NEXT:    mfvsrd r3, v2
49; CHECK-P8-NEXT:    blr
50entry:
51  %0 = bitcast fp128 %in to i128
52  %a.sroa.0.8.extract.shift = lshr i128 %0, 64
53  %a.sroa.0.8.extract.trunc = trunc i128 %a.sroa.0.8.extract.shift to i64
54  ret i64 %a.sroa.0.8.extract.trunc
55}
56
57; Function Attrs: norecurse nounwind readnone
58define i64 @checkBitcast(fp128 %in, <2 x i64> %in2, ptr %out) local_unnamed_addr {
59; CHECK-LABEL: checkBitcast:
60; CHECK:       # %bb.0: # %entry
61; CHECK-NEXT:    mfvsrld r3, v2
62; CHECK-NEXT:    vaddudm v2, v2, v3
63; CHECK-NEXT:    stxv v2, 0(r7)
64; CHECK-NEXT:    blr
65;
66; CHECK-BE-LABEL: checkBitcast:
67; CHECK-BE:       # %bb.0: # %entry
68; CHECK-BE-NEXT:    mfvsrd r3, v2
69; CHECK-BE-NEXT:    vaddudm v2, v2, v3
70; CHECK-BE-NEXT:    stxv v2, 0(r7)
71; CHECK-BE-NEXT:    blr
72;
73; CHECK-P8-LABEL: checkBitcast:
74; CHECK-P8:       # %bb.0: # %entry
75; CHECK-P8-NEXT:    xxswapd vs0, v2
76; CHECK-P8-NEXT:    vaddudm v2, v2, v3
77; CHECK-P8-NEXT:    mffprd r3, f0
78; CHECK-P8-NEXT:    xxswapd vs1, v2
79; CHECK-P8-NEXT:    stxvd2x vs1, 0, r7
80; CHECK-P8-NEXT:    blr
81entry:
82  %0 = bitcast fp128 %in to <2 x i64>
83  %1 = extractelement <2 x i64> %0, i64 0
84  %2 = add <2 x i64> %0, %in2
85  store <2 x i64> %2, ptr %out, align 16
86  ret i64 %1
87}
88
89define <4 x i32> @truncBitcast(i512 %a) {
90; CHECK-LABEL: truncBitcast:
91; CHECK:       # %bb.0: # %entry
92; CHECK-NEXT:    mtvsrdd v2, r4, r3
93; CHECK-NEXT:    blr
94;
95; CHECK-BE-LABEL: truncBitcast:
96; CHECK-BE:       # %bb.0: # %entry
97; CHECK-BE-NEXT:    mtvsrdd v2, r9, r10
98; CHECK-BE-NEXT:    blr
99;
100; CHECK-P8-LABEL: truncBitcast:
101; CHECK-P8:       # %bb.0: # %entry
102; CHECK-P8-NEXT:    mtfprd f0, r3
103; CHECK-P8-NEXT:    mtfprd f1, r4
104; CHECK-P8-NEXT:    xxmrghd v2, vs1, vs0
105; CHECK-P8-NEXT:    blr
106entry:
107  %0 = trunc i512 %a to i128
108  %1 = bitcast i128 %0 to <4 x i32>
109  ret <4 x i32> %1
110}
111