xref: /llvm-project/llvm/test/CodeGen/PowerPC/expand-contiguous-isel.ll (revision aaa37d6755e635bbd62ba58896acd54ceef64610) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2target datalayout = "e-m:e-i64:64-n32:64"
3target triple = "powerpc64le-unknown-linux-gnu"
4; This file mainly tests that one of the ISEL instruction in the group uses the same register for operand RT, RA, RB
5; This redudant ISEL is introduced during register coalescing stage.
6
7; Register coalescing first create the foldable ISEL instruction as we have seen in expand-foldable-isel.ll:
8; %vreg85<def> = ISEL8 %vreg83, %vreg83, %vreg33:sub_eq
9
10; Later the register coalescer figures out it could further coalesce %vreg85 with %vreg83:
11; merge %vreg85:1@2288r into %vreg83:5@400B --> @400B
12; erased:	2288r	%vreg85<def> = COPY %vreg83
13
14; After that we have:
15; updated: 1504B	%vreg83<def> = ISEL8 %vreg83, %vreg83, %vreg33:sub_eq
16
17; RUN: llc -verify-machineinstrs -O2 -ppc-asm-full-reg-names -mcpu=pwr7 -mattr=+isel < %s | FileCheck %s --check-prefix=CHECK-GEN-ISEL-TRUE
18; RUN: llc -verify-machineinstrs -O2 -ppc-asm-full-reg-names -mcpu=pwr7 -mattr=-isel < %s | FileCheck %s --implicit-check-not isel
19
20@.str = private unnamed_addr constant [3 x i8] c"]]\00", align 1
21@.str.1 = private unnamed_addr constant [35 x i8] c"Index < Length && \22Invalid index!\22\00", align 1
22@.str.2 = private unnamed_addr constant [50 x i8] c"/home/jtony/src/llvm/include/llvm/ADT/StringRef.h\00", align 1
23@__PRETTY_FUNCTION__._ZNK4llvm9StringRefixEm = private unnamed_addr constant [47 x i8] c"char llvm::StringRef::operator[](size_t) const\00", align 1
24@.str.3 = private unnamed_addr constant [95 x i8] c"(data || length == 0) && \22StringRef cannot be built from a NULL argument with non-null length\22\00", align 1
25@__PRETTY_FUNCTION__._ZN4llvm9StringRefC2EPKcm = private unnamed_addr constant [49 x i8] c"llvm::StringRef::StringRef(const char *, size_t)\00", align 1
26define i64 @_Z3fn1N4llvm9StringRefE([2 x i64] %Str.coerce) {
27; CHECK-GEN-ISEL-TRUE-LABEL: _Z3fn1N4llvm9StringRefE:
28; CHECK-GEN-ISEL-TRUE:       # %bb.0: # %entry
29; CHECK-GEN-ISEL-TRUE-NEXT:    mflr r0
30; CHECK-GEN-ISEL-TRUE-NEXT:    stdu r1, -32(r1)
31; CHECK-GEN-ISEL-TRUE-NEXT:    std r0, 48(r1)
32; CHECK-GEN-ISEL-TRUE-NEXT:    .cfi_def_cfa_offset 32
33; CHECK-GEN-ISEL-TRUE-NEXT:    .cfi_offset lr, 16
34; CHECK-GEN-ISEL-TRUE-NEXT:    li r5, 2
35; CHECK-GEN-ISEL-TRUE-NEXT:    # implicit-def: $x6
36; CHECK-GEN-ISEL-TRUE-NEXT:    b .LBB0_3
37; CHECK-GEN-ISEL-TRUE-NEXT:    .p2align 4
38; CHECK-GEN-ISEL-TRUE-NEXT:  .LBB0_1: # %_ZNK4llvm9StringRefixEm.exit
39; CHECK-GEN-ISEL-TRUE-NEXT:    #
40; CHECK-GEN-ISEL-TRUE-NEXT:    cmplwi r7, 93
41; CHECK-GEN-ISEL-TRUE-NEXT:    addi r7, r6, -1
42; CHECK-GEN-ISEL-TRUE-NEXT:    iseleq r6, r7, r6
43; CHECK-GEN-ISEL-TRUE-NEXT:  .LBB0_2: # %_ZNK4llvm9StringRef6substrEmm.exit
44; CHECK-GEN-ISEL-TRUE-NEXT:    #
45; CHECK-GEN-ISEL-TRUE-NEXT:    addi r4, r4, -1
46; CHECK-GEN-ISEL-TRUE-NEXT:    addi r3, r3, 1
47; CHECK-GEN-ISEL-TRUE-NEXT:  .LBB0_3: # %while.cond.outer
48; CHECK-GEN-ISEL-TRUE-NEXT:    # =>This Loop Header: Depth=1
49; CHECK-GEN-ISEL-TRUE-NEXT:    # Child Loop BB0_5 Depth 2
50; CHECK-GEN-ISEL-TRUE-NEXT:    # Child Loop BB0_8 Depth 2
51; CHECK-GEN-ISEL-TRUE-NEXT:    cmpldi r6, 0
52; CHECK-GEN-ISEL-TRUE-NEXT:    beq cr0, .LBB0_8
53; CHECK-GEN-ISEL-TRUE-NEXT:  # %bb.4: # %while.cond.preheader
54; CHECK-GEN-ISEL-TRUE-NEXT:    #
55; CHECK-GEN-ISEL-TRUE-NEXT:    cmpldi r4, 0
56; CHECK-GEN-ISEL-TRUE-NEXT:    beq- cr0, .LBB0_15
57; CHECK-GEN-ISEL-TRUE-NEXT:    .p2align 5
58; CHECK-GEN-ISEL-TRUE-NEXT:  .LBB0_5: # %_ZNK4llvm9StringRefixEm.exit
59; CHECK-GEN-ISEL-TRUE-NEXT:    # Parent Loop BB0_3 Depth=1
60; CHECK-GEN-ISEL-TRUE-NEXT:    # => This Inner Loop Header: Depth=2
61; CHECK-GEN-ISEL-TRUE-NEXT:    lbz r7, 0(r3)
62; CHECK-GEN-ISEL-TRUE-NEXT:    cmplwi r7, 92
63; CHECK-GEN-ISEL-TRUE-NEXT:    bne cr0, .LBB0_1
64; CHECK-GEN-ISEL-TRUE-NEXT:  # %bb.6: # %if.then4
65; CHECK-GEN-ISEL-TRUE-NEXT:    #
66; CHECK-GEN-ISEL-TRUE-NEXT:    cmpldi r4, 2
67; CHECK-GEN-ISEL-TRUE-NEXT:    isellt r7, r4, r5
68; CHECK-GEN-ISEL-TRUE-NEXT:    add r3, r3, r7
69; CHECK-GEN-ISEL-TRUE-NEXT:    sub. r4, r4, r7
70; CHECK-GEN-ISEL-TRUE-NEXT:    bne+ cr0, .LBB0_5
71; CHECK-GEN-ISEL-TRUE-NEXT:    b .LBB0_15
72; CHECK-GEN-ISEL-TRUE-NEXT:    .p2align 5
73; CHECK-GEN-ISEL-TRUE-NEXT:  .LBB0_7: # %if.then4.us
74; CHECK-GEN-ISEL-TRUE-NEXT:    #
75; CHECK-GEN-ISEL-TRUE-NEXT:    isellt r6, r4, r5
76; CHECK-GEN-ISEL-TRUE-NEXT:    add r3, r3, r6
77; CHECK-GEN-ISEL-TRUE-NEXT:    sub r4, r4, r6
78; CHECK-GEN-ISEL-TRUE-NEXT:  .LBB0_8: # %while.cond.us
79; CHECK-GEN-ISEL-TRUE-NEXT:    # Parent Loop BB0_3 Depth=1
80; CHECK-GEN-ISEL-TRUE-NEXT:    # => This Inner Loop Header: Depth=2
81; CHECK-GEN-ISEL-TRUE-NEXT:    cmpldi r4, 2
82; CHECK-GEN-ISEL-TRUE-NEXT:    bge cr0, .LBB0_10
83; CHECK-GEN-ISEL-TRUE-NEXT:  # %bb.9: # %if.end.us
84; CHECK-GEN-ISEL-TRUE-NEXT:    #
85; CHECK-GEN-ISEL-TRUE-NEXT:    cmpldi cr1, r4, 0
86; CHECK-GEN-ISEL-TRUE-NEXT:    bne+ cr1, .LBB0_11
87; CHECK-GEN-ISEL-TRUE-NEXT:    b .LBB0_15
88; CHECK-GEN-ISEL-TRUE-NEXT:    .p2align 5
89; CHECK-GEN-ISEL-TRUE-NEXT:  .LBB0_10: # %if.end.i.i.us
90; CHECK-GEN-ISEL-TRUE-NEXT:    #
91; CHECK-GEN-ISEL-TRUE-NEXT:    lhz r6, 0(r3)
92; CHECK-GEN-ISEL-TRUE-NEXT:    cmplwi cr1, r6, 23901
93; CHECK-GEN-ISEL-TRUE-NEXT:    beq cr1, .LBB0_14
94; CHECK-GEN-ISEL-TRUE-NEXT:  .LBB0_11: # %_ZNK4llvm9StringRefixEm.exit.us
95; CHECK-GEN-ISEL-TRUE-NEXT:    #
96; CHECK-GEN-ISEL-TRUE-NEXT:    lbz r6, 0(r3)
97; CHECK-GEN-ISEL-TRUE-NEXT:    cmplwi cr1, r6, 92
98; CHECK-GEN-ISEL-TRUE-NEXT:    beq cr1, .LBB0_7
99; CHECK-GEN-ISEL-TRUE-NEXT:  # %bb.12: # %_ZNK4llvm9StringRefixEm.exit.us
100; CHECK-GEN-ISEL-TRUE-NEXT:    #
101; CHECK-GEN-ISEL-TRUE-NEXT:    cmplwi r6, 93
102; CHECK-GEN-ISEL-TRUE-NEXT:    beq cr0, .LBB0_16
103; CHECK-GEN-ISEL-TRUE-NEXT:  # %bb.13: # %_ZNK4llvm9StringRef6substrEmm.exit.loopexit
104; CHECK-GEN-ISEL-TRUE-NEXT:    #
105; CHECK-GEN-ISEL-TRUE-NEXT:    li r6, 0
106; CHECK-GEN-ISEL-TRUE-NEXT:    b .LBB0_2
107; CHECK-GEN-ISEL-TRUE-NEXT:  .LBB0_14: # %if.then
108; CHECK-GEN-ISEL-TRUE-NEXT:    addi r1, r1, 32
109; CHECK-GEN-ISEL-TRUE-NEXT:    ld r0, 16(r1)
110; CHECK-GEN-ISEL-TRUE-NEXT:    mtlr r0
111; CHECK-GEN-ISEL-TRUE-NEXT:    blr
112; CHECK-GEN-ISEL-TRUE-NEXT:  .LBB0_15: # %cond.false.i
113; CHECK-GEN-ISEL-TRUE-NEXT:    addis r3, r2, .L_MergedGlobals@toc@ha
114; CHECK-GEN-ISEL-TRUE-NEXT:    addi r5, r3, .L_MergedGlobals@toc@l
115; CHECK-GEN-ISEL-TRUE-NEXT:    addi r3, r5, 3
116; CHECK-GEN-ISEL-TRUE-NEXT:    addi r4, r5, 134
117; CHECK-GEN-ISEL-TRUE-NEXT:    addi r6, r5, 38
118; CHECK-GEN-ISEL-TRUE-NEXT:    li r5, 225
119; CHECK-GEN-ISEL-TRUE-NEXT:    bl __assert_fail
120; CHECK-GEN-ISEL-TRUE-NEXT:    nop
121; CHECK-GEN-ISEL-TRUE-NEXT:  .LBB0_16: # %if.then9
122; CHECK-GEN-ISEL-TRUE-NEXT:    li r3, 1
123; CHECK-GEN-ISEL-TRUE-NEXT:    bl exit
124; CHECK-GEN-ISEL-TRUE-NEXT:    nop
125;
126; CHECK-LABEL: _Z3fn1N4llvm9StringRefE:
127; CHECK:       # %bb.0: # %entry
128; CHECK-NEXT:    mflr r0
129; CHECK-NEXT:    stdu r1, -32(r1)
130; CHECK-NEXT:    std r0, 48(r1)
131; CHECK-NEXT:    .cfi_def_cfa_offset 32
132; CHECK-NEXT:    .cfi_offset lr, 16
133; CHECK-NEXT:    # implicit-def: $x5
134; CHECK-NEXT:    b .LBB0_2
135; CHECK-NEXT:    .p2align 4
136; CHECK-NEXT:  .LBB0_1: # %_ZNK4llvm9StringRef6substrEmm.exit
137; CHECK-NEXT:    #
138; CHECK-NEXT:    addi r4, r4, -1
139; CHECK-NEXT:    addi r3, r3, 1
140; CHECK-NEXT:  .LBB0_2: # %while.cond.outer
141; CHECK-NEXT:    # =>This Loop Header: Depth=1
142; CHECK-NEXT:    # Child Loop BB0_5 Depth 2
143; CHECK-NEXT:    # Child Loop BB0_9 Depth 2
144; CHECK-NEXT:    cmpldi r5, 0
145; CHECK-NEXT:    beq cr0, .LBB0_9
146; CHECK-NEXT:  # %bb.3: # %while.cond.preheader
147; CHECK-NEXT:    #
148; CHECK-NEXT:    cmpldi r4, 0
149; CHECK-NEXT:    bne+ cr0, .LBB0_5
150; CHECK-NEXT:    b .LBB0_20
151; CHECK-NEXT:    .p2align 5
152; CHECK-NEXT:  .LBB0_4: # %if.then4
153; CHECK-NEXT:    #
154; CHECK-NEXT:    add r3, r3, r6
155; CHECK-NEXT:    sub. r4, r4, r6
156; CHECK-NEXT:    beq- cr0, .LBB0_20
157; CHECK-NEXT:  .LBB0_5: # %_ZNK4llvm9StringRefixEm.exit
158; CHECK-NEXT:    # Parent Loop BB0_2 Depth=1
159; CHECK-NEXT:    # => This Inner Loop Header: Depth=2
160; CHECK-NEXT:    lbz r6, 0(r3)
161; CHECK-NEXT:    cmplwi r6, 92
162; CHECK-NEXT:    bne cr0, .LBB0_15
163; CHECK-NEXT:  # %bb.6: # %if.then4
164; CHECK-NEXT:    #
165; CHECK-NEXT:    cmpldi r4, 2
166; CHECK-NEXT:    mr r6, r4
167; CHECK-NEXT:    blt cr0, .LBB0_4
168; CHECK-NEXT:  # %bb.7: # %if.then4
169; CHECK-NEXT:    #
170; CHECK-NEXT:    li r6, 2
171; CHECK-NEXT:    b .LBB0_4
172; CHECK-NEXT:    .p2align 5
173; CHECK-NEXT:  .LBB0_8: # %if.then4.us
174; CHECK-NEXT:    #
175; CHECK-NEXT:    add r3, r3, r5
176; CHECK-NEXT:    sub r4, r4, r5
177; CHECK-NEXT:  .LBB0_9: # %while.cond.us
178; CHECK-NEXT:    # Parent Loop BB0_2 Depth=1
179; CHECK-NEXT:    # => This Inner Loop Header: Depth=2
180; CHECK-NEXT:    cmpldi r4, 2
181; CHECK-NEXT:    bge cr0, .LBB0_11
182; CHECK-NEXT:  # %bb.10: # %if.end.us
183; CHECK-NEXT:    #
184; CHECK-NEXT:    cmpldi cr1, r4, 0
185; CHECK-NEXT:    bne+ cr1, .LBB0_12
186; CHECK-NEXT:    b .LBB0_20
187; CHECK-NEXT:    .p2align 5
188; CHECK-NEXT:  .LBB0_11: # %if.end.i.i.us
189; CHECK-NEXT:    #
190; CHECK-NEXT:    lhz r5, 0(r3)
191; CHECK-NEXT:    cmplwi cr1, r5, 23901
192; CHECK-NEXT:    beq cr1, .LBB0_19
193; CHECK-NEXT:  .LBB0_12: # %_ZNK4llvm9StringRefixEm.exit.us
194; CHECK-NEXT:    #
195; CHECK-NEXT:    lbz r5, 0(r3)
196; CHECK-NEXT:    cmplwi cr1, r5, 92
197; CHECK-NEXT:    bne cr1, .LBB0_17
198; CHECK-NEXT:  # %bb.13: # %if.then4.us
199; CHECK-NEXT:    #
200; CHECK-NEXT:    mr r5, r4
201; CHECK-NEXT:    bc 12, lt, .LBB0_8
202; CHECK-NEXT:  # %bb.14: # %if.then4.us
203; CHECK-NEXT:    #
204; CHECK-NEXT:    li r5, 2
205; CHECK-NEXT:    b .LBB0_8
206; CHECK-NEXT:    .p2align 4
207; CHECK-NEXT:  .LBB0_15: # %_ZNK4llvm9StringRefixEm.exit
208; CHECK-NEXT:    #
209; CHECK-NEXT:    cmplwi r6, 93
210; CHECK-NEXT:    bne cr0, .LBB0_1
211; CHECK-NEXT:  # %bb.16: # %if.end10
212; CHECK-NEXT:    #
213; CHECK-NEXT:    addi r5, r5, -1
214; CHECK-NEXT:    b .LBB0_1
215; CHECK-NEXT:    .p2align 4
216; CHECK-NEXT:  .LBB0_17: # %_ZNK4llvm9StringRefixEm.exit.us
217; CHECK-NEXT:    #
218; CHECK-NEXT:    cmplwi r5, 93
219; CHECK-NEXT:    beq cr0, .LBB0_21
220; CHECK-NEXT:  # %bb.18: # %_ZNK4llvm9StringRef6substrEmm.exit.loopexit
221; CHECK-NEXT:    #
222; CHECK-NEXT:    li r5, 0
223; CHECK-NEXT:    b .LBB0_1
224; CHECK-NEXT:  .LBB0_19: # %if.then
225; CHECK-NEXT:    addi r1, r1, 32
226; CHECK-NEXT:    ld r0, 16(r1)
227; CHECK-NEXT:    mtlr r0
228; CHECK-NEXT:    blr
229; CHECK-NEXT:  .LBB0_20: # %cond.false.i
230; CHECK-NEXT:    addis r3, r2, .L_MergedGlobals@toc@ha
231; CHECK-NEXT:    addi r5, r3, .L_MergedGlobals@toc@l
232; CHECK-NEXT:    addi r3, r5, 3
233; CHECK-NEXT:    addi r4, r5, 134
234; CHECK-NEXT:    addi r6, r5, 38
235; CHECK-NEXT:    li r5, 225
236; CHECK-NEXT:    bl __assert_fail
237; CHECK-NEXT:    nop
238; CHECK-NEXT:  .LBB0_21: # %if.then9
239; CHECK-NEXT:    li r3, 1
240; CHECK-NEXT:    bl exit
241; CHECK-NEXT:    nop
242entry:
243  %Str.coerce.fca.0.extract = extractvalue [2 x i64] %Str.coerce, 0
244  %Str.coerce.fca.1.extract = extractvalue [2 x i64] %Str.coerce, 1
245  br label %while.cond.outer
246while.cond.outer:
247  %Str.sroa.0.0.ph = phi i64 [ %8, %_ZNK4llvm9StringRef6substrEmm.exit ], [ %Str.coerce.fca.0.extract, %entry ]
248  %.sink.ph = phi i64 [ %sub.i, %_ZNK4llvm9StringRef6substrEmm.exit ], [ %Str.coerce.fca.1.extract, %entry ]
249  %BracketDepth.0.ph = phi i64 [ %BracketDepth.1, %_ZNK4llvm9StringRef6substrEmm.exit ], [ undef, %entry ]
250  %cmp65 = icmp eq i64 %BracketDepth.0.ph, 0
251  br i1 %cmp65, label %while.cond.us.preheader, label %while.cond.preheader
252while.cond.us.preheader:
253  br label %while.cond.us
254while.cond.preheader:
255  %cmp.i34129 = icmp eq i64 %.sink.ph, 0
256  br i1 %cmp.i34129, label %cond.false.i.loopexit135, label %_ZNK4llvm9StringRefixEm.exit.preheader
257_ZNK4llvm9StringRefixEm.exit.preheader:
258  br label %_ZNK4llvm9StringRefixEm.exit
259while.cond.us:
260  %Str.sroa.0.0.us = phi i64 [ %3, %_ZNK4llvm9StringRef6substrEmm.exit50.us ], [ %Str.sroa.0.0.ph, %while.cond.us.preheader ]
261  %.sink.us = phi i64 [ %sub.i41.us, %_ZNK4llvm9StringRef6substrEmm.exit50.us ], [ %.sink.ph, %while.cond.us.preheader ]
262  %cmp.i30.us = icmp ult i64 %.sink.us, 2
263  br i1 %cmp.i30.us, label %if.end.us, label %if.end.i.i.us
264if.end.i.i.us:
265  %0 = inttoptr i64 %Str.sroa.0.0.us to ptr
266  %call.i.i.us = tail call signext i32 @memcmp(ptr %0, ptr @.str, i64 2)
267  %phitmp.i.us = icmp eq i32 %call.i.i.us, 0
268  br i1 %phitmp.i.us, label %if.then, label %_ZNK4llvm9StringRefixEm.exit.us
269if.end.us:
270  %cmp.i34.us = icmp eq i64 %.sink.us, 0
271  br i1 %cmp.i34.us, label %cond.false.i.loopexit, label %_ZNK4llvm9StringRefixEm.exit.us
272_ZNK4llvm9StringRefixEm.exit.us:
273  %1 = inttoptr i64 %Str.sroa.0.0.us to ptr
274  %2 = load i8, ptr %1, align 1
275  switch i8 %2, label %_ZNK4llvm9StringRef6substrEmm.exit.loopexit [
276    i8 92, label %if.then4.us
277    i8 93, label %if.then9
278  ]
279if.then4.us:
280  %.sroa.speculated12.i38.us = select i1 %cmp.i30.us, i64 %.sink.us, i64 2
281  %add.ptr.i40.us = getelementptr inbounds i8, ptr %1, i64 %.sroa.speculated12.i38.us
282  %sub.i41.us = sub i64 %.sink.us, %.sroa.speculated12.i38.us
283  %tobool.i.i44.us = icmp ne ptr %add.ptr.i40.us, null
284  %cmp.i4.i45.us = icmp eq i64 %sub.i41.us, 0
285  %or.cond.i.i46.us = or i1 %tobool.i.i44.us, %cmp.i4.i45.us
286  br i1 %or.cond.i.i46.us, label %_ZNK4llvm9StringRef6substrEmm.exit50.us, label %cond.false.i.i47.loopexit
287_ZNK4llvm9StringRef6substrEmm.exit50.us:
288  %3 = ptrtoint ptr %add.ptr.i40.us to i64
289  br label %while.cond.us
290if.then:
291  ret i64 undef
292cond.false.i.loopexit:
293  br label %cond.false.i
294cond.false.i.loopexit134:
295  br label %cond.false.i
296cond.false.i.loopexit135:
297  br label %cond.false.i
298cond.false.i:
299  tail call void @__assert_fail(ptr @.str.1, ptr @.str.2, i32 zeroext 225, ptr @__PRETTY_FUNCTION__._ZNK4llvm9StringRefixEm)
300  unreachable
301_ZNK4llvm9StringRefixEm.exit:
302  %.sink131 = phi i64 [ %sub.i41, %_ZNK4llvm9StringRef6substrEmm.exit50 ], [ %.sink.ph, %_ZNK4llvm9StringRefixEm.exit.preheader ]
303  %Str.sroa.0.0130 = phi i64 [ %6, %_ZNK4llvm9StringRef6substrEmm.exit50 ], [ %Str.sroa.0.0.ph, %_ZNK4llvm9StringRefixEm.exit.preheader ]
304  %4 = inttoptr i64 %Str.sroa.0.0130 to ptr
305  %5 = load i8, ptr %4, align 1
306  switch i8 %5, label %_ZNK4llvm9StringRef6substrEmm.exit.loopexit132 [
307    i8 92, label %if.then4
308    i8 93, label %if.end10
309  ]
310if.then4:
311  %cmp.i.i37 = icmp ult i64 %.sink131, 2
312  %.sroa.speculated12.i38 = select i1 %cmp.i.i37, i64 %.sink131, i64 2
313  %add.ptr.i40 = getelementptr inbounds i8, ptr %4, i64 %.sroa.speculated12.i38
314  %sub.i41 = sub i64 %.sink131, %.sroa.speculated12.i38
315  %tobool.i.i44 = icmp ne ptr %add.ptr.i40, null
316  %cmp.i4.i45 = icmp eq i64 %sub.i41, 0
317  %or.cond.i.i46 = or i1 %tobool.i.i44, %cmp.i4.i45
318  br i1 %or.cond.i.i46, label %_ZNK4llvm9StringRef6substrEmm.exit50, label %cond.false.i.i47.loopexit133
319cond.false.i.i47.loopexit:
320  br label %cond.false.i.i47
321cond.false.i.i47.loopexit133:
322  br label %cond.false.i.i47
323cond.false.i.i47:
324  tail call void @__assert_fail(ptr @.str.3, ptr @.str.2, i32 zeroext 90, ptr @__PRETTY_FUNCTION__._ZN4llvm9StringRefC2EPKcm)
325  unreachable
326_ZNK4llvm9StringRef6substrEmm.exit50:
327  %6 = ptrtoint ptr %add.ptr.i40 to i64
328  %cmp.i34 = icmp eq i64 %sub.i41, 0
329  br i1 %cmp.i34, label %cond.false.i.loopexit134, label %_ZNK4llvm9StringRefixEm.exit
330if.then9:
331  tail call void @exit(i32 signext 1)
332  unreachable
333if.end10:
334  %dec = add i64 %BracketDepth.0.ph, -1
335  br label %_ZNK4llvm9StringRef6substrEmm.exit
336_ZNK4llvm9StringRef6substrEmm.exit.loopexit:
337  br label %_ZNK4llvm9StringRef6substrEmm.exit
338_ZNK4llvm9StringRef6substrEmm.exit.loopexit132:
339  br label %_ZNK4llvm9StringRef6substrEmm.exit
340_ZNK4llvm9StringRef6substrEmm.exit:
341  %.sink76 = phi i64 [ %.sink131, %if.end10 ], [ %.sink.us, %_ZNK4llvm9StringRef6substrEmm.exit.loopexit ], [ %.sink131, %_ZNK4llvm9StringRef6substrEmm.exit.loopexit132 ]
342  %7 = phi ptr [ %4, %if.end10 ], [ %1, %_ZNK4llvm9StringRef6substrEmm.exit.loopexit ], [ %4, %_ZNK4llvm9StringRef6substrEmm.exit.loopexit132 ]
343  %BracketDepth.1 = phi i64 [ %dec, %if.end10 ], [ 0, %_ZNK4llvm9StringRef6substrEmm.exit.loopexit ], [ %BracketDepth.0.ph, %_ZNK4llvm9StringRef6substrEmm.exit.loopexit132 ]
344  %sub.i = add i64 %.sink76, -1
345  %add.ptr.i = getelementptr inbounds i8, ptr %7, i64 1
346  %8 = ptrtoint ptr %add.ptr.i to i64
347  br label %while.cond.outer
348
349; Unecessary ISEL (all the registers are the same) is always removed
350}
351
352
353
354declare void @exit(i32 signext)
355declare signext i32 @memcmp(ptr nocapture, ptr nocapture, i64)
356declare void @__assert_fail(ptr, ptr, i32 zeroext, ptr)
357