xref: /llvm-project/llvm/test/CodeGen/PowerPC/dyn-alloca-aligned.ll (revision 427fb35192f1f7bb694a5910b05abc5925a798b2)
1; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s | FileCheck %s
2target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
3target triple = "powerpc64-unknown-linux-gnu"
4
5%struct.s = type { i32, i32 }
6
7declare void @bar(ptr, ptr) #0
8
9define void @goo(ptr byval(%struct.s) nocapture readonly %a, i32 signext %n) #0 {
10entry:
11  %0 = zext i32 %n to i64
12  %vla = alloca i32, i64 %0, align 128
13  %vla1 = alloca i32, i64 %0, align 128
14  %1 = load i32, ptr %a, align 4
15  store i32 %1, ptr %vla1, align 128
16  %b = getelementptr inbounds %struct.s, ptr %a, i64 0, i32 1
17  %2 = load i32, ptr %b, align 4
18  %arrayidx3 = getelementptr inbounds i32, ptr %vla1, i64 1
19  store i32 %2, ptr %arrayidx3, align 4
20  call void @bar(ptr %vla1, ptr %vla) #0
21  ret void
22
23; CHECK-LABEL: @goo
24
25; CHECK-DAG: li [[REG1:[0-9]+]], -128
26; CHECK-DAG: neg [[REG2:[0-9]+]],
27; CHECK: and [[REG3:[0-9]+]], [[REG2]], [[REG1]]
28; CHECK: stdux {{[0-9]+}}, 1, [[REG3]]
29
30; CHECK: blr
31
32}
33
34attributes #0 = { nounwind }
35