1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -ppc-gpr-icmps=all -mtriple=powerpc64-unknown-linux-gnu \ 3; RUN: -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s 4; RUN: llc -ppc-gpr-icmps=all -mtriple=powerpc64-unknown-linux-gnu \ 5; RUN: -verify-machineinstrs -mcpu=pwr7 -mattr=-isel < %s | \ 6; RUN: FileCheck --check-prefix=CHECK-NO-ISEL %s 7; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 8; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 -ppc-gpr-icmps=none < %s | \ 9; RUN: FileCheck %s --check-prefix=CHECK-P10 10; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 11; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 -ppc-gpr-icmps=none < %s | \ 12; RUN: FileCheck %s --check-prefix=CHECK-P10 13 14; Function Attrs: nounwind readnone 15define zeroext i1 @test1(float %v1, float %v2) #0 { 16; CHECK-LABEL: test1: 17; CHECK: # %bb.0: # %entry 18; CHECK-NEXT: fcmpu 0, 1, 2 19; CHECK-NEXT: xxlxor 0, 0, 0 20; CHECK-NEXT: li 3, 1 21; CHECK-NEXT: fcmpu 1, 2, 2 22; CHECK-NEXT: crnor 20, 3, 0 23; CHECK-NEXT: fcmpu 0, 2, 0 24; CHECK-NEXT: crnor 21, 7, 1 25; CHECK-NEXT: crnand 20, 20, 21 26; CHECK-NEXT: isel 3, 0, 3, 20 27; CHECK-NEXT: blr 28; 29; CHECK-NO-ISEL-LABEL: test1: 30; CHECK-NO-ISEL: # %bb.0: # %entry 31; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2 32; CHECK-NO-ISEL-NEXT: xxlxor 0, 0, 0 33; CHECK-NO-ISEL-NEXT: li 3, 0 34; CHECK-NO-ISEL-NEXT: fcmpu 1, 2, 2 35; CHECK-NO-ISEL-NEXT: crnor 20, 3, 0 36; CHECK-NO-ISEL-NEXT: fcmpu 0, 2, 0 37; CHECK-NO-ISEL-NEXT: bclr 4, 20, 0 38; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry 39; CHECK-NO-ISEL-NEXT: crnor 20, 7, 1 40; CHECK-NO-ISEL-NEXT: bclr 4, 20, 0 41; CHECK-NO-ISEL-NEXT: # %bb.2: # %entry 42; CHECK-NO-ISEL-NEXT: li 3, 1 43; CHECK-NO-ISEL-NEXT: blr 44; 45; CHECK-P10-LABEL: test1: 46; CHECK-P10: # %bb.0: # %entry 47; CHECK-P10-NEXT: fcmpu cr0, f1, f2 48; CHECK-P10-NEXT: xxlxor f0, f0, f0 49; CHECK-P10-NEXT: fcmpu cr1, f2, f2 50; CHECK-P10-NEXT: crnor 4*cr5+lt, un, lt 51; CHECK-P10-NEXT: fcmpu cr0, f2, f0 52; CHECK-P10-NEXT: crnor 4*cr5+gt, 4*cr1+un, gt 53; CHECK-P10-NEXT: crand 4*cr5+lt, 4*cr5+lt, 4*cr5+gt 54; CHECK-P10-NEXT: setbc r3, 4*cr5+lt 55; CHECK-P10-NEXT: blr 56entry: 57 %cmp = fcmp oge float %v1, %v2 58 %cmp2 = fcmp ole float %v2, 0.000000e+00 59 %and5 = and i1 %cmp, %cmp2 60 ret i1 %and5 61 62 63} 64 65; Function Attrs: nounwind readnone 66define zeroext i1 @test2(float %v1, float %v2) #0 { 67; CHECK-LABEL: test2: 68; CHECK: # %bb.0: # %entry 69; CHECK-NEXT: fcmpu 0, 1, 2 70; CHECK-NEXT: xxlxor 0, 0, 0 71; CHECK-NEXT: li 3, 1 72; CHECK-NEXT: fcmpu 1, 2, 2 73; CHECK-NEXT: crnor 20, 3, 0 74; CHECK-NEXT: fcmpu 0, 2, 0 75; CHECK-NEXT: crnor 21, 7, 1 76; CHECK-NEXT: creqv 20, 20, 21 77; CHECK-NEXT: isel 3, 0, 3, 20 78; CHECK-NEXT: blr 79; 80; CHECK-NO-ISEL-LABEL: test2: 81; CHECK-NO-ISEL: # %bb.0: # %entry 82; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2 83; CHECK-NO-ISEL-NEXT: xxlxor 0, 0, 0 84; CHECK-NO-ISEL-NEXT: li 3, 0 85; CHECK-NO-ISEL-NEXT: fcmpu 1, 2, 2 86; CHECK-NO-ISEL-NEXT: crnor 20, 3, 0 87; CHECK-NO-ISEL-NEXT: fcmpu 0, 2, 0 88; CHECK-NO-ISEL-NEXT: crnor 21, 7, 1 89; CHECK-NO-ISEL-NEXT: creqv 20, 20, 21 90; CHECK-NO-ISEL-NEXT: bclr 12, 20, 0 91; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry 92; CHECK-NO-ISEL-NEXT: li 3, 1 93; CHECK-NO-ISEL-NEXT: blr 94; 95; CHECK-P10-LABEL: test2: 96; CHECK-P10: # %bb.0: # %entry 97; CHECK-P10-NEXT: fcmpu cr0, f1, f2 98; CHECK-P10-NEXT: xxlxor f0, f0, f0 99; CHECK-P10-NEXT: fcmpu cr1, f2, f2 100; CHECK-P10-NEXT: crnor 4*cr5+lt, un, lt 101; CHECK-P10-NEXT: fcmpu cr0, f2, f0 102; CHECK-P10-NEXT: crnor 4*cr5+gt, 4*cr1+un, gt 103; CHECK-P10-NEXT: crxor 4*cr5+lt, 4*cr5+lt, 4*cr5+gt 104; CHECK-P10-NEXT: setbc r3, 4*cr5+lt 105; CHECK-P10-NEXT: blr 106entry: 107 %cmp = fcmp oge float %v1, %v2 108 %cmp2 = fcmp ole float %v2, 0.000000e+00 109 %xor5 = xor i1 %cmp, %cmp2 110 ret i1 %xor5 111 112 113} 114 115; Function Attrs: nounwind readnone 116define zeroext i1 @test3(float %v1, float %v2, i32 signext %x) #0 { 117; CHECK-LABEL: test3: 118; CHECK: # %bb.0: # %entry 119; CHECK-NEXT: fcmpu 0, 1, 2 120; CHECK-NEXT: xxlxor 0, 0, 0 121; CHECK-NEXT: li 3, 1 122; CHECK-NEXT: fcmpu 1, 2, 2 123; CHECK-NEXT: crnor 20, 3, 0 124; CHECK-NEXT: fcmpu 0, 2, 0 125; CHECK-NEXT: crnor 21, 7, 1 126; CHECK-NEXT: cmpwi 5, -2 127; CHECK-NEXT: crandc 21, 21, 2 128; CHECK-NEXT: creqv 20, 20, 21 129; CHECK-NEXT: isel 3, 0, 3, 20 130; CHECK-NEXT: blr 131; 132; CHECK-NO-ISEL-LABEL: test3: 133; CHECK-NO-ISEL: # %bb.0: # %entry 134; CHECK-NO-ISEL-NEXT: fcmpu 0, 1, 2 135; CHECK-NO-ISEL-NEXT: xxlxor 0, 0, 0 136; CHECK-NO-ISEL-NEXT: li 3, 0 137; CHECK-NO-ISEL-NEXT: fcmpu 1, 2, 2 138; CHECK-NO-ISEL-NEXT: crnor 20, 3, 0 139; CHECK-NO-ISEL-NEXT: fcmpu 0, 2, 0 140; CHECK-NO-ISEL-NEXT: crnor 21, 7, 1 141; CHECK-NO-ISEL-NEXT: cmpwi 5, -2 142; CHECK-NO-ISEL-NEXT: crandc 21, 21, 2 143; CHECK-NO-ISEL-NEXT: creqv 20, 20, 21 144; CHECK-NO-ISEL-NEXT: bclr 12, 20, 0 145; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry 146; CHECK-NO-ISEL-NEXT: li 3, 1 147; CHECK-NO-ISEL-NEXT: blr 148; 149; CHECK-P10-LABEL: test3: 150; CHECK-P10: # %bb.0: # %entry 151; CHECK-P10-NEXT: fcmpu cr0, f1, f2 152; CHECK-P10-NEXT: xxlxor f0, f0, f0 153; CHECK-P10-NEXT: fcmpu cr1, f2, f2 154; CHECK-P10-NEXT: crnor 4*cr5+lt, un, lt 155; CHECK-P10-NEXT: fcmpu cr0, f2, f0 156; CHECK-P10-NEXT: crnor 4*cr5+gt, 4*cr1+un, gt 157; CHECK-P10-NEXT: cmpwi r5, -2 158; CHECK-P10-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq 159; CHECK-P10-NEXT: crxor 4*cr5+lt, 4*cr5+lt, 4*cr5+gt 160; CHECK-P10-NEXT: setbc r3, 4*cr5+lt 161; CHECK-P10-NEXT: blr 162entry: 163 %cmp = fcmp oge float %v1, %v2 164 %cmp2 = fcmp ole float %v2, 0.000000e+00 165 %cmp4 = icmp ne i32 %x, -2 166 %and7 = and i1 %cmp2, %cmp4 167 %xor8 = xor i1 %cmp, %and7 168 ret i1 %xor8 169 170 171} 172 173; Function Attrs: nounwind readnone 174define zeroext i1 @test4(i1 zeroext %v1, i1 zeroext %v2, i1 zeroext %v3) #0 { 175; CHECK-LABEL: test4: 176; CHECK: # %bb.0: # %entry 177; CHECK-NEXT: and 3, 3, 4 178; CHECK-NEXT: or 3, 3, 5 179; CHECK-NEXT: blr 180; 181; CHECK-NO-ISEL-LABEL: test4: 182; CHECK-NO-ISEL: # %bb.0: # %entry 183; CHECK-NO-ISEL-NEXT: and 3, 3, 4 184; CHECK-NO-ISEL-NEXT: or 3, 3, 5 185; CHECK-NO-ISEL-NEXT: blr 186; 187; CHECK-P10-LABEL: test4: 188; CHECK-P10: # %bb.0: # %entry 189; CHECK-P10-NEXT: and r3, r3, r4 190; CHECK-P10-NEXT: or r3, r3, r5 191; CHECK-P10-NEXT: blr 192entry: 193 %and8 = and i1 %v1, %v2 194 %or9 = or i1 %and8, %v3 195 ret i1 %or9 196 197} 198 199; Function Attrs: nounwind readnone 200define zeroext i1 @test5(i1 zeroext %v1, i1 zeroext %v2, i32 signext %v3) #0 { 201; CHECK-LABEL: test5: 202; CHECK: # %bb.0: # %entry 203; CHECK-NEXT: and 3, 3, 4 204; CHECK-NEXT: li 4, -2 205; CHECK-NEXT: xor 4, 5, 4 206; CHECK-NEXT: clrldi 3, 3, 63 207; CHECK-NEXT: cntlzw 4, 4 208; CHECK-NEXT: srwi 4, 4, 5 209; CHECK-NEXT: xori 4, 4, 1 210; CHECK-NEXT: or 3, 3, 4 211; CHECK-NEXT: blr 212; 213; CHECK-NO-ISEL-LABEL: test5: 214; CHECK-NO-ISEL: # %bb.0: # %entry 215; CHECK-NO-ISEL-NEXT: and 3, 3, 4 216; CHECK-NO-ISEL-NEXT: li 4, -2 217; CHECK-NO-ISEL-NEXT: xor 4, 5, 4 218; CHECK-NO-ISEL-NEXT: clrldi 3, 3, 63 219; CHECK-NO-ISEL-NEXT: cntlzw 4, 4 220; CHECK-NO-ISEL-NEXT: srwi 4, 4, 5 221; CHECK-NO-ISEL-NEXT: xori 4, 4, 1 222; CHECK-NO-ISEL-NEXT: or 3, 3, 4 223; CHECK-NO-ISEL-NEXT: blr 224; 225; CHECK-P10-LABEL: test5: 226; CHECK-P10: # %bb.0: # %entry 227; CHECK-P10-NEXT: and r3, r3, r4 228; CHECK-P10-NEXT: cmpwi cr1, r5, -2 229; CHECK-P10-NEXT: andi. r3, r3, 1 230; CHECK-P10-NEXT: crorc 4*cr5+lt, gt, 4*cr1+eq 231; CHECK-P10-NEXT: setbc r3, 4*cr5+lt 232; CHECK-P10-NEXT: blr 233entry: 234 %and6 = and i1 %v1, %v2 235 %cmp = icmp ne i32 %v3, -2 236 %or7 = or i1 %and6, %cmp 237 ret i1 %or7 238 239 240} 241 242; Function Attrs: nounwind readnone 243define zeroext i1 @test6(i1 zeroext %v1, i1 zeroext %v2, i32 signext %v3) #0 { 244; CHECK-LABEL: test6: 245; CHECK: # %bb.0: # %entry 246; CHECK-NEXT: li 6, -2 247; CHECK-NEXT: clrldi 4, 4, 63 248; CHECK-NEXT: clrldi 3, 3, 63 249; CHECK-NEXT: xor 5, 5, 6 250; CHECK-NEXT: cntlzw 5, 5 251; CHECK-NEXT: srwi 5, 5, 5 252; CHECK-NEXT: xori 5, 5, 1 253; CHECK-NEXT: or 4, 5, 4 254; CHECK-NEXT: and 3, 4, 3 255; CHECK-NEXT: blr 256; 257; CHECK-NO-ISEL-LABEL: test6: 258; CHECK-NO-ISEL: # %bb.0: # %entry 259; CHECK-NO-ISEL-NEXT: li 6, -2 260; CHECK-NO-ISEL-NEXT: clrldi 4, 4, 63 261; CHECK-NO-ISEL-NEXT: clrldi 3, 3, 63 262; CHECK-NO-ISEL-NEXT: xor 5, 5, 6 263; CHECK-NO-ISEL-NEXT: cntlzw 5, 5 264; CHECK-NO-ISEL-NEXT: srwi 5, 5, 5 265; CHECK-NO-ISEL-NEXT: xori 5, 5, 1 266; CHECK-NO-ISEL-NEXT: or 4, 5, 4 267; CHECK-NO-ISEL-NEXT: and 3, 4, 3 268; CHECK-NO-ISEL-NEXT: blr 269; 270; CHECK-P10-LABEL: test6: 271; CHECK-P10: # %bb.0: # %entry 272; CHECK-P10-NEXT: andi. r3, r3, 1 273; CHECK-P10-NEXT: cmpwi cr1, r5, -2 274; CHECK-P10-NEXT: crmove 4*cr5+lt, gt 275; CHECK-P10-NEXT: andi. r3, r4, 1 276; CHECK-P10-NEXT: crorc 4*cr5+gt, gt, 4*cr1+eq 277; CHECK-P10-NEXT: crand 4*cr5+lt, 4*cr5+gt, 4*cr5+lt 278; CHECK-P10-NEXT: setbc r3, 4*cr5+lt 279; CHECK-P10-NEXT: blr 280entry: 281 %cmp = icmp ne i32 %v3, -2 282 %or6 = or i1 %cmp, %v2 283 %and7 = and i1 %or6, %v1 284 ret i1 %and7 285 286 287} 288 289; Function Attrs: nounwind readnone 290define signext i32 @test7(i1 zeroext %v2, i32 signext %i1, i32 signext %i2) #0 { 291; CHECK-LABEL: test7: 292; CHECK: # %bb.0: # %entry 293; CHECK-NEXT: andi. 3, 3, 1 294; CHECK-NEXT: iselgt 3, 4, 5 295; CHECK-NEXT: blr 296; 297; CHECK-NO-ISEL-LABEL: test7: 298; CHECK-NO-ISEL: # %bb.0: # %entry 299; CHECK-NO-ISEL-NEXT: andi. 3, 3, 1 300; CHECK-NO-ISEL-NEXT: bc 12, 1, .LBB6_2 301; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry 302; CHECK-NO-ISEL-NEXT: mr 4, 5 303; CHECK-NO-ISEL-NEXT: .LBB6_2: # %entry 304; CHECK-NO-ISEL-NEXT: mr 3, 4 305; CHECK-NO-ISEL-NEXT: blr 306; 307; CHECK-P10-LABEL: test7: 308; CHECK-P10: # %bb.0: # %entry 309; CHECK-P10-NEXT: andi. r3, r3, 1 310; CHECK-P10-NEXT: iselgt r3, r4, r5 311; CHECK-P10-NEXT: blr 312entry: 313 %cond = select i1 %v2, i32 %i1, i32 %i2 314 ret i32 %cond 315 316} 317 318define signext i32 @exttest7(i32 signext %a) #0 { 319; CHECK-LABEL: exttest7: 320; CHECK: # %bb.0: # %entry 321; CHECK-NEXT: cmplwi 3, 5 322; CHECK-NEXT: li 3, 8 323; CHECK-NEXT: li 4, 7 324; CHECK-NEXT: iseleq 3, 4, 3 325; CHECK-NEXT: blr 326; 327; CHECK-NO-ISEL-LABEL: exttest7: 328; CHECK-NO-ISEL: # %bb.0: # %entry 329; CHECK-NO-ISEL-NEXT: cmplwi 3, 5 330; CHECK-NO-ISEL-NEXT: li 3, 7 331; CHECK-NO-ISEL-NEXT: beqlr 0 332; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry 333; CHECK-NO-ISEL-NEXT: li 3, 8 334; CHECK-NO-ISEL-NEXT: blr 335; 336; CHECK-P10-LABEL: exttest7: 337; CHECK-P10: # %bb.0: # %entry 338; CHECK-P10-NEXT: cmplwi r3, 5 339; CHECK-P10-NEXT: li r3, 8 340; CHECK-P10-NEXT: li r4, 7 341; CHECK-P10-NEXT: iseleq r3, r4, r3 342; CHECK-P10-NEXT: blr 343entry: 344 %cmp = icmp eq i32 %a, 5 345 %cond = select i1 %cmp, i32 7, i32 8 346 ret i32 %cond 347 348} 349 350define zeroext i32 @exttest8() #0 { 351; CHECK-LABEL: exttest8: 352; CHECK: # %bb.0: # %entry 353; CHECK-NEXT: ld 3, 0(3) 354; CHECK-NEXT: subfic 3, 3, 80 355; CHECK-NEXT: rldicl 3, 3, 63, 1 356; CHECK-NEXT: cmplwi 3, 80 357; CHECK-NEXT: iselgt 3, 0, 3 358; CHECK-NEXT: clrldi 3, 3, 32 359; CHECK-NEXT: blr 360; 361; CHECK-NO-ISEL-LABEL: exttest8: 362; CHECK-NO-ISEL: # %bb.0: # %entry 363; CHECK-NO-ISEL-NEXT: ld 3, 0(3) 364; CHECK-NO-ISEL-NEXT: li 4, 0 365; CHECK-NO-ISEL-NEXT: subfic 3, 3, 80 366; CHECK-NO-ISEL-NEXT: rldicl 3, 3, 63, 1 367; CHECK-NO-ISEL-NEXT: cmplwi 3, 80 368; CHECK-NO-ISEL-NEXT: bgt 0, .LBB8_2 369; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry 370; CHECK-NO-ISEL-NEXT: mr 4, 3 371; CHECK-NO-ISEL-NEXT: .LBB8_2: # %entry 372; CHECK-NO-ISEL-NEXT: clrldi 3, 4, 32 373; CHECK-NO-ISEL-NEXT: blr 374; 375; CHECK-P10-LABEL: exttest8: 376; CHECK-P10: # %bb.0: # %entry 377; CHECK-P10-NEXT: ld r3, 0(r3) 378; CHECK-P10-NEXT: subfic r3, r3, 80 379; CHECK-P10-NEXT: rldicl r3, r3, 63, 1 380; CHECK-P10-NEXT: cmplwi r3, 80 381; CHECK-P10-NEXT: iselgt r3, 0, r3 382; CHECK-P10-NEXT: clrldi r3, r3, 32 383; CHECK-P10-NEXT: blr 384entry: 385 %v0 = load i64, ptr undef, align 8 386 %sub = sub i64 80, %v0 387 %div = lshr i64 %sub, 1 388 %conv13 = trunc i64 %div to i32 389 %cmp14 = icmp ugt i32 %conv13, 80 390 %.conv13 = select i1 %cmp14, i32 0, i32 %conv13 391 ret i32 %.conv13 392; This is a don't-crash test: %conv13 is both one of the possible select output 393; values and also an input to the conditional feeding it. 394} 395 396; Function Attrs: nounwind readnone 397define float @test8(i1 zeroext %v2, float %v1, float %v3) #0 { 398; CHECK-LABEL: test8: 399; CHECK: # %bb.0: # %entry 400; CHECK-NEXT: andi. 3, 3, 1 401; CHECK-NEXT: bclr 12, 1, 0 402; CHECK-NEXT: # %bb.1: # %entry 403; CHECK-NEXT: fmr 1, 2 404; CHECK-NEXT: blr 405; 406; CHECK-NO-ISEL-LABEL: test8: 407; CHECK-NO-ISEL: # %bb.0: # %entry 408; CHECK-NO-ISEL-NEXT: andi. 3, 3, 1 409; CHECK-NO-ISEL-NEXT: bclr 12, 1, 0 410; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry 411; CHECK-NO-ISEL-NEXT: fmr 1, 2 412; CHECK-NO-ISEL-NEXT: blr 413; 414; CHECK-P10-LABEL: test8: 415; CHECK-P10: # %bb.0: # %entry 416; CHECK-P10-NEXT: andi. r3, r3, 1 417; CHECK-P10-NEXT: bclr 12, gt, 0 418; CHECK-P10-NEXT: # %bb.1: # %entry 419; CHECK-P10-NEXT: fmr f1, f2 420; CHECK-P10-NEXT: blr 421entry: 422 %cond = select i1 %v2, float %v1, float %v3 423 ret float %cond 424 425} 426 427; Function Attrs: nounwind readnone 428define signext i32 @test10(i32 signext %v1, i32 signext %v2) #0 { 429; CHECK-LABEL: test10: 430; CHECK: # %bb.0: # %entry 431; CHECK-NEXT: cntlzw 3, 3 432; CHECK-NEXT: cntlzw 4, 4 433; CHECK-NEXT: srwi 3, 3, 5 434; CHECK-NEXT: srwi 4, 4, 5 435; CHECK-NEXT: xori 3, 3, 1 436; CHECK-NEXT: and 3, 3, 4 437; CHECK-NEXT: blr 438; 439; CHECK-NO-ISEL-LABEL: test10: 440; CHECK-NO-ISEL: # %bb.0: # %entry 441; CHECK-NO-ISEL-NEXT: cntlzw 3, 3 442; CHECK-NO-ISEL-NEXT: cntlzw 4, 4 443; CHECK-NO-ISEL-NEXT: srwi 3, 3, 5 444; CHECK-NO-ISEL-NEXT: srwi 4, 4, 5 445; CHECK-NO-ISEL-NEXT: xori 3, 3, 1 446; CHECK-NO-ISEL-NEXT: and 3, 3, 4 447; CHECK-NO-ISEL-NEXT: blr 448; 449; CHECK-P10-LABEL: test10: 450; CHECK-P10: # %bb.0: # %entry 451; CHECK-P10-NEXT: cmpwi r3, 0 452; CHECK-P10-NEXT: cmpwi cr1, r4, 0 453; CHECK-P10-NEXT: crandc 4*cr5+lt, 4*cr1+eq, eq 454; CHECK-P10-NEXT: setbc r3, 4*cr5+lt 455; CHECK-P10-NEXT: blr 456entry: 457 %tobool = icmp ne i32 %v1, 0 458 %lnot = icmp eq i32 %v2, 0 459 %and3 = and i1 %tobool, %lnot 460 %and = zext i1 %and3 to i32 461 ret i32 %and 462 463 464} 465 466attributes #0 = { nounwind readnone } 467 468