1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 2; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s 3; RUN: llc -verify-machineinstrs -O1 -mcpu=pwr7 < %s | FileCheck %s 4; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-isel < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s 5; RUN: llc -verify-machineinstrs -O1 -mcpu=pwr7 -mattr=-isel < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s 6 7target datalayout = "E-m:e-i64:64-n32:64" 8target triple = "powerpc64-unknown-linux-gnu" 9 10define zeroext i1 @testi1(i1 zeroext %b1, i1 zeroext %b2) #0 { 11; CHECK-LABEL: testi1: 12; CHECK: # %bb.0: # %entry 13; CHECK-NEXT: andi. 3, 3, 1 14; CHECK-NEXT: crmove 20, 1 15; CHECK-NEXT: andi. 3, 4, 1 16; CHECK-NEXT: li 3, 0 17; CHECK-NEXT: li 4, 1 18; CHECK-NEXT: #APP 19; CHECK-NEXT: crand 20, 20, 1 20; CHECK-NEXT: #NO_APP 21; CHECK-NEXT: isel 3, 4, 3, 20 22; CHECK-NEXT: blr 23; 24; CHECK-NO-ISEL-LABEL: testi1: 25; CHECK-NO-ISEL: # %bb.0: # %entry 26; CHECK-NO-ISEL-NEXT: andi. 3, 3, 1 27; CHECK-NO-ISEL-NEXT: crmove 20, 1 28; CHECK-NO-ISEL-NEXT: andi. 3, 4, 1 29; CHECK-NO-ISEL-NEXT: li 3, 1 30; CHECK-NO-ISEL-NEXT: #APP 31; CHECK-NO-ISEL-NEXT: crand 20, 20, 1 32; CHECK-NO-ISEL-NEXT: #NO_APP 33; CHECK-NO-ISEL-NEXT: bclr 12, 20, 0 34; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry 35; CHECK-NO-ISEL-NEXT: li 3, 0 36; CHECK-NO-ISEL-NEXT: blr 37entry: 38 %0 = tail call i8 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i1 %b1, i1 %b2) #0 39 %1 = and i8 %0, 1 40 %tobool3 = icmp ne i8 %1, 0 41 ret i1 %tobool3 42 43} 44 45define signext i32 @testi32(i32 signext %b1, i32 signext %b2) #0 { 46; CHECK-LABEL: testi32: 47; CHECK: # %bb.0: # %entry 48; CHECK-NEXT: andi. 3, 3, 1 49; CHECK-NEXT: crmove 20, 1 50; CHECK-NEXT: andi. 3, 4, 1 51; CHECK-NEXT: li 3, 0 52; CHECK-NEXT: li 4, -1 53; CHECK-NEXT: #APP 54; CHECK-NEXT: crand 20, 20, 1 55; CHECK-NEXT: #NO_APP 56; CHECK-NEXT: isel 3, 4, 3, 20 57; CHECK-NEXT: blr 58; 59; CHECK-NO-ISEL-LABEL: testi32: 60; CHECK-NO-ISEL: # %bb.0: # %entry 61; CHECK-NO-ISEL-NEXT: andi. 3, 3, 1 62; CHECK-NO-ISEL-NEXT: crmove 20, 1 63; CHECK-NO-ISEL-NEXT: andi. 3, 4, 1 64; CHECK-NO-ISEL-NEXT: li 3, -1 65; CHECK-NO-ISEL-NEXT: #APP 66; CHECK-NO-ISEL-NEXT: crand 20, 20, 1 67; CHECK-NO-ISEL-NEXT: #NO_APP 68; CHECK-NO-ISEL-NEXT: bclr 12, 20, 0 69; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry 70; CHECK-NO-ISEL-NEXT: li 3, 0 71; CHECK-NO-ISEL-NEXT: blr 72entry: 73 %0 = tail call i32 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i32 %b1, i32 %b2) #0 74 ret i32 %0 75 76; The ABI sign_extend should combine with the any_extend from the asm result, 77; and the result will be 0 or -1. This highlights the fact that only the first 78; bit is meaningful. 79} 80 81define zeroext i8 @testi8(i8 zeroext %b1, i8 zeroext %b2) #0 { 82; CHECK-LABEL: testi8: 83; CHECK: # %bb.0: # %entry 84; CHECK-NEXT: andi. 3, 3, 1 85; CHECK-NEXT: crmove 20, 1 86; CHECK-NEXT: andi. 3, 4, 1 87; CHECK-NEXT: li 3, 0 88; CHECK-NEXT: li 4, 1 89; CHECK-NEXT: #APP 90; CHECK-NEXT: crand 20, 20, 1 91; CHECK-NEXT: #NO_APP 92; CHECK-NEXT: isel 3, 4, 3, 20 93; CHECK-NEXT: blr 94; 95; CHECK-NO-ISEL-LABEL: testi8: 96; CHECK-NO-ISEL: # %bb.0: # %entry 97; CHECK-NO-ISEL-NEXT: andi. 3, 3, 1 98; CHECK-NO-ISEL-NEXT: crmove 20, 1 99; CHECK-NO-ISEL-NEXT: andi. 3, 4, 1 100; CHECK-NO-ISEL-NEXT: li 3, 1 101; CHECK-NO-ISEL-NEXT: #APP 102; CHECK-NO-ISEL-NEXT: crand 20, 20, 1 103; CHECK-NO-ISEL-NEXT: #NO_APP 104; CHECK-NO-ISEL-NEXT: bclr 12, 20, 0 105; CHECK-NO-ISEL-NEXT: # %bb.1: # %entry 106; CHECK-NO-ISEL-NEXT: li 3, 0 107; CHECK-NO-ISEL-NEXT: blr 108entry: 109 %0 = tail call i8 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i8 %b1, i8 %b2) #0 110 ret i8 %0 111 112} 113 114attributes #0 = { nounwind "target-features"="+crbits" } 115 116