1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 2; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names \ 3; RUN: -mtriple=powerpc64-linux-gnu < %s | FileCheck %s \ 4; RUN: -check-prefix=BE64 5; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names \ 6; RUN: -mtriple=powerpc-linux-gnu < %s | FileCheck %s \ 7; RUN: -check-prefix=BE32 8; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names \ 9; RUN: -mtriple=powerpc64le-linux-gnu < %s | FileCheck %s \ 10; RUN: -check-prefix=LE 11define dso_local signext i32 @test(i32 noundef signext %a) local_unnamed_addr #0 { 12; BE64-LABEL: test: 13; BE64: # %bb.0: # %entry 14; BE64-NEXT: lwz r4, -28772(r13) 15; BE64-NEXT: andis. r4, r4, 128 16; BE64-NEXT: bne cr0, .LBB0_3 17; BE64-NEXT: # %bb.1: # %if.else 18; BE64-NEXT: lwz r4, -28776(r13) 19; BE64-NEXT: andis. r4, r4, 1024 20; BE64-NEXT: bne cr0, .LBB0_4 21; BE64-NEXT: # %bb.2: # %if.else3 22; BE64-NEXT: lwz r4, -28764(r13) 23; BE64-NEXT: cmplwi r4, 39 24; BE64-NEXT: addi r4, r3, 5 25; BE64-NEXT: slwi r3, r3, 1 26; BE64-NEXT: iseleq r3, r3, r4 27; BE64-NEXT: .LBB0_3: # %return 28; BE64-NEXT: extsw r3, r3 29; BE64-NEXT: blr 30; BE64-NEXT: .LBB0_4: # %if.then2 31; BE64-NEXT: addi r3, r3, -5 32; BE64-NEXT: extsw r3, r3 33; BE64-NEXT: blr 34; BE64: .quad __parse_hwcap_and_convert_at_platform 35; 36; BE32-LABEL: test: 37; BE32: # %bb.0: # %entry 38; BE32-NEXT: lwz r4, -28732(r2) 39; BE32-NEXT: andis. r4, r4, 128 40; BE32-NEXT: bnelr cr0 41; BE32-NEXT: # %bb.1: # %if.else 42; BE32-NEXT: lwz r4, -28736(r2) 43; BE32-NEXT: andis. r4, r4, 1024 44; BE32-NEXT: bne cr0, .LBB0_3 45; BE32-NEXT: # %bb.2: # %if.else3 46; BE32-NEXT: lwz r4, -28724(r2) 47; BE32-NEXT: cmplwi r4, 39 48; BE32-NEXT: addi r4, r3, 5 49; BE32-NEXT: slwi r3, r3, 1 50; BE32-NEXT: iseleq r3, r3, r4 51; BE32-NEXT: blr 52; BE32-NEXT: .LBB0_3: # %if.then2 53; BE32-NEXT: addi r3, r3, -5 54; BE32-NEXT: blr 55; BE32: .long __parse_hwcap_and_convert_at_platform 56; 57; LE-LABEL: test: 58; LE: # %bb.0: # %entry 59; LE-NEXT: lwz r4, -28776(r13) 60; LE-NEXT: andis. r4, r4, 128 61; LE-NEXT: bne cr0, .LBB0_3 62; LE-NEXT: # %bb.1: # %if.else 63; LE-NEXT: lwz r4, -28772(r13) 64; LE-NEXT: andis. r4, r4, 1024 65; LE-NEXT: bne cr0, .LBB0_4 66; LE-NEXT: # %bb.2: # %if.else3 67; LE-NEXT: lwz r4, -28764(r13) 68; LE-NEXT: cmplwi r4, 39 69; LE-NEXT: addi r4, r3, 5 70; LE-NEXT: slwi r3, r3, 1 71; LE-NEXT: iseleq r3, r3, r4 72; LE-NEXT: .LBB0_3: # %return 73; LE-NEXT: extsw r3, r3 74; LE-NEXT: blr 75; LE-NEXT: .LBB0_4: # %if.then2 76; LE-NEXT: addi r3, r3, -5 77; LE-NEXT: extsw r3, r3 78; LE-NEXT: blr 79; LE: .quad __parse_hwcap_and_convert_at_platform 80entry: 81 %cpu_supports = tail call i32 @llvm.ppc.fixed.addr.ld(i32 2) 82 %0 = and i32 %cpu_supports, 8388608 83 %.not = icmp eq i32 %0, 0 84 br i1 %.not, label %if.else, label %return 85 86if.else: ; preds = %entry 87 %cpu_supports1 = tail call i32 @llvm.ppc.fixed.addr.ld(i32 1) 88 %1 = and i32 %cpu_supports1, 67108864 89 %.not12 = icmp eq i32 %1, 0 90 br i1 %.not12, label %if.else3, label %if.then2 91 92if.then2: ; preds = %if.else 93 %sub = add nsw i32 %a, -5 94 br label %return 95 96if.else3: ; preds = %if.else 97 %cpu_is = tail call i32 @llvm.ppc.fixed.addr.ld(i32 3) 98 %2 = icmp eq i32 %cpu_is, 39 99 br i1 %2, label %if.then4, label %if.end6 100 101if.then4: ; preds = %if.else3 102 %add = shl nsw i32 %a, 1 103 br label %return 104 105if.end6: ; preds = %if.else3 106 %add7 = add nsw i32 %a, 5 107 br label %return 108 109return: ; preds = %entry, %if.end6, %if.then4, %if.then2 110 %retval.0 = phi i32 [ %sub, %if.then2 ], [ %add, %if.then4 ], [ %add7, %if.end6 ], [ %a, %entry ] 111 ret i32 %retval.0 112} 113 114declare i32 @llvm.ppc.fixed.addr.ld(i32 immarg) #1 115