xref: /llvm-project/llvm/test/CodeGen/PowerPC/constant-pool.ll (revision 53c37f300dd1b450671f2aee4cc649c380adb5ad)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-- \
3; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s
4; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
5; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s
6; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
7; RUN:   -mcpu=pwr9 -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefix=CHECK-P9
8
9 define float @FloatConstantPool() {
10; CHECK-LABEL: FloatConstantPool:
11; CHECK:       # %bb.0: # %entry
12; CHECK-NEXT:    xxsplti32dx vs1, 0, 940572664
13; CHECK-NEXT:    xxsplti32dx vs1, 1, 1073741824
14; CHECK-NEXT:    blr
15;
16; CHECK-P9-LABEL: FloatConstantPool:
17; CHECK-P9:       # %bb.0: # %entry
18; CHECK-P9-NEXT:    addis r3, r2, .LCPI0_0@toc@ha
19; CHECK-P9-NEXT:    lfs f1, .LCPI0_0@toc@l(r3)
20; CHECK-P9-NEXT:    blr
21entry:
22  ret float 0x380FFFF840000000
23}
24
25 define double @DoubleConstantPool() {
26; CHECK-LABEL: DoubleConstantPool:
27; CHECK:       # %bb.0: # %entry
28; CHECK-NEXT:    xxsplti32dx vs1, 0, 1048574
29; CHECK-NEXT:    xxsplti32dx vs1, 1, 780229072
30; CHECK-NEXT:    blr
31;
32; CHECK-P9-LABEL: DoubleConstantPool:
33; CHECK-P9:       # %bb.0: # %entry
34; CHECK-P9-NEXT:    addis r3, r2, .LCPI1_0@toc@ha
35; CHECK-P9-NEXT:    lfd f1, .LCPI1_0@toc@l(r3)
36; CHECK-P9-NEXT:    blr
37entry:
38  ret double 2.225070e-308
39}
40
41 define ppc_fp128 @LongDoubleConstantPool() {
42; CHECK-LABEL: LongDoubleConstantPool:
43; CHECK:       # %bb.0: # %entry
44; CHECK-NEXT:    xxsplti32dx vs1, 0, 56623104
45; CHECK-NEXT:    xxsplti32dx vs2, 0, -2146625897
46; CHECK-NEXT:    xxsplti32dx vs1, 1, -609716532
47; CHECK-NEXT:    xxsplti32dx vs2, 1, 1339675259
48; CHECK-NEXT:    blr
49;
50; CHECK-P9-LABEL: LongDoubleConstantPool:
51; CHECK-P9:       # %bb.0: # %entry
52; CHECK-P9-NEXT:    addis r3, r2, .LCPI2_0@toc@ha
53; CHECK-P9-NEXT:    lfd f1, .LCPI2_0@toc@l(r3)
54; CHECK-P9-NEXT:    addis r3, r2, .LCPI2_1@toc@ha
55; CHECK-P9-NEXT:    lfd f2, .LCPI2_1@toc@l(r3)
56; CHECK-P9-NEXT:    blr
57entry:
58  ret ppc_fp128 0xM03600000DBA876CC800D16974FD9D27B
59}
60
61 define fp128 @__Float128ConstantPool() {
62; CHECK-LABEL: __Float128ConstantPool:
63; CHECK:       # %bb.0: # %entry
64; CHECK-NEXT:    plxv vs34, .LCPI3_0@PCREL(0), 1
65; CHECK-NEXT:    blr
66;
67; CHECK-P9-LABEL: __Float128ConstantPool:
68; CHECK-P9:       # %bb.0: # %entry
69; CHECK-P9-NEXT:    addis r3, r2, .LCPI3_0@toc@ha
70; CHECK-P9-NEXT:    addi r3, r3, .LCPI3_0@toc@l
71; CHECK-P9-NEXT:    lxv vs34, 0(r3)
72; CHECK-P9-NEXT:    blr
73entry:
74  ret fp128 0xL00000000000000003C00FFFFC5D02B3A
75}
76
77 define <16 x i8> @VectorCharConstantPool() {
78; CHECK-LABEL: VectorCharConstantPool:
79; CHECK:       # %bb.0: # %entry
80; CHECK-NEXT:    plxv vs34, .LCPI4_0@PCREL(0), 1
81; CHECK-NEXT:    blr
82;
83; CHECK-P9-LABEL: VectorCharConstantPool:
84; CHECK-P9:       # %bb.0: # %entry
85; CHECK-P9-NEXT:    addis r3, r2, .LCPI4_0@toc@ha
86; CHECK-P9-NEXT:    addi r3, r3, .LCPI4_0@toc@l
87; CHECK-P9-NEXT:    lxv vs34, 0(r3)
88; CHECK-P9-NEXT:    blr
89entry:
90  ret <16 x i8> <i8 -128, i8 -127, i8 -126, i8 -125, i8 -124, i8 -123, i8 -122, i8 -121, i8 -120, i8 -119, i8 -118, i8 -117, i8 -116, i8 -115, i8 -114, i8 -113>
91}
92
93 define <8 x i16> @VectorShortConstantPool() {
94; CHECK-LABEL: VectorShortConstantPool:
95; CHECK:       # %bb.0: # %entry
96; CHECK-NEXT:    plxv vs34, .LCPI5_0@PCREL(0), 1
97; CHECK-NEXT:    blr
98;
99; CHECK-P9-LABEL: VectorShortConstantPool:
100; CHECK-P9:       # %bb.0: # %entry
101; CHECK-P9-NEXT:    addis r3, r2, .LCPI5_0@toc@ha
102; CHECK-P9-NEXT:    addi r3, r3, .LCPI5_0@toc@l
103; CHECK-P9-NEXT:    lxv vs34, 0(r3)
104; CHECK-P9-NEXT:    blr
105entry:
106  ret <8 x i16> <i16 -32768, i16 -32767, i16 -32766, i16 -32765, i16 -32764, i16 -32763, i16 -32762, i16 -32761>
107}
108
109 define <4 x i32> @VectorIntConstantPool() {
110; CHECK-LABEL: VectorIntConstantPool:
111; CHECK:       # %bb.0: # %entry
112; CHECK-NEXT:    plxv vs34, .LCPI6_0@PCREL(0), 1
113; CHECK-NEXT:    blr
114;
115; CHECK-P9-LABEL: VectorIntConstantPool:
116; CHECK-P9:       # %bb.0: # %entry
117; CHECK-P9-NEXT:    addis r3, r2, .LCPI6_0@toc@ha
118; CHECK-P9-NEXT:    addi r3, r3, .LCPI6_0@toc@l
119; CHECK-P9-NEXT:    lxv vs34, 0(r3)
120; CHECK-P9-NEXT:    blr
121entry:
122  ret <4 x i32> <i32 -2147483648, i32 -2147483647, i32 -2147483646, i32 -2147483645>
123}
124
125 define <2 x i64> @VectorLongLongConstantPool() {
126; CHECK-LABEL: VectorLongLongConstantPool:
127; CHECK:       # %bb.0: # %entry
128; CHECK-NEXT:    plxv vs34, .LCPI7_0@PCREL(0), 1
129; CHECK-NEXT:    blr
130;
131; CHECK-P9-LABEL: VectorLongLongConstantPool:
132; CHECK-P9:       # %bb.0: # %entry
133; CHECK-P9-NEXT:    addis r3, r2, .LCPI7_0@toc@ha
134; CHECK-P9-NEXT:    addi r3, r3, .LCPI7_0@toc@l
135; CHECK-P9-NEXT:    lxv vs34, 0(r3)
136; CHECK-P9-NEXT:    blr
137entry:
138  ret <2 x i64> <i64 -9223372036854775808, i64 -9223372036854775807>
139}
140
141 define <1 x i128> @VectorInt128ConstantPool() {
142; CHECK-LABEL: VectorInt128ConstantPool:
143; CHECK:       # %bb.0: # %entry
144; CHECK-NEXT:    plxv vs34, .LCPI8_0@PCREL(0), 1
145; CHECK-NEXT:    blr
146;
147; CHECK-P9-LABEL: VectorInt128ConstantPool:
148; CHECK-P9:       # %bb.0: # %entry
149; CHECK-P9-NEXT:    addis r3, r2, .LCPI8_0@toc@ha
150; CHECK-P9-NEXT:    addi r3, r3, .LCPI8_0@toc@l
151; CHECK-P9-NEXT:    lxv vs34, 0(r3)
152; CHECK-P9-NEXT:    blr
153entry:
154  ret <1 x i128> <i128 -27670116110564327424>
155}
156
157 define <4 x float> @VectorFloatConstantPool() {
158; CHECK-LABEL: VectorFloatConstantPool:
159; CHECK:       # %bb.0: # %entry
160; CHECK-NEXT:    plxv vs34, .LCPI9_0@PCREL(0), 1
161; CHECK-NEXT:    blr
162;
163; CHECK-P9-LABEL: VectorFloatConstantPool:
164; CHECK-P9:       # %bb.0: # %entry
165; CHECK-P9-NEXT:    addis r3, r2, .LCPI9_0@toc@ha
166; CHECK-P9-NEXT:    addi r3, r3, .LCPI9_0@toc@l
167; CHECK-P9-NEXT:    lxv vs34, 0(r3)
168; CHECK-P9-NEXT:    blr
169entry:
170  ret <4 x float> <float 0x380FFFF840000000, float 0x380FFF57C0000000, float 0x3843FFFB20000000, float 0x3843FF96C0000000>
171}
172
173 define <2 x double> @VectorDoubleConstantPool() {
174; CHECK-LABEL: VectorDoubleConstantPool:
175; CHECK:       # %bb.0: # %entry
176; CHECK-NEXT:    plxv vs34, .LCPI10_0@PCREL(0), 1
177; CHECK-NEXT:    blr
178;
179; CHECK-P9-LABEL: VectorDoubleConstantPool:
180; CHECK-P9:       # %bb.0: # %entry
181; CHECK-P9-NEXT:    addis r3, r2, .LCPI10_0@toc@ha
182; CHECK-P9-NEXT:    addi r3, r3, .LCPI10_0@toc@l
183; CHECK-P9-NEXT:    lxv vs34, 0(r3)
184; CHECK-P9-NEXT:    blr
185entry:
186  ret <2 x double> <double 2.225070e-308, double 2.225000e-308>
187}
188
189define double @two_constants(double %a) {
190; CHECK-LABEL: two_constants:
191; CHECK:       # %bb.0: # %entry
192; CHECK-NEXT:    xxsplti32dx vs0, 0, 1074446467
193; CHECK-NEXT:    xxsplti32dx vs0, 1, 309237645
194; CHECK-NEXT:    xsadddp f0, f1, f0
195; CHECK-NEXT:    xxsplti32dx vs1, 0, 1073922179
196; CHECK-NEXT:    xxsplti32dx vs1, 1, 309237645
197; CHECK-NEXT:    xsadddp f1, f0, f1
198; CHECK-NEXT:    blr
199;
200; CHECK-P9-LABEL: two_constants:
201; CHECK-P9:       # %bb.0: # %entry
202; CHECK-P9-NEXT:    addis r3, r2, .LCPI11_0@toc@ha
203; CHECK-P9-NEXT:    lfd f0, .LCPI11_0@toc@l(r3)
204; CHECK-P9-NEXT:    addis r3, r2, .LCPI11_1@toc@ha
205; CHECK-P9-NEXT:    xsadddp f0, f1, f0
206; CHECK-P9-NEXT:    lfd f1, .LCPI11_1@toc@l(r3)
207; CHECK-P9-NEXT:    xsadddp f1, f0, f1
208; CHECK-P9-NEXT:    blr
209entry:
210  %0 = fadd double %a, 3.344000e+00
211  %1 = fadd double %0, 2.344000e+00
212  ret double %1
213}
214
215define double @two_constants_two_bb(i32 %m, double %a) {
216; CHECK-LABEL: two_constants_two_bb:
217; CHECK:       # %bb.0: # %entry
218; CHECK-NEXT:    cmplwi r3, 0
219; CHECK-NEXT:    beq cr0, .LBB12_2
220; CHECK-NEXT:  # %bb.1:
221; CHECK-NEXT:    xxsplti32dx vs1, 0, 1074935889
222; CHECK-NEXT:    xxsplti32dx vs1, 1, -343597384
223; CHECK-NEXT:    blr
224; CHECK-NEXT:  .LBB12_2: # %if.end
225; CHECK-NEXT:    xxsplti32dx vs0, 0, 1076085391
226; CHECK-NEXT:    xxsplti32dx vs0, 1, 1546188227
227; CHECK-NEXT:    xsadddp f1, f1, f0
228; CHECK-NEXT:    blr
229;
230; CHECK-P9-LABEL: two_constants_two_bb:
231; CHECK-P9:       # %bb.0: # %entry
232; CHECK-P9-NEXT:    cmplwi r3, 0
233; CHECK-P9-NEXT:    beq cr0, .LBB12_2
234; CHECK-P9-NEXT:  # %bb.1:
235; CHECK-P9-NEXT:    addis r3, r2, .LCPI12_0@toc@ha
236; CHECK-P9-NEXT:    lfd f1, .LCPI12_0@toc@l(r3)
237; CHECK-P9-NEXT:    blr
238; CHECK-P9-NEXT:  .LBB12_2: # %if.end
239; CHECK-P9-NEXT:    addis r3, r2, .LCPI12_1@toc@ha
240; CHECK-P9-NEXT:    lfd f0, .LCPI12_1@toc@l(r3)
241; CHECK-P9-NEXT:    xsadddp f1, f1, f0
242; CHECK-P9-NEXT:    blr
243entry:
244  %tobool.not = icmp eq i32 %m, 0
245  br i1 %tobool.not, label %if.end, label %return
246
247if.end:
248  %add = fadd double %a, 9.880000e+00
249  br label %return
250
251return:
252  %retval.0 = phi double [ %add, %if.end ], [ 4.555000e+00, %entry ]
253  ret double %retval.0
254}
255
256define double @three_constants_f64(double %a, double %c) {
257; CHECK-LABEL: three_constants_f64:
258; CHECK:       # %bb.0: # %entry
259; CHECK-NEXT:    xxsplti32dx vs0, 0, 1074446467
260; CHECK-NEXT:    xxsplti32dx vs0, 1, 309237645
261; CHECK-NEXT:    xsadddp f0, f1, f0
262; CHECK-NEXT:    xxsplti32dx vs1, 0, 1073922179
263; CHECK-NEXT:    xxsplti32dx vs1, 1, 309237645
264; CHECK-NEXT:    xsadddp f0, f0, f1
265; CHECK-NEXT:    xxsplti32dx vs1, 0, 1073948393
266; CHECK-NEXT:    xxsplti32dx vs1, 1, 2027224564
267; CHECK-NEXT:    xsadddp f1, f0, f1
268; CHECK-NEXT:    blr
269;
270; CHECK-P9-LABEL: three_constants_f64:
271; CHECK-P9:       # %bb.0: # %entry
272; CHECK-P9-NEXT:    addis r3, r2, .LCPI13_0@toc@ha
273; CHECK-P9-NEXT:    lfd f0, .LCPI13_0@toc@l(r3)
274; CHECK-P9-NEXT:    addis r3, r2, .LCPI13_1@toc@ha
275; CHECK-P9-NEXT:    xsadddp f0, f1, f0
276; CHECK-P9-NEXT:    lfd f1, .LCPI13_1@toc@l(r3)
277; CHECK-P9-NEXT:    addis r3, r2, .LCPI13_2@toc@ha
278; CHECK-P9-NEXT:    xsadddp f0, f0, f1
279; CHECK-P9-NEXT:    lfd f1, .LCPI13_2@toc@l(r3)
280; CHECK-P9-NEXT:    xsadddp f1, f0, f1
281; CHECK-P9-NEXT:    blr
282entry:
283  %0 = fadd double %a, 3.344000e+00
284  %1 = fadd double %0, 2.344000e+00
285  %2 = fadd double %1, 2.394000e+00
286  ret double %2
287}
288
289define float @three_constants_f32(float %a, float %c) {
290; CHECK-LABEL: three_constants_f32:
291; CHECK:       # %bb.0: # %entry
292; CHECK-NEXT:    xxspltidp vs0, 1083294351
293; CHECK-NEXT:    xsaddsp f0, f1, f0
294; CHECK-NEXT:    xxspltidp vs1, 1083296911
295; CHECK-NEXT:    xsaddsp f0, f0, f1
296; CHECK-NEXT:    xxspltidp vs1, 1083292559
297; CHECK-NEXT:    xsaddsp f1, f0, f1
298; CHECK-NEXT:    blr
299;
300; CHECK-P9-LABEL: three_constants_f32:
301; CHECK-P9:       # %bb.0: # %entry
302; CHECK-P9-NEXT:    addis r3, r2, .LCPI14_0@toc@ha
303; CHECK-P9-NEXT:    lfs f0, .LCPI14_0@toc@l(r3)
304; CHECK-P9-NEXT:    addis r3, r2, .LCPI14_1@toc@ha
305; CHECK-P9-NEXT:    xsaddsp f0, f1, f0
306; CHECK-P9-NEXT:    lfs f1, .LCPI14_1@toc@l(r3)
307; CHECK-P9-NEXT:    addis r3, r2, .LCPI14_2@toc@ha
308; CHECK-P9-NEXT:    xsaddsp f0, f0, f1
309; CHECK-P9-NEXT:    lfs f1, .LCPI14_2@toc@l(r3)
310; CHECK-P9-NEXT:    xsaddsp f1, f0, f1
311; CHECK-P9-NEXT:    blr
312entry:
313  %0 = fadd float %a, 0x40123851E0000000
314  %1 = fadd float %0, 0x40123991E0000000
315  %2 = fadd float %1, 0x40123771E0000000
316  ret float %2
317}
318
319define fp128 @three_constants_f128(fp128 %a, fp128 %c) {
320; CHECK-LABEL: three_constants_f128:
321; CHECK:       # %bb.0: # %entry
322; CHECK-NEXT:    plxv vs35, .LCPI15_0@PCREL(0), 1
323; CHECK-NEXT:    xsaddqp v2, v2, v3
324; CHECK-NEXT:    plxv vs35, .LCPI15_1@PCREL(0), 1
325; CHECK-NEXT:    xsaddqp v2, v2, v3
326; CHECK-NEXT:    plxv vs35, .LCPI15_2@PCREL(0), 1
327; CHECK-NEXT:    xsaddqp v2, v2, v3
328; CHECK-NEXT:    blr
329;
330; CHECK-P9-LABEL: three_constants_f128:
331; CHECK-P9:       # %bb.0: # %entry
332; CHECK-P9-NEXT:    addis r3, r2, .LCPI15_0@toc@ha
333; CHECK-P9-NEXT:    addi r3, r3, .LCPI15_0@toc@l
334; CHECK-P9-NEXT:    lxv vs35, 0(r3)
335; CHECK-P9-NEXT:    addis r3, r2, .LCPI15_1@toc@ha
336; CHECK-P9-NEXT:    addi r3, r3, .LCPI15_1@toc@l
337; CHECK-P9-NEXT:    xsaddqp v2, v2, v3
338; CHECK-P9-NEXT:    lxv vs35, 0(r3)
339; CHECK-P9-NEXT:    addis r3, r2, .LCPI15_2@toc@ha
340; CHECK-P9-NEXT:    addi r3, r3, .LCPI15_2@toc@l
341; CHECK-P9-NEXT:    xsaddqp v2, v2, v3
342; CHECK-P9-NEXT:    lxv vs35, 0(r3)
343; CHECK-P9-NEXT:    xsaddqp v2, v2, v3
344; CHECK-P9-NEXT:    blr
345entry:
346  %0 = fadd fp128 %a, 0xL8000000000000000400123851EB851EB
347  %1 = fadd fp128 %0, 0xL8000000000000000400123851EB991EB
348  %2 = fadd fp128 %1, 0xL8000000000000000400123851EB771EB
349  ret fp128 %2
350}
351
352define ppc_fp128 @three_constants_ppcf128(ppc_fp128 %a, ppc_fp128 %c) {
353; CHECK-LABEL: three_constants_ppcf128:
354; CHECK:       # %bb.0: # %entry
355; CHECK-NEXT:    mflr r0
356; CHECK-NEXT:    std r0, 16(r1)
357; CHECK-NEXT:    stdu r1, -48(r1)
358; CHECK-NEXT:    .cfi_def_cfa_offset 48
359; CHECK-NEXT:    .cfi_offset lr, 16
360; CHECK-NEXT:    .cfi_offset v31, -16
361; CHECK-NEXT:    xxsplti32dx vs3, 0, 1074935889
362; CHECK-NEXT:    xxlxor f4, f4, f4
363; CHECK-NEXT:    stxv vs63, 32(r1) # 16-byte Folded Spill
364; CHECK-NEXT:    xxsplti32dx vs63, 0, 1074935889
365; CHECK-NEXT:    xxsplti32dx vs3, 1, -343597384
366; CHECK-NEXT:    bl __gcc_qadd@notoc
367; CHECK-NEXT:    xxsplti32dx vs3, 0, 1074935889
368; CHECK-NEXT:    xxlxor f4, f4, f4
369; CHECK-NEXT:    xxsplti32dx vs3, 1, -1719329096
370; CHECK-NEXT:    bl __gcc_qadd@notoc
371; CHECK-NEXT:    xxsplti32dx vs63, 1, 8724152
372; CHECK-NEXT:    xxlxor f4, f4, f4
373; CHECK-NEXT:    xscpsgndp f3, vs63, vs63
374; CHECK-NEXT:    bl __gcc_qadd@notoc
375; CHECK-NEXT:    lxv vs63, 32(r1) # 16-byte Folded Reload
376; CHECK-NEXT:    addi r1, r1, 48
377; CHECK-NEXT:    ld r0, 16(r1)
378; CHECK-NEXT:    mtlr r0
379; CHECK-NEXT:    blr
380;
381; CHECK-P9-LABEL: three_constants_ppcf128:
382; CHECK-P9:       # %bb.0: # %entry
383; CHECK-P9-NEXT:    mflr r0
384; CHECK-P9-NEXT:    stdu r1, -32(r1)
385; CHECK-P9-NEXT:    std r0, 48(r1)
386; CHECK-P9-NEXT:    .cfi_def_cfa_offset 32
387; CHECK-P9-NEXT:    .cfi_offset lr, 16
388; CHECK-P9-NEXT:    addis r3, r2, .LCPI16_0@toc@ha
389; CHECK-P9-NEXT:    xxlxor f4, f4, f4
390; CHECK-P9-NEXT:    lfd f3, .LCPI16_0@toc@l(r3)
391; CHECK-P9-NEXT:    bl __gcc_qadd
392; CHECK-P9-NEXT:    nop
393; CHECK-P9-NEXT:    addis r3, r2, .LCPI16_1@toc@ha
394; CHECK-P9-NEXT:    xxlxor f4, f4, f4
395; CHECK-P9-NEXT:    lfd f3, .LCPI16_1@toc@l(r3)
396; CHECK-P9-NEXT:    bl __gcc_qadd
397; CHECK-P9-NEXT:    nop
398; CHECK-P9-NEXT:    addis r3, r2, .LCPI16_2@toc@ha
399; CHECK-P9-NEXT:    xxlxor f4, f4, f4
400; CHECK-P9-NEXT:    lfd f3, .LCPI16_2@toc@l(r3)
401; CHECK-P9-NEXT:    bl __gcc_qadd
402; CHECK-P9-NEXT:    nop
403; CHECK-P9-NEXT:    addi r1, r1, 32
404; CHECK-P9-NEXT:    ld r0, 16(r1)
405; CHECK-P9-NEXT:    mtlr r0
406; CHECK-P9-NEXT:    blr
407entry:
408  %0 = fadd ppc_fp128 %a, 0xM40123851EB851EB80000000000000000
409  %1 = fadd ppc_fp128 %0, 0xM4012385199851EB80000000000000000
410  %2 = fadd ppc_fp128 %1, 0xM4012385100851EB80000000000000000
411  ret ppc_fp128 %2
412}
413
414define <2 x double> @three_constants_vector(<2 x double> %a, <2 x double> %c) {
415; CHECK-LABEL: three_constants_vector:
416; CHECK:       # %bb.0: # %entry
417; CHECK-NEXT:    plxv vs0, .LCPI17_0@PCREL(0), 1
418; CHECK-NEXT:    plxv vs2, .LCPI17_1@PCREL(0), 1
419; CHECK-NEXT:    xvadddp vs1, vs34, vs0
420; CHECK-NEXT:    xvadddp vs1, vs1, vs2
421; CHECK-NEXT:    xvadddp vs34, vs1, vs0
422; CHECK-NEXT:    blr
423;
424; CHECK-P9-LABEL: three_constants_vector:
425; CHECK-P9:       # %bb.0: # %entry
426; CHECK-P9-NEXT:    addis r3, r2, .LCPI17_0@toc@ha
427; CHECK-P9-NEXT:    addi r3, r3, .LCPI17_0@toc@l
428; CHECK-P9-NEXT:    lxv vs0, 0(r3)
429; CHECK-P9-NEXT:    addis r3, r2, .LCPI17_1@toc@ha
430; CHECK-P9-NEXT:    addi r3, r3, .LCPI17_1@toc@l
431; CHECK-P9-NEXT:    lxv vs2, 0(r3)
432; CHECK-P9-NEXT:    xvadddp vs1, vs34, vs0
433; CHECK-P9-NEXT:    xvadddp vs1, vs1, vs2
434; CHECK-P9-NEXT:    xvadddp vs34, vs1, vs0
435; CHECK-P9-NEXT:    blr
436entry:
437  %0 = fadd <2 x double> %a, <double 4.555000e+00, double 9.880000e+00>
438  %1 = fadd <2 x double> %0, <double 4.555000e+00, double 9.980000e+00>
439  %2 = fadd <2 x double> %1, <double 4.555000e+00, double 9.880000e+00>
440  ret <2 x double> %2
441}
442