xref: /llvm-project/llvm/test/CodeGen/PowerPC/combine-sext-and-shl-after-isel.ll (revision 46d5d264fc66a017bbd0182b2b5fcc0f3f23d3be)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \
3; RUN:   -ppc-asm-full-reg-names -verify-machineinstrs -O2 < %s | FileCheck %s
4; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-unknown \
5; RUN:   -ppc-asm-full-reg-names -verify-machineinstrs -O2 < %s | FileCheck %s \
6; RUN:   --check-prefix=CHECK-BE
7; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
8; RUN:   -ppc-asm-full-reg-names -verify-machineinstrs -O2 < %s | FileCheck %s \
9; RUN:   --check-prefix=CHECK-P9
10; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-unknown-unknown \
11; RUN:   -ppc-asm-full-reg-names -verify-machineinstrs -O2 < %s | FileCheck %s \
12; RUN:   --check-prefix=CHECK-P9-BE
13define dso_local i32 @poc(ptr %base, i32 %index, i1 %flag, i32 %default) {
14; CHECK-LABEL: poc:
15; CHECK:       # %bb.0: # %entry
16; CHECK-NEXT:    andi. r5, r5, 1
17; CHECK-NEXT:    bc 4, gt, .LBB0_2
18; CHECK-NEXT:  # %bb.1: # %true
19; CHECK-NEXT:    extsw r4, r4
20; CHECK-NEXT:    sldi r4, r4, 2
21; CHECK-NEXT:    lwzx r3, r3, r4
22; CHECK-NEXT:    blr
23; CHECK-NEXT:  .LBB0_2: # %false
24; CHECK-NEXT:    mr r3, r6
25; CHECK-NEXT:    blr
26;
27; CHECK-BE-LABEL: poc:
28; CHECK-BE:       # %bb.0: # %entry
29; CHECK-BE-NEXT:    andi. r5, r5, 1
30; CHECK-BE-NEXT:    bc 4, gt, .LBB0_2
31; CHECK-BE-NEXT:  # %bb.1: # %true
32; CHECK-BE-NEXT:    extsw r4, r4
33; CHECK-BE-NEXT:    sldi r4, r4, 2
34; CHECK-BE-NEXT:    lwzx r3, r3, r4
35; CHECK-BE-NEXT:    blr
36; CHECK-BE-NEXT:  .LBB0_2: # %false
37; CHECK-BE-NEXT:    mr r3, r6
38; CHECK-BE-NEXT:    blr
39;
40; CHECK-P9-LABEL: poc:
41; CHECK-P9:       # %bb.0: # %entry
42; CHECK-P9-NEXT:    andi. r5, r5, 1
43; CHECK-P9-NEXT:    bc 4, gt, .LBB0_2
44; CHECK-P9-NEXT:  # %bb.1: # %true
45; CHECK-P9-NEXT:    extswsli r4, r4, 2
46; CHECK-P9-NEXT:    lwzx r3, r3, r4
47; CHECK-P9-NEXT:    blr
48; CHECK-P9-NEXT:  .LBB0_2: # %false
49; CHECK-P9-NEXT:    mr r3, r6
50; CHECK-P9-NEXT:    blr
51;
52; CHECK-P9-BE-LABEL: poc:
53; CHECK-P9-BE:       # %bb.0: # %entry
54; CHECK-P9-BE-NEXT:    andi. r5, r5, 1
55; CHECK-P9-BE-NEXT:    bc 4, gt, .LBB0_2
56; CHECK-P9-BE-NEXT:  # %bb.1: # %true
57; CHECK-P9-BE-NEXT:    extswsli r4, r4, 2
58; CHECK-P9-BE-NEXT:    lwzx r3, r3, r4
59; CHECK-P9-BE-NEXT:    blr
60; CHECK-P9-BE-NEXT:  .LBB0_2: # %false
61; CHECK-P9-BE-NEXT:    mr r3, r6
62; CHECK-P9-BE-NEXT:    blr
63entry:
64  %iconv = sext i32 %index to i64
65  br i1 %flag, label %true, label %false
66
67true:
68  %ptr = getelementptr inbounds i32, ptr %base, i64 %iconv
69  %value = load i32, ptr %ptr, align 4
70  ret i32 %value
71
72false:
73  ret i32 %default
74}
75
76define dso_local i64 @poc_i64(ptr %base, i32 %index, i1 %flag, i64 %default) {
77; CHECK-LABEL: poc_i64:
78; CHECK:       # %bb.0: # %entry
79; CHECK-NEXT:    andi. r5, r5, 1
80; CHECK-NEXT:    bc 4, gt, .LBB1_2
81; CHECK-NEXT:  # %bb.1: # %true
82; CHECK-NEXT:    extsw r4, r4
83; CHECK-NEXT:    sldi r4, r4, 3
84; CHECK-NEXT:    ldx r3, r3, r4
85; CHECK-NEXT:    blr
86; CHECK-NEXT:  .LBB1_2: # %false
87; CHECK-NEXT:    mr r3, r6
88; CHECK-NEXT:    blr
89;
90; CHECK-BE-LABEL: poc_i64:
91; CHECK-BE:       # %bb.0: # %entry
92; CHECK-BE-NEXT:    andi. r5, r5, 1
93; CHECK-BE-NEXT:    bc 4, gt, .LBB1_2
94; CHECK-BE-NEXT:  # %bb.1: # %true
95; CHECK-BE-NEXT:    extsw r4, r4
96; CHECK-BE-NEXT:    sldi r4, r4, 3
97; CHECK-BE-NEXT:    ldx r3, r3, r4
98; CHECK-BE-NEXT:    blr
99; CHECK-BE-NEXT:  .LBB1_2: # %false
100; CHECK-BE-NEXT:    mr r3, r6
101; CHECK-BE-NEXT:    blr
102;
103; CHECK-P9-LABEL: poc_i64:
104; CHECK-P9:       # %bb.0: # %entry
105; CHECK-P9-NEXT:    andi. r5, r5, 1
106; CHECK-P9-NEXT:    bc 4, gt, .LBB1_2
107; CHECK-P9-NEXT:  # %bb.1: # %true
108; CHECK-P9-NEXT:    extswsli r4, r4, 3
109; CHECK-P9-NEXT:    ldx r3, r3, r4
110; CHECK-P9-NEXT:    blr
111; CHECK-P9-NEXT:  .LBB1_2: # %false
112; CHECK-P9-NEXT:    mr r3, r6
113; CHECK-P9-NEXT:    blr
114;
115; CHECK-P9-BE-LABEL: poc_i64:
116; CHECK-P9-BE:       # %bb.0: # %entry
117; CHECK-P9-BE-NEXT:    andi. r5, r5, 1
118; CHECK-P9-BE-NEXT:    bc 4, gt, .LBB1_2
119; CHECK-P9-BE-NEXT:  # %bb.1: # %true
120; CHECK-P9-BE-NEXT:    extswsli r4, r4, 3
121; CHECK-P9-BE-NEXT:    ldx r3, r3, r4
122; CHECK-P9-BE-NEXT:    blr
123; CHECK-P9-BE-NEXT:  .LBB1_2: # %false
124; CHECK-P9-BE-NEXT:    mr r3, r6
125; CHECK-P9-BE-NEXT:    blr
126entry:
127  %iconv = sext i32 %index to i64
128  br i1 %flag, label %true, label %false
129
130true:
131  %ptr = getelementptr inbounds i64, ptr %base, i64 %iconv
132  %value = load i64, ptr %ptr, align 8
133  ret i64 %value
134
135false:
136  ret i64 %default
137}
138
139define dso_local i64 @no_extswsli(ptr %base, i32 %index, i1 %flag) {
140; CHECK-LABEL: no_extswsli:
141; CHECK:       # %bb.0: # %entry
142; CHECK-NEXT:    extsw r4, r4
143; CHECK-NEXT:    andi. r5, r5, 1
144; CHECK-NEXT:    bc 4, gt, .LBB2_2
145; CHECK-NEXT:  # %bb.1: # %true
146; CHECK-NEXT:    sldi r4, r4, 3
147; CHECK-NEXT:    ldx r3, r3, r4
148; CHECK-NEXT:    blr
149; CHECK-NEXT:  .LBB2_2: # %false
150; CHECK-NEXT:    mr r3, r4
151; CHECK-NEXT:    blr
152;
153; CHECK-BE-LABEL: no_extswsli:
154; CHECK-BE:       # %bb.0: # %entry
155; CHECK-BE-NEXT:    extsw r4, r4
156; CHECK-BE-NEXT:    andi. r5, r5, 1
157; CHECK-BE-NEXT:    bc 4, gt, .LBB2_2
158; CHECK-BE-NEXT:  # %bb.1: # %true
159; CHECK-BE-NEXT:    sldi r4, r4, 3
160; CHECK-BE-NEXT:    ldx r3, r3, r4
161; CHECK-BE-NEXT:    blr
162; CHECK-BE-NEXT:  .LBB2_2: # %false
163; CHECK-BE-NEXT:    mr r3, r4
164; CHECK-BE-NEXT:    blr
165;
166; CHECK-P9-LABEL: no_extswsli:
167; CHECK-P9:       # %bb.0: # %entry
168; CHECK-P9-NEXT:    extsw r4, r4
169; CHECK-P9-NEXT:    andi. r5, r5, 1
170; CHECK-P9-NEXT:    bc 4, gt, .LBB2_2
171; CHECK-P9-NEXT:  # %bb.1: # %true
172; CHECK-P9-NEXT:    sldi r4, r4, 3
173; CHECK-P9-NEXT:    ldx r3, r3, r4
174; CHECK-P9-NEXT:    blr
175; CHECK-P9-NEXT:  .LBB2_2: # %false
176; CHECK-P9-NEXT:    mr r3, r4
177; CHECK-P9-NEXT:    blr
178;
179; CHECK-P9-BE-LABEL: no_extswsli:
180; CHECK-P9-BE:       # %bb.0: # %entry
181; CHECK-P9-BE-NEXT:    extsw r4, r4
182; CHECK-P9-BE-NEXT:    andi. r5, r5, 1
183; CHECK-P9-BE-NEXT:    bc 4, gt, .LBB2_2
184; CHECK-P9-BE-NEXT:  # %bb.1: # %true
185; CHECK-P9-BE-NEXT:    sldi r4, r4, 3
186; CHECK-P9-BE-NEXT:    ldx r3, r3, r4
187; CHECK-P9-BE-NEXT:    blr
188; CHECK-P9-BE-NEXT:  .LBB2_2: # %false
189; CHECK-P9-BE-NEXT:    mr r3, r4
190; CHECK-P9-BE-NEXT:    blr
191entry:
192  %iconv = sext i32 %index to i64
193  br i1 %flag, label %true, label %false
194
195true:
196  %ptr = getelementptr inbounds i64, ptr %base, i64 %iconv
197  %value = load i64, ptr %ptr, align 8
198  ret i64 %value
199
200false:
201  ret i64 %iconv
202}
203
204define hidden void @testCaller(i1 %incond) local_unnamed_addr align 2 nounwind {
205; CHECK-LABEL: testCaller:
206; CHECK:       # %bb.0: # %entry
207; CHECK-NEXT:    mfocrf r12, 32
208; CHECK-NEXT:    stw r12, 8(r1)
209; CHECK-NEXT:    mflr r0
210; CHECK-NEXT:    stdu r1, -64(r1)
211; CHECK-NEXT:    std r0, 80(r1)
212; CHECK-NEXT:    std r30, 48(r1) # 8-byte Folded Spill
213; CHECK-NEXT:    andi. r3, r3, 1
214; CHECK-NEXT:    li r3, -1
215; CHECK-NEXT:    li r30, 0
216; CHECK-NEXT:    crmove 4*cr2+lt, gt
217; CHECK-NEXT:    std r29, 40(r1) # 8-byte Folded Spill
218; CHECK-NEXT:    b .LBB3_2
219; CHECK-NEXT:    .p2align 4
220; CHECK-NEXT:  .LBB3_1: # %if.end116
221; CHECK-NEXT:    #
222; CHECK-NEXT:    bl callee
223; CHECK-NEXT:    nop
224; CHECK-NEXT:    mr r3, r29
225; CHECK-NEXT:  .LBB3_2: # %cond.end.i.i
226; CHECK-NEXT:    # =>This Loop Header: Depth=1
227; CHECK-NEXT:    # Child Loop BB3_3 Depth 2
228; CHECK-NEXT:    lwz r29, 0(r3)
229; CHECK-NEXT:    li r5, 0
230; CHECK-NEXT:    extsw r4, r29
231; CHECK-NEXT:    .p2align 5
232; CHECK-NEXT:  .LBB3_3: # %while.body5.i
233; CHECK-NEXT:    # Parent Loop BB3_2 Depth=1
234; CHECK-NEXT:    # => This Inner Loop Header: Depth=2
235; CHECK-NEXT:    addi r5, r5, -1
236; CHECK-NEXT:    cmpwi r5, 0
237; CHECK-NEXT:    bgt cr0, .LBB3_3
238; CHECK-NEXT:  # %bb.4: # %while.cond12.preheader.i
239; CHECK-NEXT:    #
240; CHECK-NEXT:    bc 12, 4*cr2+lt, .LBB3_1
241; CHECK-NEXT:  # %bb.5: # %for.cond99.preheader
242; CHECK-NEXT:    #
243; CHECK-NEXT:    ld r5, 0(r3)
244; CHECK-NEXT:    sldi r4, r4, 2
245; CHECK-NEXT:    stw r3, 0(r3)
246; CHECK-NEXT:    stwx r30, r5, r4
247; CHECK-NEXT:    b .LBB3_1
248;
249; CHECK-BE-LABEL: testCaller:
250; CHECK-BE:       # %bb.0: # %entry
251; CHECK-BE-NEXT:    mfcr r12
252; CHECK-BE-NEXT:    stw r12, 8(r1)
253; CHECK-BE-NEXT:    mflr r0
254; CHECK-BE-NEXT:    stdu r1, -80(r1)
255; CHECK-BE-NEXT:    std r0, 96(r1)
256; CHECK-BE-NEXT:    std r30, 64(r1) # 8-byte Folded Spill
257; CHECK-BE-NEXT:    andi. r3, r3, 1
258; CHECK-BE-NEXT:    li r3, -1
259; CHECK-BE-NEXT:    li r30, 0
260; CHECK-BE-NEXT:    crmove 4*cr2+lt, gt
261; CHECK-BE-NEXT:    std r29, 56(r1) # 8-byte Folded Spill
262; CHECK-BE-NEXT:    b .LBB3_2
263; CHECK-BE-NEXT:    .p2align 4
264; CHECK-BE-NEXT:  .LBB3_1: # %if.end116
265; CHECK-BE-NEXT:    #
266; CHECK-BE-NEXT:    bl callee
267; CHECK-BE-NEXT:    nop
268; CHECK-BE-NEXT:    mr r3, r29
269; CHECK-BE-NEXT:  .LBB3_2: # %cond.end.i.i
270; CHECK-BE-NEXT:    # =>This Loop Header: Depth=1
271; CHECK-BE-NEXT:    # Child Loop BB3_3 Depth 2
272; CHECK-BE-NEXT:    lwz r29, 0(r3)
273; CHECK-BE-NEXT:    li r5, 0
274; CHECK-BE-NEXT:    extsw r4, r29
275; CHECK-BE-NEXT:    .p2align 5
276; CHECK-BE-NEXT:  .LBB3_3: # %while.body5.i
277; CHECK-BE-NEXT:    # Parent Loop BB3_2 Depth=1
278; CHECK-BE-NEXT:    # => This Inner Loop Header: Depth=2
279; CHECK-BE-NEXT:    addi r5, r5, -1
280; CHECK-BE-NEXT:    cmpwi r5, 0
281; CHECK-BE-NEXT:    bgt cr0, .LBB3_3
282; CHECK-BE-NEXT:  # %bb.4: # %while.cond12.preheader.i
283; CHECK-BE-NEXT:    #
284; CHECK-BE-NEXT:    bc 12, 4*cr2+lt, .LBB3_1
285; CHECK-BE-NEXT:  # %bb.5: # %for.cond99.preheader
286; CHECK-BE-NEXT:    #
287; CHECK-BE-NEXT:    ld r5, 0(r3)
288; CHECK-BE-NEXT:    sldi r4, r4, 2
289; CHECK-BE-NEXT:    stw r3, 0(r3)
290; CHECK-BE-NEXT:    stwx r30, r5, r4
291; CHECK-BE-NEXT:    b .LBB3_1
292;
293; CHECK-P9-LABEL: testCaller:
294; CHECK-P9:       # %bb.0: # %entry
295; CHECK-P9-NEXT:    mfocrf r12, 32
296; CHECK-P9-NEXT:    mflr r0
297; CHECK-P9-NEXT:    stw r12, 8(r1)
298; CHECK-P9-NEXT:    stdu r1, -64(r1)
299; CHECK-P9-NEXT:    andi. r3, r3, 1
300; CHECK-P9-NEXT:    std r0, 80(r1)
301; CHECK-P9-NEXT:    std r30, 48(r1) # 8-byte Folded Spill
302; CHECK-P9-NEXT:    li r3, -1
303; CHECK-P9-NEXT:    li r30, 0
304; CHECK-P9-NEXT:    std r29, 40(r1) # 8-byte Folded Spill
305; CHECK-P9-NEXT:    crmove 4*cr2+lt, gt
306; CHECK-P9-NEXT:    b .LBB3_2
307; CHECK-P9-NEXT:    .p2align 4
308; CHECK-P9-NEXT:  .LBB3_1: # %if.end116
309; CHECK-P9-NEXT:    #
310; CHECK-P9-NEXT:    bl callee
311; CHECK-P9-NEXT:    nop
312; CHECK-P9-NEXT:    mr r3, r29
313; CHECK-P9-NEXT:  .LBB3_2: # %cond.end.i.i
314; CHECK-P9-NEXT:    # =>This Loop Header: Depth=1
315; CHECK-P9-NEXT:    # Child Loop BB3_3 Depth 2
316; CHECK-P9-NEXT:    lwz r29, 0(r3)
317; CHECK-P9-NEXT:    li r4, 0
318; CHECK-P9-NEXT:    .p2align 5
319; CHECK-P9-NEXT:  .LBB3_3: # %while.body5.i
320; CHECK-P9-NEXT:    # Parent Loop BB3_2 Depth=1
321; CHECK-P9-NEXT:    # => This Inner Loop Header: Depth=2
322; CHECK-P9-NEXT:    addi r4, r4, -1
323; CHECK-P9-NEXT:    cmpwi r4, 0
324; CHECK-P9-NEXT:    bgt cr0, .LBB3_3
325; CHECK-P9-NEXT:  # %bb.4: # %while.cond12.preheader.i
326; CHECK-P9-NEXT:    #
327; CHECK-P9-NEXT:    bc 12, 4*cr2+lt, .LBB3_1
328; CHECK-P9-NEXT:  # %bb.5: # %for.cond99.preheader
329; CHECK-P9-NEXT:    #
330; CHECK-P9-NEXT:    ld r4, 0(r3)
331; CHECK-P9-NEXT:    extswsli r5, r29, 2
332; CHECK-P9-NEXT:    stw r3, 0(r3)
333; CHECK-P9-NEXT:    stwx r30, r4, r5
334; CHECK-P9-NEXT:    b .LBB3_1
335;
336; CHECK-P9-BE-LABEL: testCaller:
337; CHECK-P9-BE:       # %bb.0: # %entry
338; CHECK-P9-BE-NEXT:    mfcr r12
339; CHECK-P9-BE-NEXT:    mflr r0
340; CHECK-P9-BE-NEXT:    stw r12, 8(r1)
341; CHECK-P9-BE-NEXT:    stdu r1, -80(r1)
342; CHECK-P9-BE-NEXT:    andi. r3, r3, 1
343; CHECK-P9-BE-NEXT:    std r0, 96(r1)
344; CHECK-P9-BE-NEXT:    std r30, 64(r1) # 8-byte Folded Spill
345; CHECK-P9-BE-NEXT:    li r3, -1
346; CHECK-P9-BE-NEXT:    li r30, 0
347; CHECK-P9-BE-NEXT:    std r29, 56(r1) # 8-byte Folded Spill
348; CHECK-P9-BE-NEXT:    crmove 4*cr2+lt, gt
349; CHECK-P9-BE-NEXT:    b .LBB3_2
350; CHECK-P9-BE-NEXT:    .p2align 4
351; CHECK-P9-BE-NEXT:  .LBB3_1: # %if.end116
352; CHECK-P9-BE-NEXT:    #
353; CHECK-P9-BE-NEXT:    bl callee
354; CHECK-P9-BE-NEXT:    nop
355; CHECK-P9-BE-NEXT:    mr r3, r29
356; CHECK-P9-BE-NEXT:  .LBB3_2: # %cond.end.i.i
357; CHECK-P9-BE-NEXT:    # =>This Loop Header: Depth=1
358; CHECK-P9-BE-NEXT:    # Child Loop BB3_3 Depth 2
359; CHECK-P9-BE-NEXT:    lwz r29, 0(r3)
360; CHECK-P9-BE-NEXT:    li r4, 0
361; CHECK-P9-BE-NEXT:    .p2align 5
362; CHECK-P9-BE-NEXT:  .LBB3_3: # %while.body5.i
363; CHECK-P9-BE-NEXT:    # Parent Loop BB3_2 Depth=1
364; CHECK-P9-BE-NEXT:    # => This Inner Loop Header: Depth=2
365; CHECK-P9-BE-NEXT:    addi r4, r4, -1
366; CHECK-P9-BE-NEXT:    cmpwi r4, 0
367; CHECK-P9-BE-NEXT:    bgt cr0, .LBB3_3
368; CHECK-P9-BE-NEXT:  # %bb.4: # %while.cond12.preheader.i
369; CHECK-P9-BE-NEXT:    #
370; CHECK-P9-BE-NEXT:    bc 12, 4*cr2+lt, .LBB3_1
371; CHECK-P9-BE-NEXT:  # %bb.5: # %for.cond99.preheader
372; CHECK-P9-BE-NEXT:    #
373; CHECK-P9-BE-NEXT:    ld r4, 0(r3)
374; CHECK-P9-BE-NEXT:    extswsli r5, r29, 2
375; CHECK-P9-BE-NEXT:    stw r3, 0(r3)
376; CHECK-P9-BE-NEXT:    stwx r30, r4, r5
377; CHECK-P9-BE-NEXT:    b .LBB3_1
378entry:
379  br label %exit
380
381exit: ; preds = %entry
382  br label %cond.end.i.i
383
384cond.end.i.i:                                     ; preds = %if.end116, %exit
385  %CurrentState.0566 = phi i32 [ %CurrentState.2, %if.end116 ], [ -1, %exit ]
386  %0 = load i32, ptr poison, align 8
387  br label %while.body5.i
388
389while.cond12.preheader.i:                         ; preds = %while.body5.i
390  br i1 %incond, label %if.end116, label %for.cond99.preheader
391
392while.body5.i:                                    ; preds = %while.body5.i, %cond.end.i.i
393  %Test.012.i = phi i32 [ 0, %cond.end.i.i ], [ %dec10.i, %while.body5.i ]
394  %dec10.i = add nsw i32 %Test.012.i, -1
395  %cmp4.i = icmp slt i32 0, %dec10.i
396  br i1 %cmp4.i, label %while.body5.i, label %while.cond12.preheader.i
397
398for.cond99.preheader:                             ; preds = %while.cond12.preheader.i
399  %1 = load ptr, ptr poison, align 8
400  %conv103 = sext i32 %0 to i64
401  %arrayidx.i426 = getelementptr inbounds i32, ptr %1, i64 %conv103
402  store i32 0, ptr %arrayidx.i426, align 4
403  store i32 %CurrentState.0566, ptr poison, align 8
404  br label %if.end116
405
406if.end116:                                        ; preds = %for.cond99.preheader, %while.cond12.preheader.i
407  %CurrentState.2 = phi i32 [ %0, %while.cond12.preheader.i ], [ poison, %for.cond99.preheader ]
408  call fastcc void @callee()
409  br label %cond.end.i.i
410}
411declare dso_local fastcc void @callee() unnamed_addr align 2
412