1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=powerpc64le-unknown-unknown | FileCheck %s 3 4; Infinite loop identified in D62963. 5define <4 x double> @fneg_fdiv_splat(double %a0, <4 x double> %a1) { 6; CHECK-LABEL: fneg_fdiv_splat: 7; CHECK: # %bb.0: # %entry 8; CHECK-NEXT: addis 3, 2, .LCPI0_0@toc@ha 9; CHECK-NEXT: xxspltd 0, 1, 0 10; CHECK-NEXT: addi 3, 3, .LCPI0_0@toc@l 11; CHECK-NEXT: xvredp 1, 0 12; CHECK-NEXT: lxvd2x 2, 0, 3 13; CHECK-NEXT: xxlor 3, 2, 2 14; CHECK-NEXT: xvmaddadp 3, 0, 1 15; CHECK-NEXT: xvnmsubadp 1, 1, 3 16; CHECK-NEXT: xvmaddadp 2, 0, 1 17; CHECK-NEXT: xvmsubadp 1, 1, 2 18; CHECK-NEXT: xvmuldp 34, 34, 1 19; CHECK-NEXT: xvmuldp 35, 35, 1 20; CHECK-NEXT: blr 21entry: 22 %splat.splatinsert = insertelement <4 x double> undef, double %a0, i32 0 23 %splat.splat = shufflevector <4 x double> %splat.splatinsert, <4 x double> undef, <4 x i32> zeroinitializer 24 %div = fdiv contract reassoc nsz arcp ninf <4 x double> %a1, %splat.splat 25 %sub = fsub contract reassoc nsz <4 x double> <double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00>, %div 26 ret <4 x double> %sub 27} 28