1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=powerpc64le-linux-gnu < %s | FileCheck %s -check-prefix=PPC64LE 3 4define i8 @test0(ptr %ptr) { 5; PPC64LE-LABEL: test0: 6; PPC64LE: # %bb.0: 7; PPC64LE-NEXT: lbz 3, 0(3) 8; PPC64LE-NEXT: blr 9 %val = load atomic i8, ptr %ptr unordered, align 1 10 ret i8 %val 11} 12 13define i8 @test1(ptr %ptr) { 14; PPC64LE-LABEL: test1: 15; PPC64LE: # %bb.0: 16; PPC64LE-NEXT: lbz 3, 0(3) 17; PPC64LE-NEXT: blr 18 %val = load atomic i8, ptr %ptr monotonic, align 1 19 ret i8 %val 20} 21 22define i8 @test2(ptr %ptr) { 23; PPC64LE-LABEL: test2: 24; PPC64LE: # %bb.0: 25; PPC64LE-NEXT: lbz 3, 0(3) 26; PPC64LE-NEXT: cmpd 7, 3, 3 27; PPC64LE-NEXT: bne- 7, .+4 28; PPC64LE-NEXT: isync 29; PPC64LE-NEXT: blr 30 %val = load atomic i8, ptr %ptr acquire, align 1 31 ret i8 %val 32} 33 34define i8 @test3(ptr %ptr) { 35; PPC64LE-LABEL: test3: 36; PPC64LE: # %bb.0: 37; PPC64LE-NEXT: sync 38; PPC64LE-NEXT: lbz 3, 0(3) 39; PPC64LE-NEXT: cmpd 7, 3, 3 40; PPC64LE-NEXT: bne- 7, .+4 41; PPC64LE-NEXT: isync 42; PPC64LE-NEXT: blr 43 %val = load atomic i8, ptr %ptr seq_cst, align 1 44 ret i8 %val 45} 46 47define i16 @test4(ptr %ptr) { 48; PPC64LE-LABEL: test4: 49; PPC64LE: # %bb.0: 50; PPC64LE-NEXT: lhz 3, 0(3) 51; PPC64LE-NEXT: blr 52 %val = load atomic i16, ptr %ptr unordered, align 2 53 ret i16 %val 54} 55 56define i16 @test5(ptr %ptr) { 57; PPC64LE-LABEL: test5: 58; PPC64LE: # %bb.0: 59; PPC64LE-NEXT: lhz 3, 0(3) 60; PPC64LE-NEXT: blr 61 %val = load atomic i16, ptr %ptr monotonic, align 2 62 ret i16 %val 63} 64 65define i16 @test6(ptr %ptr) { 66; PPC64LE-LABEL: test6: 67; PPC64LE: # %bb.0: 68; PPC64LE-NEXT: lhz 3, 0(3) 69; PPC64LE-NEXT: cmpd 7, 3, 3 70; PPC64LE-NEXT: bne- 7, .+4 71; PPC64LE-NEXT: isync 72; PPC64LE-NEXT: blr 73 %val = load atomic i16, ptr %ptr acquire, align 2 74 ret i16 %val 75} 76 77define i16 @test7(ptr %ptr) { 78; PPC64LE-LABEL: test7: 79; PPC64LE: # %bb.0: 80; PPC64LE-NEXT: sync 81; PPC64LE-NEXT: lhz 3, 0(3) 82; PPC64LE-NEXT: cmpd 7, 3, 3 83; PPC64LE-NEXT: bne- 7, .+4 84; PPC64LE-NEXT: isync 85; PPC64LE-NEXT: blr 86 %val = load atomic i16, ptr %ptr seq_cst, align 2 87 ret i16 %val 88} 89 90define i32 @test8(ptr %ptr) { 91; PPC64LE-LABEL: test8: 92; PPC64LE: # %bb.0: 93; PPC64LE-NEXT: lwz 3, 0(3) 94; PPC64LE-NEXT: blr 95 %val = load atomic i32, ptr %ptr unordered, align 4 96 ret i32 %val 97} 98 99define i32 @test9(ptr %ptr) { 100; PPC64LE-LABEL: test9: 101; PPC64LE: # %bb.0: 102; PPC64LE-NEXT: lwz 3, 0(3) 103; PPC64LE-NEXT: blr 104 %val = load atomic i32, ptr %ptr monotonic, align 4 105 ret i32 %val 106} 107 108define i32 @test10(ptr %ptr) { 109; PPC64LE-LABEL: test10: 110; PPC64LE: # %bb.0: 111; PPC64LE-NEXT: lwz 3, 0(3) 112; PPC64LE-NEXT: cmpd 7, 3, 3 113; PPC64LE-NEXT: bne- 7, .+4 114; PPC64LE-NEXT: isync 115; PPC64LE-NEXT: blr 116 %val = load atomic i32, ptr %ptr acquire, align 4 117 ret i32 %val 118} 119 120define i32 @test11(ptr %ptr) { 121; PPC64LE-LABEL: test11: 122; PPC64LE: # %bb.0: 123; PPC64LE-NEXT: sync 124; PPC64LE-NEXT: lwz 3, 0(3) 125; PPC64LE-NEXT: cmpd 7, 3, 3 126; PPC64LE-NEXT: bne- 7, .+4 127; PPC64LE-NEXT: isync 128; PPC64LE-NEXT: blr 129 %val = load atomic i32, ptr %ptr seq_cst, align 4 130 ret i32 %val 131} 132 133define i64 @test12(ptr %ptr) { 134; PPC64LE-LABEL: test12: 135; PPC64LE: # %bb.0: 136; PPC64LE-NEXT: ld 3, 0(3) 137; PPC64LE-NEXT: blr 138 %val = load atomic i64, ptr %ptr unordered, align 8 139 ret i64 %val 140} 141 142define i64 @test13(ptr %ptr) { 143; PPC64LE-LABEL: test13: 144; PPC64LE: # %bb.0: 145; PPC64LE-NEXT: ld 3, 0(3) 146; PPC64LE-NEXT: blr 147 %val = load atomic i64, ptr %ptr monotonic, align 8 148 ret i64 %val 149} 150 151define i64 @test14(ptr %ptr) { 152; PPC64LE-LABEL: test14: 153; PPC64LE: # %bb.0: 154; PPC64LE-NEXT: ld 3, 0(3) 155; PPC64LE-NEXT: cmpd 7, 3, 3 156; PPC64LE-NEXT: bne- 7, .+4 157; PPC64LE-NEXT: isync 158; PPC64LE-NEXT: blr 159 %val = load atomic i64, ptr %ptr acquire, align 8 160 ret i64 %val 161} 162 163define i64 @test15(ptr %ptr) { 164; PPC64LE-LABEL: test15: 165; PPC64LE: # %bb.0: 166; PPC64LE-NEXT: sync 167; PPC64LE-NEXT: ld 3, 0(3) 168; PPC64LE-NEXT: cmpd 7, 3, 3 169; PPC64LE-NEXT: bne- 7, .+4 170; PPC64LE-NEXT: isync 171; PPC64LE-NEXT: blr 172 %val = load atomic i64, ptr %ptr seq_cst, align 8 173 ret i64 %val 174} 175 176define void @test16(ptr %ptr, i8 %val) { 177; PPC64LE-LABEL: test16: 178; PPC64LE: # %bb.0: 179; PPC64LE-NEXT: stb 4, 0(3) 180; PPC64LE-NEXT: blr 181 store atomic i8 %val, ptr %ptr unordered, align 1 182 ret void 183} 184 185define void @test17(ptr %ptr, i8 %val) { 186; PPC64LE-LABEL: test17: 187; PPC64LE: # %bb.0: 188; PPC64LE-NEXT: stb 4, 0(3) 189; PPC64LE-NEXT: blr 190 store atomic i8 %val, ptr %ptr monotonic, align 1 191 ret void 192} 193 194define void @test18(ptr %ptr, i8 %val) { 195; PPC64LE-LABEL: test18: 196; PPC64LE: # %bb.0: 197; PPC64LE-NEXT: lwsync 198; PPC64LE-NEXT: stb 4, 0(3) 199; PPC64LE-NEXT: blr 200 store atomic i8 %val, ptr %ptr release, align 1 201 ret void 202} 203 204define void @test19(ptr %ptr, i8 %val) { 205; PPC64LE-LABEL: test19: 206; PPC64LE: # %bb.0: 207; PPC64LE-NEXT: sync 208; PPC64LE-NEXT: stb 4, 0(3) 209; PPC64LE-NEXT: blr 210 store atomic i8 %val, ptr %ptr seq_cst, align 1 211 ret void 212} 213 214define void @test20(ptr %ptr, i16 %val) { 215; PPC64LE-LABEL: test20: 216; PPC64LE: # %bb.0: 217; PPC64LE-NEXT: sth 4, 0(3) 218; PPC64LE-NEXT: blr 219 store atomic i16 %val, ptr %ptr unordered, align 2 220 ret void 221} 222 223define void @test21(ptr %ptr, i16 %val) { 224; PPC64LE-LABEL: test21: 225; PPC64LE: # %bb.0: 226; PPC64LE-NEXT: sth 4, 0(3) 227; PPC64LE-NEXT: blr 228 store atomic i16 %val, ptr %ptr monotonic, align 2 229 ret void 230} 231 232define void @test22(ptr %ptr, i16 %val) { 233; PPC64LE-LABEL: test22: 234; PPC64LE: # %bb.0: 235; PPC64LE-NEXT: lwsync 236; PPC64LE-NEXT: sth 4, 0(3) 237; PPC64LE-NEXT: blr 238 store atomic i16 %val, ptr %ptr release, align 2 239 ret void 240} 241 242define void @test23(ptr %ptr, i16 %val) { 243; PPC64LE-LABEL: test23: 244; PPC64LE: # %bb.0: 245; PPC64LE-NEXT: sync 246; PPC64LE-NEXT: sth 4, 0(3) 247; PPC64LE-NEXT: blr 248 store atomic i16 %val, ptr %ptr seq_cst, align 2 249 ret void 250} 251 252define void @test24(ptr %ptr, i32 %val) { 253; PPC64LE-LABEL: test24: 254; PPC64LE: # %bb.0: 255; PPC64LE-NEXT: stw 4, 0(3) 256; PPC64LE-NEXT: blr 257 store atomic i32 %val, ptr %ptr unordered, align 4 258 ret void 259} 260 261define void @test25(ptr %ptr, i32 %val) { 262; PPC64LE-LABEL: test25: 263; PPC64LE: # %bb.0: 264; PPC64LE-NEXT: stw 4, 0(3) 265; PPC64LE-NEXT: blr 266 store atomic i32 %val, ptr %ptr monotonic, align 4 267 ret void 268} 269 270define void @test26(ptr %ptr, i32 %val) { 271; PPC64LE-LABEL: test26: 272; PPC64LE: # %bb.0: 273; PPC64LE-NEXT: lwsync 274; PPC64LE-NEXT: stw 4, 0(3) 275; PPC64LE-NEXT: blr 276 store atomic i32 %val, ptr %ptr release, align 4 277 ret void 278} 279 280define void @test27(ptr %ptr, i32 %val) { 281; PPC64LE-LABEL: test27: 282; PPC64LE: # %bb.0: 283; PPC64LE-NEXT: sync 284; PPC64LE-NEXT: stw 4, 0(3) 285; PPC64LE-NEXT: blr 286 store atomic i32 %val, ptr %ptr seq_cst, align 4 287 ret void 288} 289 290define void @test28(ptr %ptr, i64 %val) { 291; PPC64LE-LABEL: test28: 292; PPC64LE: # %bb.0: 293; PPC64LE-NEXT: std 4, 0(3) 294; PPC64LE-NEXT: blr 295 store atomic i64 %val, ptr %ptr unordered, align 8 296 ret void 297} 298 299define void @test29(ptr %ptr, i64 %val) { 300; PPC64LE-LABEL: test29: 301; PPC64LE: # %bb.0: 302; PPC64LE-NEXT: std 4, 0(3) 303; PPC64LE-NEXT: blr 304 store atomic i64 %val, ptr %ptr monotonic, align 8 305 ret void 306} 307 308define void @test30(ptr %ptr, i64 %val) { 309; PPC64LE-LABEL: test30: 310; PPC64LE: # %bb.0: 311; PPC64LE-NEXT: lwsync 312; PPC64LE-NEXT: std 4, 0(3) 313; PPC64LE-NEXT: blr 314 store atomic i64 %val, ptr %ptr release, align 8 315 ret void 316} 317 318define void @test31(ptr %ptr, i64 %val) { 319; PPC64LE-LABEL: test31: 320; PPC64LE: # %bb.0: 321; PPC64LE-NEXT: sync 322; PPC64LE-NEXT: std 4, 0(3) 323; PPC64LE-NEXT: blr 324 store atomic i64 %val, ptr %ptr seq_cst, align 8 325 ret void 326} 327 328define void @test32() { 329; PPC64LE-LABEL: test32: 330; PPC64LE: # %bb.0: 331; PPC64LE-NEXT: lwsync 332; PPC64LE-NEXT: blr 333 fence acquire 334 ret void 335} 336 337define void @test33() { 338; PPC64LE-LABEL: test33: 339; PPC64LE: # %bb.0: 340; PPC64LE-NEXT: lwsync 341; PPC64LE-NEXT: blr 342 fence release 343 ret void 344} 345 346define void @test34() { 347; PPC64LE-LABEL: test34: 348; PPC64LE: # %bb.0: 349; PPC64LE-NEXT: lwsync 350; PPC64LE-NEXT: blr 351 fence acq_rel 352 ret void 353} 354 355define void @test35() { 356; PPC64LE-LABEL: test35: 357; PPC64LE: # %bb.0: 358; PPC64LE-NEXT: sync 359; PPC64LE-NEXT: blr 360 fence seq_cst 361 ret void 362} 363 364define void @test36() { 365; PPC64LE-LABEL: test36: 366; PPC64LE: # %bb.0: 367; PPC64LE-NEXT: lwsync 368; PPC64LE-NEXT: blr 369 fence syncscope("singlethread") acquire 370 ret void 371} 372 373define void @test37() { 374; PPC64LE-LABEL: test37: 375; PPC64LE: # %bb.0: 376; PPC64LE-NEXT: lwsync 377; PPC64LE-NEXT: blr 378 fence syncscope("singlethread") release 379 ret void 380} 381 382define void @test38() { 383; PPC64LE-LABEL: test38: 384; PPC64LE: # %bb.0: 385; PPC64LE-NEXT: lwsync 386; PPC64LE-NEXT: blr 387 fence syncscope("singlethread") acq_rel 388 ret void 389} 390 391define void @test39() { 392; PPC64LE-LABEL: test39: 393; PPC64LE: # %bb.0: 394; PPC64LE-NEXT: sync 395; PPC64LE-NEXT: blr 396 fence syncscope("singlethread") seq_cst 397 ret void 398} 399 400define void @test40(ptr %ptr, i8 %cmp, i8 %val) { 401; PPC64LE-LABEL: test40: 402; PPC64LE: # %bb.0: 403; PPC64LE-NEXT: clrlwi 4, 4, 24 404; PPC64LE-NEXT: .LBB40_1: 405; PPC64LE-NEXT: lbarx 6, 0, 3 406; PPC64LE-NEXT: cmpw 6, 4 407; PPC64LE-NEXT: bnelr 0 408; PPC64LE-NEXT: # %bb.2: 409; PPC64LE-NEXT: stbcx. 5, 0, 3 410; PPC64LE-NEXT: bne 0, .LBB40_1 411; PPC64LE-NEXT: # %bb.3: 412; PPC64LE-NEXT: blr 413 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val monotonic monotonic 414 ret void 415} 416 417define void @test41(ptr %ptr, i8 %cmp, i8 %val) { 418; PPC64LE-LABEL: test41: 419; PPC64LE: # %bb.0: 420; PPC64LE-NEXT: clrlwi 4, 4, 24 421; PPC64LE-NEXT: .LBB41_1: 422; PPC64LE-NEXT: lbarx 6, 0, 3 423; PPC64LE-NEXT: cmpw 6, 4 424; PPC64LE-NEXT: bne 0, .LBB41_3 425; PPC64LE-NEXT: # %bb.2: 426; PPC64LE-NEXT: stbcx. 5, 0, 3 427; PPC64LE-NEXT: bne 0, .LBB41_1 428; PPC64LE-NEXT: .LBB41_3: 429; PPC64LE-NEXT: lwsync 430; PPC64LE-NEXT: blr 431 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val acquire monotonic 432 ret void 433} 434 435define void @test42(ptr %ptr, i8 %cmp, i8 %val) { 436; PPC64LE-LABEL: test42: 437; PPC64LE: # %bb.0: 438; PPC64LE-NEXT: clrlwi 4, 4, 24 439; PPC64LE-NEXT: .LBB42_1: 440; PPC64LE-NEXT: lbarx 6, 0, 3 441; PPC64LE-NEXT: cmpw 6, 4 442; PPC64LE-NEXT: bne 0, .LBB42_3 443; PPC64LE-NEXT: # %bb.2: 444; PPC64LE-NEXT: stbcx. 5, 0, 3 445; PPC64LE-NEXT: bne 0, .LBB42_1 446; PPC64LE-NEXT: .LBB42_3: 447; PPC64LE-NEXT: lwsync 448; PPC64LE-NEXT: blr 449 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val acquire acquire 450 ret void 451} 452 453define void @test43(ptr %ptr, i8 %cmp, i8 %val) { 454; PPC64LE-LABEL: test43: 455; PPC64LE: # %bb.0: 456; PPC64LE-NEXT: lwsync 457; PPC64LE-NEXT: clrlwi 4, 4, 24 458; PPC64LE-NEXT: .LBB43_1: 459; PPC64LE-NEXT: lbarx 6, 0, 3 460; PPC64LE-NEXT: cmpw 6, 4 461; PPC64LE-NEXT: bnelr 0 462; PPC64LE-NEXT: # %bb.2: 463; PPC64LE-NEXT: stbcx. 5, 0, 3 464; PPC64LE-NEXT: bne 0, .LBB43_1 465; PPC64LE-NEXT: # %bb.3: 466; PPC64LE-NEXT: blr 467 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val release monotonic 468 ret void 469} 470 471define void @test44(ptr %ptr, i8 %cmp, i8 %val) { 472; PPC64LE-LABEL: test44: 473; PPC64LE: # %bb.0: 474; PPC64LE-NEXT: lwsync 475; PPC64LE-NEXT: clrlwi 4, 4, 24 476; PPC64LE-NEXT: .LBB44_1: 477; PPC64LE-NEXT: lbarx 6, 0, 3 478; PPC64LE-NEXT: cmpw 6, 4 479; PPC64LE-NEXT: bne 0, .LBB44_3 480; PPC64LE-NEXT: # %bb.2: 481; PPC64LE-NEXT: stbcx. 5, 0, 3 482; PPC64LE-NEXT: bne 0, .LBB44_1 483; PPC64LE-NEXT: .LBB44_3: 484; PPC64LE-NEXT: lwsync 485; PPC64LE-NEXT: blr 486 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val release acquire 487 ret void 488} 489 490define void @test45(ptr %ptr, i8 %cmp, i8 %val) { 491; PPC64LE-LABEL: test45: 492; PPC64LE: # %bb.0: 493; PPC64LE-NEXT: lwsync 494; PPC64LE-NEXT: clrlwi 4, 4, 24 495; PPC64LE-NEXT: .LBB45_1: 496; PPC64LE-NEXT: lbarx 6, 0, 3 497; PPC64LE-NEXT: cmpw 6, 4 498; PPC64LE-NEXT: bne 0, .LBB45_3 499; PPC64LE-NEXT: # %bb.2: 500; PPC64LE-NEXT: stbcx. 5, 0, 3 501; PPC64LE-NEXT: bne 0, .LBB45_1 502; PPC64LE-NEXT: .LBB45_3: 503; PPC64LE-NEXT: lwsync 504; PPC64LE-NEXT: blr 505 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val acq_rel monotonic 506 ret void 507} 508 509define void @test46(ptr %ptr, i8 %cmp, i8 %val) { 510; PPC64LE-LABEL: test46: 511; PPC64LE: # %bb.0: 512; PPC64LE-NEXT: lwsync 513; PPC64LE-NEXT: clrlwi 4, 4, 24 514; PPC64LE-NEXT: .LBB46_1: 515; PPC64LE-NEXT: lbarx 6, 0, 3 516; PPC64LE-NEXT: cmpw 6, 4 517; PPC64LE-NEXT: bne 0, .LBB46_3 518; PPC64LE-NEXT: # %bb.2: 519; PPC64LE-NEXT: stbcx. 5, 0, 3 520; PPC64LE-NEXT: bne 0, .LBB46_1 521; PPC64LE-NEXT: .LBB46_3: 522; PPC64LE-NEXT: lwsync 523; PPC64LE-NEXT: blr 524 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val acq_rel acquire 525 ret void 526} 527 528define void @test47(ptr %ptr, i8 %cmp, i8 %val) { 529; PPC64LE-LABEL: test47: 530; PPC64LE: # %bb.0: 531; PPC64LE-NEXT: sync 532; PPC64LE-NEXT: clrlwi 4, 4, 24 533; PPC64LE-NEXT: .LBB47_1: 534; PPC64LE-NEXT: lbarx 6, 0, 3 535; PPC64LE-NEXT: cmpw 6, 4 536; PPC64LE-NEXT: bne 0, .LBB47_3 537; PPC64LE-NEXT: # %bb.2: 538; PPC64LE-NEXT: stbcx. 5, 0, 3 539; PPC64LE-NEXT: bne 0, .LBB47_1 540; PPC64LE-NEXT: .LBB47_3: 541; PPC64LE-NEXT: lwsync 542; PPC64LE-NEXT: blr 543 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val seq_cst monotonic 544 ret void 545} 546 547define void @test48(ptr %ptr, i8 %cmp, i8 %val) { 548; PPC64LE-LABEL: test48: 549; PPC64LE: # %bb.0: 550; PPC64LE-NEXT: sync 551; PPC64LE-NEXT: clrlwi 4, 4, 24 552; PPC64LE-NEXT: .LBB48_1: 553; PPC64LE-NEXT: lbarx 6, 0, 3 554; PPC64LE-NEXT: cmpw 6, 4 555; PPC64LE-NEXT: bne 0, .LBB48_3 556; PPC64LE-NEXT: # %bb.2: 557; PPC64LE-NEXT: stbcx. 5, 0, 3 558; PPC64LE-NEXT: bne 0, .LBB48_1 559; PPC64LE-NEXT: .LBB48_3: 560; PPC64LE-NEXT: lwsync 561; PPC64LE-NEXT: blr 562 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val seq_cst acquire 563 ret void 564} 565 566define void @test49(ptr %ptr, i8 %cmp, i8 %val) { 567; PPC64LE-LABEL: test49: 568; PPC64LE: # %bb.0: 569; PPC64LE-NEXT: sync 570; PPC64LE-NEXT: clrlwi 4, 4, 24 571; PPC64LE-NEXT: .LBB49_1: 572; PPC64LE-NEXT: lbarx 6, 0, 3 573; PPC64LE-NEXT: cmpw 6, 4 574; PPC64LE-NEXT: bne 0, .LBB49_3 575; PPC64LE-NEXT: # %bb.2: 576; PPC64LE-NEXT: stbcx. 5, 0, 3 577; PPC64LE-NEXT: bne 0, .LBB49_1 578; PPC64LE-NEXT: .LBB49_3: 579; PPC64LE-NEXT: lwsync 580; PPC64LE-NEXT: blr 581 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val seq_cst seq_cst 582 ret void 583} 584 585define void @test50(ptr %ptr, i16 %cmp, i16 %val) { 586; PPC64LE-LABEL: test50: 587; PPC64LE: # %bb.0: 588; PPC64LE-NEXT: clrlwi 4, 4, 16 589; PPC64LE-NEXT: .LBB50_1: 590; PPC64LE-NEXT: lharx 6, 0, 3 591; PPC64LE-NEXT: cmpw 6, 4 592; PPC64LE-NEXT: bnelr 0 593; PPC64LE-NEXT: # %bb.2: 594; PPC64LE-NEXT: sthcx. 5, 0, 3 595; PPC64LE-NEXT: bne 0, .LBB50_1 596; PPC64LE-NEXT: # %bb.3: 597; PPC64LE-NEXT: blr 598 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val monotonic monotonic 599 ret void 600} 601 602define void @test51(ptr %ptr, i16 %cmp, i16 %val) { 603; PPC64LE-LABEL: test51: 604; PPC64LE: # %bb.0: 605; PPC64LE-NEXT: clrlwi 4, 4, 16 606; PPC64LE-NEXT: .LBB51_1: 607; PPC64LE-NEXT: lharx 6, 0, 3 608; PPC64LE-NEXT: cmpw 6, 4 609; PPC64LE-NEXT: bne 0, .LBB51_3 610; PPC64LE-NEXT: # %bb.2: 611; PPC64LE-NEXT: sthcx. 5, 0, 3 612; PPC64LE-NEXT: bne 0, .LBB51_1 613; PPC64LE-NEXT: .LBB51_3: 614; PPC64LE-NEXT: lwsync 615; PPC64LE-NEXT: blr 616 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val acquire monotonic 617 ret void 618} 619 620define void @test52(ptr %ptr, i16 %cmp, i16 %val) { 621; PPC64LE-LABEL: test52: 622; PPC64LE: # %bb.0: 623; PPC64LE-NEXT: clrlwi 4, 4, 16 624; PPC64LE-NEXT: .LBB52_1: 625; PPC64LE-NEXT: lharx 6, 0, 3 626; PPC64LE-NEXT: cmpw 6, 4 627; PPC64LE-NEXT: bne 0, .LBB52_3 628; PPC64LE-NEXT: # %bb.2: 629; PPC64LE-NEXT: sthcx. 5, 0, 3 630; PPC64LE-NEXT: bne 0, .LBB52_1 631; PPC64LE-NEXT: .LBB52_3: 632; PPC64LE-NEXT: lwsync 633; PPC64LE-NEXT: blr 634 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val acquire acquire 635 ret void 636} 637 638define void @test53(ptr %ptr, i16 %cmp, i16 %val) { 639; PPC64LE-LABEL: test53: 640; PPC64LE: # %bb.0: 641; PPC64LE-NEXT: lwsync 642; PPC64LE-NEXT: clrlwi 4, 4, 16 643; PPC64LE-NEXT: .LBB53_1: 644; PPC64LE-NEXT: lharx 6, 0, 3 645; PPC64LE-NEXT: cmpw 6, 4 646; PPC64LE-NEXT: bnelr 0 647; PPC64LE-NEXT: # %bb.2: 648; PPC64LE-NEXT: sthcx. 5, 0, 3 649; PPC64LE-NEXT: bne 0, .LBB53_1 650; PPC64LE-NEXT: # %bb.3: 651; PPC64LE-NEXT: blr 652 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val release monotonic 653 ret void 654} 655 656define void @test54(ptr %ptr, i16 %cmp, i16 %val) { 657; PPC64LE-LABEL: test54: 658; PPC64LE: # %bb.0: 659; PPC64LE-NEXT: lwsync 660; PPC64LE-NEXT: clrlwi 4, 4, 16 661; PPC64LE-NEXT: .LBB54_1: 662; PPC64LE-NEXT: lharx 6, 0, 3 663; PPC64LE-NEXT: cmpw 6, 4 664; PPC64LE-NEXT: bne 0, .LBB54_3 665; PPC64LE-NEXT: # %bb.2: 666; PPC64LE-NEXT: sthcx. 5, 0, 3 667; PPC64LE-NEXT: bne 0, .LBB54_1 668; PPC64LE-NEXT: .LBB54_3: 669; PPC64LE-NEXT: lwsync 670; PPC64LE-NEXT: blr 671 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val release acquire 672 ret void 673} 674 675define void @test55(ptr %ptr, i16 %cmp, i16 %val) { 676; PPC64LE-LABEL: test55: 677; PPC64LE: # %bb.0: 678; PPC64LE-NEXT: lwsync 679; PPC64LE-NEXT: clrlwi 4, 4, 16 680; PPC64LE-NEXT: .LBB55_1: 681; PPC64LE-NEXT: lharx 6, 0, 3 682; PPC64LE-NEXT: cmpw 6, 4 683; PPC64LE-NEXT: bne 0, .LBB55_3 684; PPC64LE-NEXT: # %bb.2: 685; PPC64LE-NEXT: sthcx. 5, 0, 3 686; PPC64LE-NEXT: bne 0, .LBB55_1 687; PPC64LE-NEXT: .LBB55_3: 688; PPC64LE-NEXT: lwsync 689; PPC64LE-NEXT: blr 690 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val acq_rel monotonic 691 ret void 692} 693 694define void @test56(ptr %ptr, i16 %cmp, i16 %val) { 695; PPC64LE-LABEL: test56: 696; PPC64LE: # %bb.0: 697; PPC64LE-NEXT: lwsync 698; PPC64LE-NEXT: clrlwi 4, 4, 16 699; PPC64LE-NEXT: .LBB56_1: 700; PPC64LE-NEXT: lharx 6, 0, 3 701; PPC64LE-NEXT: cmpw 6, 4 702; PPC64LE-NEXT: bne 0, .LBB56_3 703; PPC64LE-NEXT: # %bb.2: 704; PPC64LE-NEXT: sthcx. 5, 0, 3 705; PPC64LE-NEXT: bne 0, .LBB56_1 706; PPC64LE-NEXT: .LBB56_3: 707; PPC64LE-NEXT: lwsync 708; PPC64LE-NEXT: blr 709 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val acq_rel acquire 710 ret void 711} 712 713define void @test57(ptr %ptr, i16 %cmp, i16 %val) { 714; PPC64LE-LABEL: test57: 715; PPC64LE: # %bb.0: 716; PPC64LE-NEXT: sync 717; PPC64LE-NEXT: clrlwi 4, 4, 16 718; PPC64LE-NEXT: .LBB57_1: 719; PPC64LE-NEXT: lharx 6, 0, 3 720; PPC64LE-NEXT: cmpw 6, 4 721; PPC64LE-NEXT: bne 0, .LBB57_3 722; PPC64LE-NEXT: # %bb.2: 723; PPC64LE-NEXT: sthcx. 5, 0, 3 724; PPC64LE-NEXT: bne 0, .LBB57_1 725; PPC64LE-NEXT: .LBB57_3: 726; PPC64LE-NEXT: lwsync 727; PPC64LE-NEXT: blr 728 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val seq_cst monotonic 729 ret void 730} 731 732define void @test58(ptr %ptr, i16 %cmp, i16 %val) { 733; PPC64LE-LABEL: test58: 734; PPC64LE: # %bb.0: 735; PPC64LE-NEXT: sync 736; PPC64LE-NEXT: clrlwi 4, 4, 16 737; PPC64LE-NEXT: .LBB58_1: 738; PPC64LE-NEXT: lharx 6, 0, 3 739; PPC64LE-NEXT: cmpw 6, 4 740; PPC64LE-NEXT: bne 0, .LBB58_3 741; PPC64LE-NEXT: # %bb.2: 742; PPC64LE-NEXT: sthcx. 5, 0, 3 743; PPC64LE-NEXT: bne 0, .LBB58_1 744; PPC64LE-NEXT: .LBB58_3: 745; PPC64LE-NEXT: lwsync 746; PPC64LE-NEXT: blr 747 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val seq_cst acquire 748 ret void 749} 750 751define void @test59(ptr %ptr, i16 %cmp, i16 %val) { 752; PPC64LE-LABEL: test59: 753; PPC64LE: # %bb.0: 754; PPC64LE-NEXT: sync 755; PPC64LE-NEXT: clrlwi 4, 4, 16 756; PPC64LE-NEXT: .LBB59_1: 757; PPC64LE-NEXT: lharx 6, 0, 3 758; PPC64LE-NEXT: cmpw 6, 4 759; PPC64LE-NEXT: bne 0, .LBB59_3 760; PPC64LE-NEXT: # %bb.2: 761; PPC64LE-NEXT: sthcx. 5, 0, 3 762; PPC64LE-NEXT: bne 0, .LBB59_1 763; PPC64LE-NEXT: .LBB59_3: 764; PPC64LE-NEXT: lwsync 765; PPC64LE-NEXT: blr 766 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val seq_cst seq_cst 767 ret void 768} 769 770define void @test60(ptr %ptr, i32 %cmp, i32 %val) { 771; PPC64LE-LABEL: test60: 772; PPC64LE: # %bb.0: 773; PPC64LE-NEXT: .LBB60_1: 774; PPC64LE-NEXT: lwarx 6, 0, 3 775; PPC64LE-NEXT: cmpw 6, 4 776; PPC64LE-NEXT: bnelr 0 777; PPC64LE-NEXT: # %bb.2: 778; PPC64LE-NEXT: stwcx. 5, 0, 3 779; PPC64LE-NEXT: bne 0, .LBB60_1 780; PPC64LE-NEXT: # %bb.3: 781; PPC64LE-NEXT: blr 782 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val monotonic monotonic 783 ret void 784} 785 786define void @test61(ptr %ptr, i32 %cmp, i32 %val) { 787; PPC64LE-LABEL: test61: 788; PPC64LE: # %bb.0: 789; PPC64LE-NEXT: .LBB61_1: 790; PPC64LE-NEXT: lwarx 6, 0, 3 791; PPC64LE-NEXT: cmpw 6, 4 792; PPC64LE-NEXT: bne 0, .LBB61_3 793; PPC64LE-NEXT: # %bb.2: 794; PPC64LE-NEXT: stwcx. 5, 0, 3 795; PPC64LE-NEXT: bne 0, .LBB61_1 796; PPC64LE-NEXT: .LBB61_3: 797; PPC64LE-NEXT: lwsync 798; PPC64LE-NEXT: blr 799 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val acquire monotonic 800 ret void 801} 802 803define void @test62(ptr %ptr, i32 %cmp, i32 %val) { 804; PPC64LE-LABEL: test62: 805; PPC64LE: # %bb.0: 806; PPC64LE-NEXT: .LBB62_1: 807; PPC64LE-NEXT: lwarx 6, 0, 3 808; PPC64LE-NEXT: cmpw 6, 4 809; PPC64LE-NEXT: bne 0, .LBB62_3 810; PPC64LE-NEXT: # %bb.2: 811; PPC64LE-NEXT: stwcx. 5, 0, 3 812; PPC64LE-NEXT: bne 0, .LBB62_1 813; PPC64LE-NEXT: .LBB62_3: 814; PPC64LE-NEXT: lwsync 815; PPC64LE-NEXT: blr 816 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val acquire acquire 817 ret void 818} 819 820define void @test63(ptr %ptr, i32 %cmp, i32 %val) { 821; PPC64LE-LABEL: test63: 822; PPC64LE: # %bb.0: 823; PPC64LE-NEXT: lwsync 824; PPC64LE-NEXT: .LBB63_1: 825; PPC64LE-NEXT: lwarx 6, 0, 3 826; PPC64LE-NEXT: cmpw 6, 4 827; PPC64LE-NEXT: bnelr 0 828; PPC64LE-NEXT: # %bb.2: 829; PPC64LE-NEXT: stwcx. 5, 0, 3 830; PPC64LE-NEXT: bne 0, .LBB63_1 831; PPC64LE-NEXT: # %bb.3: 832; PPC64LE-NEXT: blr 833 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val release monotonic 834 ret void 835} 836 837define void @test64(ptr %ptr, i32 %cmp, i32 %val) { 838; PPC64LE-LABEL: test64: 839; PPC64LE: # %bb.0: 840; PPC64LE-NEXT: lwsync 841; PPC64LE-NEXT: .LBB64_1: 842; PPC64LE-NEXT: lwarx 6, 0, 3 843; PPC64LE-NEXT: cmpw 6, 4 844; PPC64LE-NEXT: bne 0, .LBB64_3 845; PPC64LE-NEXT: # %bb.2: 846; PPC64LE-NEXT: stwcx. 5, 0, 3 847; PPC64LE-NEXT: bne 0, .LBB64_1 848; PPC64LE-NEXT: .LBB64_3: 849; PPC64LE-NEXT: lwsync 850; PPC64LE-NEXT: blr 851 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val release acquire 852 ret void 853} 854 855define void @test65(ptr %ptr, i32 %cmp, i32 %val) { 856; PPC64LE-LABEL: test65: 857; PPC64LE: # %bb.0: 858; PPC64LE-NEXT: lwsync 859; PPC64LE-NEXT: .LBB65_1: 860; PPC64LE-NEXT: lwarx 6, 0, 3 861; PPC64LE-NEXT: cmpw 6, 4 862; PPC64LE-NEXT: bne 0, .LBB65_3 863; PPC64LE-NEXT: # %bb.2: 864; PPC64LE-NEXT: stwcx. 5, 0, 3 865; PPC64LE-NEXT: bne 0, .LBB65_1 866; PPC64LE-NEXT: .LBB65_3: 867; PPC64LE-NEXT: lwsync 868; PPC64LE-NEXT: blr 869 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val acq_rel monotonic 870 ret void 871} 872 873define void @test66(ptr %ptr, i32 %cmp, i32 %val) { 874; PPC64LE-LABEL: test66: 875; PPC64LE: # %bb.0: 876; PPC64LE-NEXT: lwsync 877; PPC64LE-NEXT: .LBB66_1: 878; PPC64LE-NEXT: lwarx 6, 0, 3 879; PPC64LE-NEXT: cmpw 6, 4 880; PPC64LE-NEXT: bne 0, .LBB66_3 881; PPC64LE-NEXT: # %bb.2: 882; PPC64LE-NEXT: stwcx. 5, 0, 3 883; PPC64LE-NEXT: bne 0, .LBB66_1 884; PPC64LE-NEXT: .LBB66_3: 885; PPC64LE-NEXT: lwsync 886; PPC64LE-NEXT: blr 887 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val acq_rel acquire 888 ret void 889} 890 891define void @test67(ptr %ptr, i32 %cmp, i32 %val) { 892; PPC64LE-LABEL: test67: 893; PPC64LE: # %bb.0: 894; PPC64LE-NEXT: sync 895; PPC64LE-NEXT: .LBB67_1: 896; PPC64LE-NEXT: lwarx 6, 0, 3 897; PPC64LE-NEXT: cmpw 6, 4 898; PPC64LE-NEXT: bne 0, .LBB67_3 899; PPC64LE-NEXT: # %bb.2: 900; PPC64LE-NEXT: stwcx. 5, 0, 3 901; PPC64LE-NEXT: bne 0, .LBB67_1 902; PPC64LE-NEXT: .LBB67_3: 903; PPC64LE-NEXT: lwsync 904; PPC64LE-NEXT: blr 905 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val seq_cst monotonic 906 ret void 907} 908 909define void @test68(ptr %ptr, i32 %cmp, i32 %val) { 910; PPC64LE-LABEL: test68: 911; PPC64LE: # %bb.0: 912; PPC64LE-NEXT: sync 913; PPC64LE-NEXT: .LBB68_1: 914; PPC64LE-NEXT: lwarx 6, 0, 3 915; PPC64LE-NEXT: cmpw 6, 4 916; PPC64LE-NEXT: bne 0, .LBB68_3 917; PPC64LE-NEXT: # %bb.2: 918; PPC64LE-NEXT: stwcx. 5, 0, 3 919; PPC64LE-NEXT: bne 0, .LBB68_1 920; PPC64LE-NEXT: .LBB68_3: 921; PPC64LE-NEXT: lwsync 922; PPC64LE-NEXT: blr 923 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val seq_cst acquire 924 ret void 925} 926 927define void @test69(ptr %ptr, i32 %cmp, i32 %val) { 928; PPC64LE-LABEL: test69: 929; PPC64LE: # %bb.0: 930; PPC64LE-NEXT: sync 931; PPC64LE-NEXT: .LBB69_1: 932; PPC64LE-NEXT: lwarx 6, 0, 3 933; PPC64LE-NEXT: cmpw 6, 4 934; PPC64LE-NEXT: bne 0, .LBB69_3 935; PPC64LE-NEXT: # %bb.2: 936; PPC64LE-NEXT: stwcx. 5, 0, 3 937; PPC64LE-NEXT: bne 0, .LBB69_1 938; PPC64LE-NEXT: .LBB69_3: 939; PPC64LE-NEXT: lwsync 940; PPC64LE-NEXT: blr 941 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val seq_cst seq_cst 942 ret void 943} 944 945define void @test70(ptr %ptr, i64 %cmp, i64 %val) { 946; PPC64LE-LABEL: test70: 947; PPC64LE: # %bb.0: 948; PPC64LE-NEXT: .LBB70_1: 949; PPC64LE-NEXT: ldarx 6, 0, 3 950; PPC64LE-NEXT: cmpd 6, 4 951; PPC64LE-NEXT: bnelr 0 952; PPC64LE-NEXT: # %bb.2: 953; PPC64LE-NEXT: stdcx. 5, 0, 3 954; PPC64LE-NEXT: bne 0, .LBB70_1 955; PPC64LE-NEXT: # %bb.3: 956; PPC64LE-NEXT: blr 957 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val monotonic monotonic 958 ret void 959} 960 961define void @test71(ptr %ptr, i64 %cmp, i64 %val) { 962; PPC64LE-LABEL: test71: 963; PPC64LE: # %bb.0: 964; PPC64LE-NEXT: .LBB71_1: 965; PPC64LE-NEXT: ldarx 6, 0, 3 966; PPC64LE-NEXT: cmpd 6, 4 967; PPC64LE-NEXT: bne 0, .LBB71_3 968; PPC64LE-NEXT: # %bb.2: 969; PPC64LE-NEXT: stdcx. 5, 0, 3 970; PPC64LE-NEXT: bne 0, .LBB71_1 971; PPC64LE-NEXT: .LBB71_3: 972; PPC64LE-NEXT: lwsync 973; PPC64LE-NEXT: blr 974 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val acquire monotonic 975 ret void 976} 977 978define void @test72(ptr %ptr, i64 %cmp, i64 %val) { 979; PPC64LE-LABEL: test72: 980; PPC64LE: # %bb.0: 981; PPC64LE-NEXT: .LBB72_1: 982; PPC64LE-NEXT: ldarx 6, 0, 3 983; PPC64LE-NEXT: cmpd 6, 4 984; PPC64LE-NEXT: bne 0, .LBB72_3 985; PPC64LE-NEXT: # %bb.2: 986; PPC64LE-NEXT: stdcx. 5, 0, 3 987; PPC64LE-NEXT: bne 0, .LBB72_1 988; PPC64LE-NEXT: .LBB72_3: 989; PPC64LE-NEXT: lwsync 990; PPC64LE-NEXT: blr 991 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val acquire acquire 992 ret void 993} 994 995define void @test73(ptr %ptr, i64 %cmp, i64 %val) { 996; PPC64LE-LABEL: test73: 997; PPC64LE: # %bb.0: 998; PPC64LE-NEXT: lwsync 999; PPC64LE-NEXT: .LBB73_1: 1000; PPC64LE-NEXT: ldarx 6, 0, 3 1001; PPC64LE-NEXT: cmpd 6, 4 1002; PPC64LE-NEXT: bnelr 0 1003; PPC64LE-NEXT: # %bb.2: 1004; PPC64LE-NEXT: stdcx. 5, 0, 3 1005; PPC64LE-NEXT: bne 0, .LBB73_1 1006; PPC64LE-NEXT: # %bb.3: 1007; PPC64LE-NEXT: blr 1008 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val release monotonic 1009 ret void 1010} 1011 1012define void @test74(ptr %ptr, i64 %cmp, i64 %val) { 1013; PPC64LE-LABEL: test74: 1014; PPC64LE: # %bb.0: 1015; PPC64LE-NEXT: lwsync 1016; PPC64LE-NEXT: .LBB74_1: 1017; PPC64LE-NEXT: ldarx 6, 0, 3 1018; PPC64LE-NEXT: cmpd 6, 4 1019; PPC64LE-NEXT: bne 0, .LBB74_3 1020; PPC64LE-NEXT: # %bb.2: 1021; PPC64LE-NEXT: stdcx. 5, 0, 3 1022; PPC64LE-NEXT: bne 0, .LBB74_1 1023; PPC64LE-NEXT: .LBB74_3: 1024; PPC64LE-NEXT: lwsync 1025; PPC64LE-NEXT: blr 1026 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val release acquire 1027 ret void 1028} 1029 1030define void @test75(ptr %ptr, i64 %cmp, i64 %val) { 1031; PPC64LE-LABEL: test75: 1032; PPC64LE: # %bb.0: 1033; PPC64LE-NEXT: lwsync 1034; PPC64LE-NEXT: .LBB75_1: 1035; PPC64LE-NEXT: ldarx 6, 0, 3 1036; PPC64LE-NEXT: cmpd 6, 4 1037; PPC64LE-NEXT: bne 0, .LBB75_3 1038; PPC64LE-NEXT: # %bb.2: 1039; PPC64LE-NEXT: stdcx. 5, 0, 3 1040; PPC64LE-NEXT: bne 0, .LBB75_1 1041; PPC64LE-NEXT: .LBB75_3: 1042; PPC64LE-NEXT: lwsync 1043; PPC64LE-NEXT: blr 1044 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val acq_rel monotonic 1045 ret void 1046} 1047 1048define void @test76(ptr %ptr, i64 %cmp, i64 %val) { 1049; PPC64LE-LABEL: test76: 1050; PPC64LE: # %bb.0: 1051; PPC64LE-NEXT: lwsync 1052; PPC64LE-NEXT: .LBB76_1: 1053; PPC64LE-NEXT: ldarx 6, 0, 3 1054; PPC64LE-NEXT: cmpd 6, 4 1055; PPC64LE-NEXT: bne 0, .LBB76_3 1056; PPC64LE-NEXT: # %bb.2: 1057; PPC64LE-NEXT: stdcx. 5, 0, 3 1058; PPC64LE-NEXT: bne 0, .LBB76_1 1059; PPC64LE-NEXT: .LBB76_3: 1060; PPC64LE-NEXT: lwsync 1061; PPC64LE-NEXT: blr 1062 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val acq_rel acquire 1063 ret void 1064} 1065 1066define void @test77(ptr %ptr, i64 %cmp, i64 %val) { 1067; PPC64LE-LABEL: test77: 1068; PPC64LE: # %bb.0: 1069; PPC64LE-NEXT: sync 1070; PPC64LE-NEXT: .LBB77_1: 1071; PPC64LE-NEXT: ldarx 6, 0, 3 1072; PPC64LE-NEXT: cmpd 6, 4 1073; PPC64LE-NEXT: bne 0, .LBB77_3 1074; PPC64LE-NEXT: # %bb.2: 1075; PPC64LE-NEXT: stdcx. 5, 0, 3 1076; PPC64LE-NEXT: bne 0, .LBB77_1 1077; PPC64LE-NEXT: .LBB77_3: 1078; PPC64LE-NEXT: lwsync 1079; PPC64LE-NEXT: blr 1080 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val seq_cst monotonic 1081 ret void 1082} 1083 1084define void @test78(ptr %ptr, i64 %cmp, i64 %val) { 1085; PPC64LE-LABEL: test78: 1086; PPC64LE: # %bb.0: 1087; PPC64LE-NEXT: sync 1088; PPC64LE-NEXT: .LBB78_1: 1089; PPC64LE-NEXT: ldarx 6, 0, 3 1090; PPC64LE-NEXT: cmpd 6, 4 1091; PPC64LE-NEXT: bne 0, .LBB78_3 1092; PPC64LE-NEXT: # %bb.2: 1093; PPC64LE-NEXT: stdcx. 5, 0, 3 1094; PPC64LE-NEXT: bne 0, .LBB78_1 1095; PPC64LE-NEXT: .LBB78_3: 1096; PPC64LE-NEXT: lwsync 1097; PPC64LE-NEXT: blr 1098 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val seq_cst acquire 1099 ret void 1100} 1101 1102define void @test79(ptr %ptr, i64 %cmp, i64 %val) { 1103; PPC64LE-LABEL: test79: 1104; PPC64LE: # %bb.0: 1105; PPC64LE-NEXT: sync 1106; PPC64LE-NEXT: .LBB79_1: 1107; PPC64LE-NEXT: ldarx 6, 0, 3 1108; PPC64LE-NEXT: cmpd 6, 4 1109; PPC64LE-NEXT: bne 0, .LBB79_3 1110; PPC64LE-NEXT: # %bb.2: 1111; PPC64LE-NEXT: stdcx. 5, 0, 3 1112; PPC64LE-NEXT: bne 0, .LBB79_1 1113; PPC64LE-NEXT: .LBB79_3: 1114; PPC64LE-NEXT: lwsync 1115; PPC64LE-NEXT: blr 1116 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val seq_cst seq_cst 1117 ret void 1118} 1119 1120define void @test80(ptr %ptr, i8 %cmp, i8 %val) { 1121; PPC64LE-LABEL: test80: 1122; PPC64LE: # %bb.0: 1123; PPC64LE-NEXT: clrlwi 4, 4, 24 1124; PPC64LE-NEXT: .LBB80_1: 1125; PPC64LE-NEXT: lbarx 6, 0, 3 1126; PPC64LE-NEXT: cmpw 6, 4 1127; PPC64LE-NEXT: bnelr 0 1128; PPC64LE-NEXT: # %bb.2: 1129; PPC64LE-NEXT: stbcx. 5, 0, 3 1130; PPC64LE-NEXT: bne 0, .LBB80_1 1131; PPC64LE-NEXT: # %bb.3: 1132; PPC64LE-NEXT: blr 1133 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val syncscope("singlethread") monotonic monotonic 1134 ret void 1135} 1136 1137define void @test81(ptr %ptr, i8 %cmp, i8 %val) { 1138; PPC64LE-LABEL: test81: 1139; PPC64LE: # %bb.0: 1140; PPC64LE-NEXT: clrlwi 4, 4, 24 1141; PPC64LE-NEXT: .LBB81_1: 1142; PPC64LE-NEXT: lbarx 6, 0, 3 1143; PPC64LE-NEXT: cmpw 6, 4 1144; PPC64LE-NEXT: bne 0, .LBB81_3 1145; PPC64LE-NEXT: # %bb.2: 1146; PPC64LE-NEXT: stbcx. 5, 0, 3 1147; PPC64LE-NEXT: bne 0, .LBB81_1 1148; PPC64LE-NEXT: .LBB81_3: 1149; PPC64LE-NEXT: lwsync 1150; PPC64LE-NEXT: blr 1151 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val syncscope("singlethread") acquire monotonic 1152 ret void 1153} 1154 1155define void @test82(ptr %ptr, i8 %cmp, i8 %val) { 1156; PPC64LE-LABEL: test82: 1157; PPC64LE: # %bb.0: 1158; PPC64LE-NEXT: clrlwi 4, 4, 24 1159; PPC64LE-NEXT: .LBB82_1: 1160; PPC64LE-NEXT: lbarx 6, 0, 3 1161; PPC64LE-NEXT: cmpw 6, 4 1162; PPC64LE-NEXT: bne 0, .LBB82_3 1163; PPC64LE-NEXT: # %bb.2: 1164; PPC64LE-NEXT: stbcx. 5, 0, 3 1165; PPC64LE-NEXT: bne 0, .LBB82_1 1166; PPC64LE-NEXT: .LBB82_3: 1167; PPC64LE-NEXT: lwsync 1168; PPC64LE-NEXT: blr 1169 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val syncscope("singlethread") acquire acquire 1170 ret void 1171} 1172 1173define void @test83(ptr %ptr, i8 %cmp, i8 %val) { 1174; PPC64LE-LABEL: test83: 1175; PPC64LE: # %bb.0: 1176; PPC64LE-NEXT: lwsync 1177; PPC64LE-NEXT: clrlwi 4, 4, 24 1178; PPC64LE-NEXT: .LBB83_1: 1179; PPC64LE-NEXT: lbarx 6, 0, 3 1180; PPC64LE-NEXT: cmpw 6, 4 1181; PPC64LE-NEXT: bnelr 0 1182; PPC64LE-NEXT: # %bb.2: 1183; PPC64LE-NEXT: stbcx. 5, 0, 3 1184; PPC64LE-NEXT: bne 0, .LBB83_1 1185; PPC64LE-NEXT: # %bb.3: 1186; PPC64LE-NEXT: blr 1187 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val syncscope("singlethread") release monotonic 1188 ret void 1189} 1190 1191define void @test84(ptr %ptr, i8 %cmp, i8 %val) { 1192; PPC64LE-LABEL: test84: 1193; PPC64LE: # %bb.0: 1194; PPC64LE-NEXT: lwsync 1195; PPC64LE-NEXT: clrlwi 4, 4, 24 1196; PPC64LE-NEXT: .LBB84_1: 1197; PPC64LE-NEXT: lbarx 6, 0, 3 1198; PPC64LE-NEXT: cmpw 6, 4 1199; PPC64LE-NEXT: bne 0, .LBB84_3 1200; PPC64LE-NEXT: # %bb.2: 1201; PPC64LE-NEXT: stbcx. 5, 0, 3 1202; PPC64LE-NEXT: bne 0, .LBB84_1 1203; PPC64LE-NEXT: .LBB84_3: 1204; PPC64LE-NEXT: lwsync 1205; PPC64LE-NEXT: blr 1206 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val syncscope("singlethread") release acquire 1207 ret void 1208} 1209 1210define void @test85(ptr %ptr, i8 %cmp, i8 %val) { 1211; PPC64LE-LABEL: test85: 1212; PPC64LE: # %bb.0: 1213; PPC64LE-NEXT: lwsync 1214; PPC64LE-NEXT: clrlwi 4, 4, 24 1215; PPC64LE-NEXT: .LBB85_1: 1216; PPC64LE-NEXT: lbarx 6, 0, 3 1217; PPC64LE-NEXT: cmpw 6, 4 1218; PPC64LE-NEXT: bne 0, .LBB85_3 1219; PPC64LE-NEXT: # %bb.2: 1220; PPC64LE-NEXT: stbcx. 5, 0, 3 1221; PPC64LE-NEXT: bne 0, .LBB85_1 1222; PPC64LE-NEXT: .LBB85_3: 1223; PPC64LE-NEXT: lwsync 1224; PPC64LE-NEXT: blr 1225 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val syncscope("singlethread") acq_rel monotonic 1226 ret void 1227} 1228 1229define void @test86(ptr %ptr, i8 %cmp, i8 %val) { 1230; PPC64LE-LABEL: test86: 1231; PPC64LE: # %bb.0: 1232; PPC64LE-NEXT: lwsync 1233; PPC64LE-NEXT: clrlwi 4, 4, 24 1234; PPC64LE-NEXT: .LBB86_1: 1235; PPC64LE-NEXT: lbarx 6, 0, 3 1236; PPC64LE-NEXT: cmpw 6, 4 1237; PPC64LE-NEXT: bne 0, .LBB86_3 1238; PPC64LE-NEXT: # %bb.2: 1239; PPC64LE-NEXT: stbcx. 5, 0, 3 1240; PPC64LE-NEXT: bne 0, .LBB86_1 1241; PPC64LE-NEXT: .LBB86_3: 1242; PPC64LE-NEXT: lwsync 1243; PPC64LE-NEXT: blr 1244 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val syncscope("singlethread") acq_rel acquire 1245 ret void 1246} 1247 1248define void @test87(ptr %ptr, i8 %cmp, i8 %val) { 1249; PPC64LE-LABEL: test87: 1250; PPC64LE: # %bb.0: 1251; PPC64LE-NEXT: sync 1252; PPC64LE-NEXT: clrlwi 4, 4, 24 1253; PPC64LE-NEXT: .LBB87_1: 1254; PPC64LE-NEXT: lbarx 6, 0, 3 1255; PPC64LE-NEXT: cmpw 6, 4 1256; PPC64LE-NEXT: bne 0, .LBB87_3 1257; PPC64LE-NEXT: # %bb.2: 1258; PPC64LE-NEXT: stbcx. 5, 0, 3 1259; PPC64LE-NEXT: bne 0, .LBB87_1 1260; PPC64LE-NEXT: .LBB87_3: 1261; PPC64LE-NEXT: lwsync 1262; PPC64LE-NEXT: blr 1263 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val syncscope("singlethread") seq_cst monotonic 1264 ret void 1265} 1266 1267define void @test88(ptr %ptr, i8 %cmp, i8 %val) { 1268; PPC64LE-LABEL: test88: 1269; PPC64LE: # %bb.0: 1270; PPC64LE-NEXT: sync 1271; PPC64LE-NEXT: clrlwi 4, 4, 24 1272; PPC64LE-NEXT: .LBB88_1: 1273; PPC64LE-NEXT: lbarx 6, 0, 3 1274; PPC64LE-NEXT: cmpw 6, 4 1275; PPC64LE-NEXT: bne 0, .LBB88_3 1276; PPC64LE-NEXT: # %bb.2: 1277; PPC64LE-NEXT: stbcx. 5, 0, 3 1278; PPC64LE-NEXT: bne 0, .LBB88_1 1279; PPC64LE-NEXT: .LBB88_3: 1280; PPC64LE-NEXT: lwsync 1281; PPC64LE-NEXT: blr 1282 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val syncscope("singlethread") seq_cst acquire 1283 ret void 1284} 1285 1286define void @test89(ptr %ptr, i8 %cmp, i8 %val) { 1287; PPC64LE-LABEL: test89: 1288; PPC64LE: # %bb.0: 1289; PPC64LE-NEXT: sync 1290; PPC64LE-NEXT: clrlwi 4, 4, 24 1291; PPC64LE-NEXT: .LBB89_1: 1292; PPC64LE-NEXT: lbarx 6, 0, 3 1293; PPC64LE-NEXT: cmpw 6, 4 1294; PPC64LE-NEXT: bne 0, .LBB89_3 1295; PPC64LE-NEXT: # %bb.2: 1296; PPC64LE-NEXT: stbcx. 5, 0, 3 1297; PPC64LE-NEXT: bne 0, .LBB89_1 1298; PPC64LE-NEXT: .LBB89_3: 1299; PPC64LE-NEXT: lwsync 1300; PPC64LE-NEXT: blr 1301 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val syncscope("singlethread") seq_cst seq_cst 1302 ret void 1303} 1304 1305define void @test90(ptr %ptr, i16 %cmp, i16 %val) { 1306; PPC64LE-LABEL: test90: 1307; PPC64LE: # %bb.0: 1308; PPC64LE-NEXT: clrlwi 4, 4, 16 1309; PPC64LE-NEXT: .LBB90_1: 1310; PPC64LE-NEXT: lharx 6, 0, 3 1311; PPC64LE-NEXT: cmpw 6, 4 1312; PPC64LE-NEXT: bnelr 0 1313; PPC64LE-NEXT: # %bb.2: 1314; PPC64LE-NEXT: sthcx. 5, 0, 3 1315; PPC64LE-NEXT: bne 0, .LBB90_1 1316; PPC64LE-NEXT: # %bb.3: 1317; PPC64LE-NEXT: blr 1318 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val syncscope("singlethread") monotonic monotonic 1319 ret void 1320} 1321 1322define void @test91(ptr %ptr, i16 %cmp, i16 %val) { 1323; PPC64LE-LABEL: test91: 1324; PPC64LE: # %bb.0: 1325; PPC64LE-NEXT: clrlwi 4, 4, 16 1326; PPC64LE-NEXT: .LBB91_1: 1327; PPC64LE-NEXT: lharx 6, 0, 3 1328; PPC64LE-NEXT: cmpw 6, 4 1329; PPC64LE-NEXT: bne 0, .LBB91_3 1330; PPC64LE-NEXT: # %bb.2: 1331; PPC64LE-NEXT: sthcx. 5, 0, 3 1332; PPC64LE-NEXT: bne 0, .LBB91_1 1333; PPC64LE-NEXT: .LBB91_3: 1334; PPC64LE-NEXT: lwsync 1335; PPC64LE-NEXT: blr 1336 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val syncscope("singlethread") acquire monotonic 1337 ret void 1338} 1339 1340define void @test92(ptr %ptr, i16 %cmp, i16 %val) { 1341; PPC64LE-LABEL: test92: 1342; PPC64LE: # %bb.0: 1343; PPC64LE-NEXT: clrlwi 4, 4, 16 1344; PPC64LE-NEXT: .LBB92_1: 1345; PPC64LE-NEXT: lharx 6, 0, 3 1346; PPC64LE-NEXT: cmpw 6, 4 1347; PPC64LE-NEXT: bne 0, .LBB92_3 1348; PPC64LE-NEXT: # %bb.2: 1349; PPC64LE-NEXT: sthcx. 5, 0, 3 1350; PPC64LE-NEXT: bne 0, .LBB92_1 1351; PPC64LE-NEXT: .LBB92_3: 1352; PPC64LE-NEXT: lwsync 1353; PPC64LE-NEXT: blr 1354 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val syncscope("singlethread") acquire acquire 1355 ret void 1356} 1357 1358define void @test93(ptr %ptr, i16 %cmp, i16 %val) { 1359; PPC64LE-LABEL: test93: 1360; PPC64LE: # %bb.0: 1361; PPC64LE-NEXT: lwsync 1362; PPC64LE-NEXT: clrlwi 4, 4, 16 1363; PPC64LE-NEXT: .LBB93_1: 1364; PPC64LE-NEXT: lharx 6, 0, 3 1365; PPC64LE-NEXT: cmpw 6, 4 1366; PPC64LE-NEXT: bnelr 0 1367; PPC64LE-NEXT: # %bb.2: 1368; PPC64LE-NEXT: sthcx. 5, 0, 3 1369; PPC64LE-NEXT: bne 0, .LBB93_1 1370; PPC64LE-NEXT: # %bb.3: 1371; PPC64LE-NEXT: blr 1372 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val syncscope("singlethread") release monotonic 1373 ret void 1374} 1375 1376define void @test94(ptr %ptr, i16 %cmp, i16 %val) { 1377; PPC64LE-LABEL: test94: 1378; PPC64LE: # %bb.0: 1379; PPC64LE-NEXT: lwsync 1380; PPC64LE-NEXT: clrlwi 4, 4, 16 1381; PPC64LE-NEXT: .LBB94_1: 1382; PPC64LE-NEXT: lharx 6, 0, 3 1383; PPC64LE-NEXT: cmpw 6, 4 1384; PPC64LE-NEXT: bne 0, .LBB94_3 1385; PPC64LE-NEXT: # %bb.2: 1386; PPC64LE-NEXT: sthcx. 5, 0, 3 1387; PPC64LE-NEXT: bne 0, .LBB94_1 1388; PPC64LE-NEXT: .LBB94_3: 1389; PPC64LE-NEXT: lwsync 1390; PPC64LE-NEXT: blr 1391 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val syncscope("singlethread") release acquire 1392 ret void 1393} 1394 1395define void @test95(ptr %ptr, i16 %cmp, i16 %val) { 1396; PPC64LE-LABEL: test95: 1397; PPC64LE: # %bb.0: 1398; PPC64LE-NEXT: lwsync 1399; PPC64LE-NEXT: clrlwi 4, 4, 16 1400; PPC64LE-NEXT: .LBB95_1: 1401; PPC64LE-NEXT: lharx 6, 0, 3 1402; PPC64LE-NEXT: cmpw 6, 4 1403; PPC64LE-NEXT: bne 0, .LBB95_3 1404; PPC64LE-NEXT: # %bb.2: 1405; PPC64LE-NEXT: sthcx. 5, 0, 3 1406; PPC64LE-NEXT: bne 0, .LBB95_1 1407; PPC64LE-NEXT: .LBB95_3: 1408; PPC64LE-NEXT: lwsync 1409; PPC64LE-NEXT: blr 1410 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val syncscope("singlethread") acq_rel monotonic 1411 ret void 1412} 1413 1414define void @test96(ptr %ptr, i16 %cmp, i16 %val) { 1415; PPC64LE-LABEL: test96: 1416; PPC64LE: # %bb.0: 1417; PPC64LE-NEXT: lwsync 1418; PPC64LE-NEXT: clrlwi 4, 4, 16 1419; PPC64LE-NEXT: .LBB96_1: 1420; PPC64LE-NEXT: lharx 6, 0, 3 1421; PPC64LE-NEXT: cmpw 6, 4 1422; PPC64LE-NEXT: bne 0, .LBB96_3 1423; PPC64LE-NEXT: # %bb.2: 1424; PPC64LE-NEXT: sthcx. 5, 0, 3 1425; PPC64LE-NEXT: bne 0, .LBB96_1 1426; PPC64LE-NEXT: .LBB96_3: 1427; PPC64LE-NEXT: lwsync 1428; PPC64LE-NEXT: blr 1429 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val syncscope("singlethread") acq_rel acquire 1430 ret void 1431} 1432 1433define void @test97(ptr %ptr, i16 %cmp, i16 %val) { 1434; PPC64LE-LABEL: test97: 1435; PPC64LE: # %bb.0: 1436; PPC64LE-NEXT: sync 1437; PPC64LE-NEXT: clrlwi 4, 4, 16 1438; PPC64LE-NEXT: .LBB97_1: 1439; PPC64LE-NEXT: lharx 6, 0, 3 1440; PPC64LE-NEXT: cmpw 6, 4 1441; PPC64LE-NEXT: bne 0, .LBB97_3 1442; PPC64LE-NEXT: # %bb.2: 1443; PPC64LE-NEXT: sthcx. 5, 0, 3 1444; PPC64LE-NEXT: bne 0, .LBB97_1 1445; PPC64LE-NEXT: .LBB97_3: 1446; PPC64LE-NEXT: lwsync 1447; PPC64LE-NEXT: blr 1448 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val syncscope("singlethread") seq_cst monotonic 1449 ret void 1450} 1451 1452define void @test98(ptr %ptr, i16 %cmp, i16 %val) { 1453; PPC64LE-LABEL: test98: 1454; PPC64LE: # %bb.0: 1455; PPC64LE-NEXT: sync 1456; PPC64LE-NEXT: clrlwi 4, 4, 16 1457; PPC64LE-NEXT: .LBB98_1: 1458; PPC64LE-NEXT: lharx 6, 0, 3 1459; PPC64LE-NEXT: cmpw 6, 4 1460; PPC64LE-NEXT: bne 0, .LBB98_3 1461; PPC64LE-NEXT: # %bb.2: 1462; PPC64LE-NEXT: sthcx. 5, 0, 3 1463; PPC64LE-NEXT: bne 0, .LBB98_1 1464; PPC64LE-NEXT: .LBB98_3: 1465; PPC64LE-NEXT: lwsync 1466; PPC64LE-NEXT: blr 1467 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val syncscope("singlethread") seq_cst acquire 1468 ret void 1469} 1470 1471define void @test99(ptr %ptr, i16 %cmp, i16 %val) { 1472; PPC64LE-LABEL: test99: 1473; PPC64LE: # %bb.0: 1474; PPC64LE-NEXT: sync 1475; PPC64LE-NEXT: clrlwi 4, 4, 16 1476; PPC64LE-NEXT: .LBB99_1: 1477; PPC64LE-NEXT: lharx 6, 0, 3 1478; PPC64LE-NEXT: cmpw 6, 4 1479; PPC64LE-NEXT: bne 0, .LBB99_3 1480; PPC64LE-NEXT: # %bb.2: 1481; PPC64LE-NEXT: sthcx. 5, 0, 3 1482; PPC64LE-NEXT: bne 0, .LBB99_1 1483; PPC64LE-NEXT: .LBB99_3: 1484; PPC64LE-NEXT: lwsync 1485; PPC64LE-NEXT: blr 1486 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val syncscope("singlethread") seq_cst seq_cst 1487 ret void 1488} 1489 1490define void @test100(ptr %ptr, i32 %cmp, i32 %val) { 1491; PPC64LE-LABEL: test100: 1492; PPC64LE: # %bb.0: 1493; PPC64LE-NEXT: .LBB100_1: 1494; PPC64LE-NEXT: lwarx 6, 0, 3 1495; PPC64LE-NEXT: cmpw 6, 4 1496; PPC64LE-NEXT: bnelr 0 1497; PPC64LE-NEXT: # %bb.2: 1498; PPC64LE-NEXT: stwcx. 5, 0, 3 1499; PPC64LE-NEXT: bne 0, .LBB100_1 1500; PPC64LE-NEXT: # %bb.3: 1501; PPC64LE-NEXT: blr 1502 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val syncscope("singlethread") monotonic monotonic 1503 ret void 1504} 1505 1506define void @test101(ptr %ptr, i32 %cmp, i32 %val) { 1507; PPC64LE-LABEL: test101: 1508; PPC64LE: # %bb.0: 1509; PPC64LE-NEXT: .LBB101_1: 1510; PPC64LE-NEXT: lwarx 6, 0, 3 1511; PPC64LE-NEXT: cmpw 6, 4 1512; PPC64LE-NEXT: bne 0, .LBB101_3 1513; PPC64LE-NEXT: # %bb.2: 1514; PPC64LE-NEXT: stwcx. 5, 0, 3 1515; PPC64LE-NEXT: bne 0, .LBB101_1 1516; PPC64LE-NEXT: .LBB101_3: 1517; PPC64LE-NEXT: lwsync 1518; PPC64LE-NEXT: blr 1519 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val syncscope("singlethread") acquire monotonic 1520 ret void 1521} 1522 1523define void @test102(ptr %ptr, i32 %cmp, i32 %val) { 1524; PPC64LE-LABEL: test102: 1525; PPC64LE: # %bb.0: 1526; PPC64LE-NEXT: .LBB102_1: 1527; PPC64LE-NEXT: lwarx 6, 0, 3 1528; PPC64LE-NEXT: cmpw 6, 4 1529; PPC64LE-NEXT: bne 0, .LBB102_3 1530; PPC64LE-NEXT: # %bb.2: 1531; PPC64LE-NEXT: stwcx. 5, 0, 3 1532; PPC64LE-NEXT: bne 0, .LBB102_1 1533; PPC64LE-NEXT: .LBB102_3: 1534; PPC64LE-NEXT: lwsync 1535; PPC64LE-NEXT: blr 1536 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val syncscope("singlethread") acquire acquire 1537 ret void 1538} 1539 1540define void @test103(ptr %ptr, i32 %cmp, i32 %val) { 1541; PPC64LE-LABEL: test103: 1542; PPC64LE: # %bb.0: 1543; PPC64LE-NEXT: lwsync 1544; PPC64LE-NEXT: .LBB103_1: 1545; PPC64LE-NEXT: lwarx 6, 0, 3 1546; PPC64LE-NEXT: cmpw 6, 4 1547; PPC64LE-NEXT: bnelr 0 1548; PPC64LE-NEXT: # %bb.2: 1549; PPC64LE-NEXT: stwcx. 5, 0, 3 1550; PPC64LE-NEXT: bne 0, .LBB103_1 1551; PPC64LE-NEXT: # %bb.3: 1552; PPC64LE-NEXT: blr 1553 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val syncscope("singlethread") release monotonic 1554 ret void 1555} 1556 1557define void @test104(ptr %ptr, i32 %cmp, i32 %val) { 1558; PPC64LE-LABEL: test104: 1559; PPC64LE: # %bb.0: 1560; PPC64LE-NEXT: lwsync 1561; PPC64LE-NEXT: .LBB104_1: 1562; PPC64LE-NEXT: lwarx 6, 0, 3 1563; PPC64LE-NEXT: cmpw 6, 4 1564; PPC64LE-NEXT: bne 0, .LBB104_3 1565; PPC64LE-NEXT: # %bb.2: 1566; PPC64LE-NEXT: stwcx. 5, 0, 3 1567; PPC64LE-NEXT: bne 0, .LBB104_1 1568; PPC64LE-NEXT: .LBB104_3: 1569; PPC64LE-NEXT: lwsync 1570; PPC64LE-NEXT: blr 1571 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val syncscope("singlethread") release acquire 1572 ret void 1573} 1574 1575define void @test105(ptr %ptr, i32 %cmp, i32 %val) { 1576; PPC64LE-LABEL: test105: 1577; PPC64LE: # %bb.0: 1578; PPC64LE-NEXT: lwsync 1579; PPC64LE-NEXT: .LBB105_1: 1580; PPC64LE-NEXT: lwarx 6, 0, 3 1581; PPC64LE-NEXT: cmpw 6, 4 1582; PPC64LE-NEXT: bne 0, .LBB105_3 1583; PPC64LE-NEXT: # %bb.2: 1584; PPC64LE-NEXT: stwcx. 5, 0, 3 1585; PPC64LE-NEXT: bne 0, .LBB105_1 1586; PPC64LE-NEXT: .LBB105_3: 1587; PPC64LE-NEXT: lwsync 1588; PPC64LE-NEXT: blr 1589 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val syncscope("singlethread") acq_rel monotonic 1590 ret void 1591} 1592 1593define void @test106(ptr %ptr, i32 %cmp, i32 %val) { 1594; PPC64LE-LABEL: test106: 1595; PPC64LE: # %bb.0: 1596; PPC64LE-NEXT: lwsync 1597; PPC64LE-NEXT: .LBB106_1: 1598; PPC64LE-NEXT: lwarx 6, 0, 3 1599; PPC64LE-NEXT: cmpw 6, 4 1600; PPC64LE-NEXT: bne 0, .LBB106_3 1601; PPC64LE-NEXT: # %bb.2: 1602; PPC64LE-NEXT: stwcx. 5, 0, 3 1603; PPC64LE-NEXT: bne 0, .LBB106_1 1604; PPC64LE-NEXT: .LBB106_3: 1605; PPC64LE-NEXT: lwsync 1606; PPC64LE-NEXT: blr 1607 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val syncscope("singlethread") acq_rel acquire 1608 ret void 1609} 1610 1611define void @test107(ptr %ptr, i32 %cmp, i32 %val) { 1612; PPC64LE-LABEL: test107: 1613; PPC64LE: # %bb.0: 1614; PPC64LE-NEXT: sync 1615; PPC64LE-NEXT: .LBB107_1: 1616; PPC64LE-NEXT: lwarx 6, 0, 3 1617; PPC64LE-NEXT: cmpw 6, 4 1618; PPC64LE-NEXT: bne 0, .LBB107_3 1619; PPC64LE-NEXT: # %bb.2: 1620; PPC64LE-NEXT: stwcx. 5, 0, 3 1621; PPC64LE-NEXT: bne 0, .LBB107_1 1622; PPC64LE-NEXT: .LBB107_3: 1623; PPC64LE-NEXT: lwsync 1624; PPC64LE-NEXT: blr 1625 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val syncscope("singlethread") seq_cst monotonic 1626 ret void 1627} 1628 1629define void @test108(ptr %ptr, i32 %cmp, i32 %val) { 1630; PPC64LE-LABEL: test108: 1631; PPC64LE: # %bb.0: 1632; PPC64LE-NEXT: sync 1633; PPC64LE-NEXT: .LBB108_1: 1634; PPC64LE-NEXT: lwarx 6, 0, 3 1635; PPC64LE-NEXT: cmpw 6, 4 1636; PPC64LE-NEXT: bne 0, .LBB108_3 1637; PPC64LE-NEXT: # %bb.2: 1638; PPC64LE-NEXT: stwcx. 5, 0, 3 1639; PPC64LE-NEXT: bne 0, .LBB108_1 1640; PPC64LE-NEXT: .LBB108_3: 1641; PPC64LE-NEXT: lwsync 1642; PPC64LE-NEXT: blr 1643 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val syncscope("singlethread") seq_cst acquire 1644 ret void 1645} 1646 1647define void @test109(ptr %ptr, i32 %cmp, i32 %val) { 1648; PPC64LE-LABEL: test109: 1649; PPC64LE: # %bb.0: 1650; PPC64LE-NEXT: sync 1651; PPC64LE-NEXT: .LBB109_1: 1652; PPC64LE-NEXT: lwarx 6, 0, 3 1653; PPC64LE-NEXT: cmpw 6, 4 1654; PPC64LE-NEXT: bne 0, .LBB109_3 1655; PPC64LE-NEXT: # %bb.2: 1656; PPC64LE-NEXT: stwcx. 5, 0, 3 1657; PPC64LE-NEXT: bne 0, .LBB109_1 1658; PPC64LE-NEXT: .LBB109_3: 1659; PPC64LE-NEXT: lwsync 1660; PPC64LE-NEXT: blr 1661 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val syncscope("singlethread") seq_cst seq_cst 1662 ret void 1663} 1664 1665define void @test110(ptr %ptr, i64 %cmp, i64 %val) { 1666; PPC64LE-LABEL: test110: 1667; PPC64LE: # %bb.0: 1668; PPC64LE-NEXT: .LBB110_1: 1669; PPC64LE-NEXT: ldarx 6, 0, 3 1670; PPC64LE-NEXT: cmpd 6, 4 1671; PPC64LE-NEXT: bnelr 0 1672; PPC64LE-NEXT: # %bb.2: 1673; PPC64LE-NEXT: stdcx. 5, 0, 3 1674; PPC64LE-NEXT: bne 0, .LBB110_1 1675; PPC64LE-NEXT: # %bb.3: 1676; PPC64LE-NEXT: blr 1677 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val syncscope("singlethread") monotonic monotonic 1678 ret void 1679} 1680 1681define void @test111(ptr %ptr, i64 %cmp, i64 %val) { 1682; PPC64LE-LABEL: test111: 1683; PPC64LE: # %bb.0: 1684; PPC64LE-NEXT: .LBB111_1: 1685; PPC64LE-NEXT: ldarx 6, 0, 3 1686; PPC64LE-NEXT: cmpd 6, 4 1687; PPC64LE-NEXT: bne 0, .LBB111_3 1688; PPC64LE-NEXT: # %bb.2: 1689; PPC64LE-NEXT: stdcx. 5, 0, 3 1690; PPC64LE-NEXT: bne 0, .LBB111_1 1691; PPC64LE-NEXT: .LBB111_3: 1692; PPC64LE-NEXT: lwsync 1693; PPC64LE-NEXT: blr 1694 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val syncscope("singlethread") acquire monotonic 1695 ret void 1696} 1697 1698define void @test112(ptr %ptr, i64 %cmp, i64 %val) { 1699; PPC64LE-LABEL: test112: 1700; PPC64LE: # %bb.0: 1701; PPC64LE-NEXT: .LBB112_1: 1702; PPC64LE-NEXT: ldarx 6, 0, 3 1703; PPC64LE-NEXT: cmpd 6, 4 1704; PPC64LE-NEXT: bne 0, .LBB112_3 1705; PPC64LE-NEXT: # %bb.2: 1706; PPC64LE-NEXT: stdcx. 5, 0, 3 1707; PPC64LE-NEXT: bne 0, .LBB112_1 1708; PPC64LE-NEXT: .LBB112_3: 1709; PPC64LE-NEXT: lwsync 1710; PPC64LE-NEXT: blr 1711 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val syncscope("singlethread") acquire acquire 1712 ret void 1713} 1714 1715define void @test113(ptr %ptr, i64 %cmp, i64 %val) { 1716; PPC64LE-LABEL: test113: 1717; PPC64LE: # %bb.0: 1718; PPC64LE-NEXT: lwsync 1719; PPC64LE-NEXT: .LBB113_1: 1720; PPC64LE-NEXT: ldarx 6, 0, 3 1721; PPC64LE-NEXT: cmpd 6, 4 1722; PPC64LE-NEXT: bnelr 0 1723; PPC64LE-NEXT: # %bb.2: 1724; PPC64LE-NEXT: stdcx. 5, 0, 3 1725; PPC64LE-NEXT: bne 0, .LBB113_1 1726; PPC64LE-NEXT: # %bb.3: 1727; PPC64LE-NEXT: blr 1728 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val syncscope("singlethread") release monotonic 1729 ret void 1730} 1731 1732define void @test114(ptr %ptr, i64 %cmp, i64 %val) { 1733; PPC64LE-LABEL: test114: 1734; PPC64LE: # %bb.0: 1735; PPC64LE-NEXT: lwsync 1736; PPC64LE-NEXT: .LBB114_1: 1737; PPC64LE-NEXT: ldarx 6, 0, 3 1738; PPC64LE-NEXT: cmpd 6, 4 1739; PPC64LE-NEXT: bne 0, .LBB114_3 1740; PPC64LE-NEXT: # %bb.2: 1741; PPC64LE-NEXT: stdcx. 5, 0, 3 1742; PPC64LE-NEXT: bne 0, .LBB114_1 1743; PPC64LE-NEXT: .LBB114_3: 1744; PPC64LE-NEXT: lwsync 1745; PPC64LE-NEXT: blr 1746 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val syncscope("singlethread") release acquire 1747 ret void 1748} 1749 1750define void @test115(ptr %ptr, i64 %cmp, i64 %val) { 1751; PPC64LE-LABEL: test115: 1752; PPC64LE: # %bb.0: 1753; PPC64LE-NEXT: lwsync 1754; PPC64LE-NEXT: .LBB115_1: 1755; PPC64LE-NEXT: ldarx 6, 0, 3 1756; PPC64LE-NEXT: cmpd 6, 4 1757; PPC64LE-NEXT: bne 0, .LBB115_3 1758; PPC64LE-NEXT: # %bb.2: 1759; PPC64LE-NEXT: stdcx. 5, 0, 3 1760; PPC64LE-NEXT: bne 0, .LBB115_1 1761; PPC64LE-NEXT: .LBB115_3: 1762; PPC64LE-NEXT: lwsync 1763; PPC64LE-NEXT: blr 1764 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val syncscope("singlethread") acq_rel monotonic 1765 ret void 1766} 1767 1768define void @test116(ptr %ptr, i64 %cmp, i64 %val) { 1769; PPC64LE-LABEL: test116: 1770; PPC64LE: # %bb.0: 1771; PPC64LE-NEXT: lwsync 1772; PPC64LE-NEXT: .LBB116_1: 1773; PPC64LE-NEXT: ldarx 6, 0, 3 1774; PPC64LE-NEXT: cmpd 6, 4 1775; PPC64LE-NEXT: bne 0, .LBB116_3 1776; PPC64LE-NEXT: # %bb.2: 1777; PPC64LE-NEXT: stdcx. 5, 0, 3 1778; PPC64LE-NEXT: bne 0, .LBB116_1 1779; PPC64LE-NEXT: .LBB116_3: 1780; PPC64LE-NEXT: lwsync 1781; PPC64LE-NEXT: blr 1782 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val syncscope("singlethread") acq_rel acquire 1783 ret void 1784} 1785 1786define void @test117(ptr %ptr, i64 %cmp, i64 %val) { 1787; PPC64LE-LABEL: test117: 1788; PPC64LE: # %bb.0: 1789; PPC64LE-NEXT: sync 1790; PPC64LE-NEXT: .LBB117_1: 1791; PPC64LE-NEXT: ldarx 6, 0, 3 1792; PPC64LE-NEXT: cmpd 6, 4 1793; PPC64LE-NEXT: bne 0, .LBB117_3 1794; PPC64LE-NEXT: # %bb.2: 1795; PPC64LE-NEXT: stdcx. 5, 0, 3 1796; PPC64LE-NEXT: bne 0, .LBB117_1 1797; PPC64LE-NEXT: .LBB117_3: 1798; PPC64LE-NEXT: lwsync 1799; PPC64LE-NEXT: blr 1800 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val syncscope("singlethread") seq_cst monotonic 1801 ret void 1802} 1803 1804define void @test118(ptr %ptr, i64 %cmp, i64 %val) { 1805; PPC64LE-LABEL: test118: 1806; PPC64LE: # %bb.0: 1807; PPC64LE-NEXT: sync 1808; PPC64LE-NEXT: .LBB118_1: 1809; PPC64LE-NEXT: ldarx 6, 0, 3 1810; PPC64LE-NEXT: cmpd 6, 4 1811; PPC64LE-NEXT: bne 0, .LBB118_3 1812; PPC64LE-NEXT: # %bb.2: 1813; PPC64LE-NEXT: stdcx. 5, 0, 3 1814; PPC64LE-NEXT: bne 0, .LBB118_1 1815; PPC64LE-NEXT: .LBB118_3: 1816; PPC64LE-NEXT: lwsync 1817; PPC64LE-NEXT: blr 1818 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val syncscope("singlethread") seq_cst acquire 1819 ret void 1820} 1821 1822define void @test119(ptr %ptr, i64 %cmp, i64 %val) { 1823; PPC64LE-LABEL: test119: 1824; PPC64LE: # %bb.0: 1825; PPC64LE-NEXT: sync 1826; PPC64LE-NEXT: .LBB119_1: 1827; PPC64LE-NEXT: ldarx 6, 0, 3 1828; PPC64LE-NEXT: cmpd 6, 4 1829; PPC64LE-NEXT: bne 0, .LBB119_3 1830; PPC64LE-NEXT: # %bb.2: 1831; PPC64LE-NEXT: stdcx. 5, 0, 3 1832; PPC64LE-NEXT: bne 0, .LBB119_1 1833; PPC64LE-NEXT: .LBB119_3: 1834; PPC64LE-NEXT: lwsync 1835; PPC64LE-NEXT: blr 1836 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val syncscope("singlethread") seq_cst seq_cst 1837 ret void 1838} 1839 1840define i8 @test120(ptr %ptr, i8 %val) { 1841; PPC64LE-LABEL: test120: 1842; PPC64LE: # %bb.0: 1843; PPC64LE-NEXT: .LBB120_1: 1844; PPC64LE-NEXT: lbarx 5, 0, 3 1845; PPC64LE-NEXT: stbcx. 4, 0, 3 1846; PPC64LE-NEXT: bne 0, .LBB120_1 1847; PPC64LE-NEXT: # %bb.2: 1848; PPC64LE-NEXT: mr 3, 5 1849; PPC64LE-NEXT: blr 1850 %ret = atomicrmw xchg ptr %ptr, i8 %val monotonic 1851 ret i8 %ret 1852} 1853 1854define i8 @test121(ptr %ptr, i8 %val) { 1855; PPC64LE-LABEL: test121: 1856; PPC64LE: # %bb.0: 1857; PPC64LE-NEXT: mr 5, 3 1858; PPC64LE-NEXT: .LBB121_1: 1859; PPC64LE-NEXT: lbarx 3, 0, 5 1860; PPC64LE-NEXT: stbcx. 4, 0, 5 1861; PPC64LE-NEXT: bne 0, .LBB121_1 1862; PPC64LE-NEXT: # %bb.2: 1863; PPC64LE-NEXT: lwsync 1864; PPC64LE-NEXT: blr 1865 %ret = atomicrmw xchg ptr %ptr, i8 %val acquire 1866 ret i8 %ret 1867} 1868 1869define i8 @test122(ptr %ptr, i8 %val) { 1870; PPC64LE-LABEL: test122: 1871; PPC64LE: # %bb.0: 1872; PPC64LE-NEXT: lwsync 1873; PPC64LE-NEXT: .LBB122_1: 1874; PPC64LE-NEXT: lbarx 5, 0, 3 1875; PPC64LE-NEXT: stbcx. 4, 0, 3 1876; PPC64LE-NEXT: bne 0, .LBB122_1 1877; PPC64LE-NEXT: # %bb.2: 1878; PPC64LE-NEXT: mr 3, 5 1879; PPC64LE-NEXT: blr 1880 %ret = atomicrmw xchg ptr %ptr, i8 %val release 1881 ret i8 %ret 1882} 1883 1884define i8 @test123(ptr %ptr, i8 %val) { 1885; PPC64LE-LABEL: test123: 1886; PPC64LE: # %bb.0: 1887; PPC64LE-NEXT: lwsync 1888; PPC64LE-NEXT: .LBB123_1: 1889; PPC64LE-NEXT: lbarx 5, 0, 3 1890; PPC64LE-NEXT: stbcx. 4, 0, 3 1891; PPC64LE-NEXT: bne 0, .LBB123_1 1892; PPC64LE-NEXT: # %bb.2: 1893; PPC64LE-NEXT: lwsync 1894; PPC64LE-NEXT: mr 3, 5 1895; PPC64LE-NEXT: blr 1896 %ret = atomicrmw xchg ptr %ptr, i8 %val acq_rel 1897 ret i8 %ret 1898} 1899 1900define i8 @test124(ptr %ptr, i8 %val) { 1901; PPC64LE-LABEL: test124: 1902; PPC64LE: # %bb.0: 1903; PPC64LE-NEXT: sync 1904; PPC64LE-NEXT: .LBB124_1: 1905; PPC64LE-NEXT: lbarx 5, 0, 3 1906; PPC64LE-NEXT: stbcx. 4, 0, 3 1907; PPC64LE-NEXT: bne 0, .LBB124_1 1908; PPC64LE-NEXT: # %bb.2: 1909; PPC64LE-NEXT: lwsync 1910; PPC64LE-NEXT: mr 3, 5 1911; PPC64LE-NEXT: blr 1912 %ret = atomicrmw xchg ptr %ptr, i8 %val seq_cst 1913 ret i8 %ret 1914} 1915 1916define i16 @test125(ptr %ptr, i16 %val) { 1917; PPC64LE-LABEL: test125: 1918; PPC64LE: # %bb.0: 1919; PPC64LE-NEXT: .LBB125_1: 1920; PPC64LE-NEXT: lharx 5, 0, 3 1921; PPC64LE-NEXT: sthcx. 4, 0, 3 1922; PPC64LE-NEXT: bne 0, .LBB125_1 1923; PPC64LE-NEXT: # %bb.2: 1924; PPC64LE-NEXT: mr 3, 5 1925; PPC64LE-NEXT: blr 1926 %ret = atomicrmw xchg ptr %ptr, i16 %val monotonic 1927 ret i16 %ret 1928} 1929 1930define i16 @test126(ptr %ptr, i16 %val) { 1931; PPC64LE-LABEL: test126: 1932; PPC64LE: # %bb.0: 1933; PPC64LE-NEXT: mr 5, 3 1934; PPC64LE-NEXT: .LBB126_1: 1935; PPC64LE-NEXT: lharx 3, 0, 5 1936; PPC64LE-NEXT: sthcx. 4, 0, 5 1937; PPC64LE-NEXT: bne 0, .LBB126_1 1938; PPC64LE-NEXT: # %bb.2: 1939; PPC64LE-NEXT: lwsync 1940; PPC64LE-NEXT: blr 1941 %ret = atomicrmw xchg ptr %ptr, i16 %val acquire 1942 ret i16 %ret 1943} 1944 1945define i16 @test127(ptr %ptr, i16 %val) { 1946; PPC64LE-LABEL: test127: 1947; PPC64LE: # %bb.0: 1948; PPC64LE-NEXT: lwsync 1949; PPC64LE-NEXT: .LBB127_1: 1950; PPC64LE-NEXT: lharx 5, 0, 3 1951; PPC64LE-NEXT: sthcx. 4, 0, 3 1952; PPC64LE-NEXT: bne 0, .LBB127_1 1953; PPC64LE-NEXT: # %bb.2: 1954; PPC64LE-NEXT: mr 3, 5 1955; PPC64LE-NEXT: blr 1956 %ret = atomicrmw xchg ptr %ptr, i16 %val release 1957 ret i16 %ret 1958} 1959 1960define i16 @test128(ptr %ptr, i16 %val) { 1961; PPC64LE-LABEL: test128: 1962; PPC64LE: # %bb.0: 1963; PPC64LE-NEXT: lwsync 1964; PPC64LE-NEXT: .LBB128_1: 1965; PPC64LE-NEXT: lharx 5, 0, 3 1966; PPC64LE-NEXT: sthcx. 4, 0, 3 1967; PPC64LE-NEXT: bne 0, .LBB128_1 1968; PPC64LE-NEXT: # %bb.2: 1969; PPC64LE-NEXT: lwsync 1970; PPC64LE-NEXT: mr 3, 5 1971; PPC64LE-NEXT: blr 1972 %ret = atomicrmw xchg ptr %ptr, i16 %val acq_rel 1973 ret i16 %ret 1974} 1975 1976define i16 @test129(ptr %ptr, i16 %val) { 1977; PPC64LE-LABEL: test129: 1978; PPC64LE: # %bb.0: 1979; PPC64LE-NEXT: sync 1980; PPC64LE-NEXT: .LBB129_1: 1981; PPC64LE-NEXT: lharx 5, 0, 3 1982; PPC64LE-NEXT: sthcx. 4, 0, 3 1983; PPC64LE-NEXT: bne 0, .LBB129_1 1984; PPC64LE-NEXT: # %bb.2: 1985; PPC64LE-NEXT: lwsync 1986; PPC64LE-NEXT: mr 3, 5 1987; PPC64LE-NEXT: blr 1988 %ret = atomicrmw xchg ptr %ptr, i16 %val seq_cst 1989 ret i16 %ret 1990} 1991 1992define i32 @test130(ptr %ptr, i32 %val) { 1993; PPC64LE-LABEL: test130: 1994; PPC64LE: # %bb.0: 1995; PPC64LE-NEXT: .LBB130_1: 1996; PPC64LE-NEXT: lwarx 5, 0, 3 1997; PPC64LE-NEXT: stwcx. 4, 0, 3 1998; PPC64LE-NEXT: bne 0, .LBB130_1 1999; PPC64LE-NEXT: # %bb.2: 2000; PPC64LE-NEXT: mr 3, 5 2001; PPC64LE-NEXT: blr 2002 %ret = atomicrmw xchg ptr %ptr, i32 %val monotonic 2003 ret i32 %ret 2004} 2005 2006define i32 @test131(ptr %ptr, i32 %val) { 2007; PPC64LE-LABEL: test131: 2008; PPC64LE: # %bb.0: 2009; PPC64LE-NEXT: mr 5, 3 2010; PPC64LE-NEXT: .LBB131_1: 2011; PPC64LE-NEXT: lwarx 3, 0, 5 2012; PPC64LE-NEXT: stwcx. 4, 0, 5 2013; PPC64LE-NEXT: bne 0, .LBB131_1 2014; PPC64LE-NEXT: # %bb.2: 2015; PPC64LE-NEXT: lwsync 2016; PPC64LE-NEXT: blr 2017 %ret = atomicrmw xchg ptr %ptr, i32 %val acquire 2018 ret i32 %ret 2019} 2020 2021define i32 @test132(ptr %ptr, i32 %val) { 2022; PPC64LE-LABEL: test132: 2023; PPC64LE: # %bb.0: 2024; PPC64LE-NEXT: lwsync 2025; PPC64LE-NEXT: .LBB132_1: 2026; PPC64LE-NEXT: lwarx 5, 0, 3 2027; PPC64LE-NEXT: stwcx. 4, 0, 3 2028; PPC64LE-NEXT: bne 0, .LBB132_1 2029; PPC64LE-NEXT: # %bb.2: 2030; PPC64LE-NEXT: mr 3, 5 2031; PPC64LE-NEXT: blr 2032 %ret = atomicrmw xchg ptr %ptr, i32 %val release 2033 ret i32 %ret 2034} 2035 2036define i32 @test133(ptr %ptr, i32 %val) { 2037; PPC64LE-LABEL: test133: 2038; PPC64LE: # %bb.0: 2039; PPC64LE-NEXT: lwsync 2040; PPC64LE-NEXT: .LBB133_1: 2041; PPC64LE-NEXT: lwarx 5, 0, 3 2042; PPC64LE-NEXT: stwcx. 4, 0, 3 2043; PPC64LE-NEXT: bne 0, .LBB133_1 2044; PPC64LE-NEXT: # %bb.2: 2045; PPC64LE-NEXT: lwsync 2046; PPC64LE-NEXT: mr 3, 5 2047; PPC64LE-NEXT: blr 2048 %ret = atomicrmw xchg ptr %ptr, i32 %val acq_rel 2049 ret i32 %ret 2050} 2051 2052define i32 @test134(ptr %ptr, i32 %val) { 2053; PPC64LE-LABEL: test134: 2054; PPC64LE: # %bb.0: 2055; PPC64LE-NEXT: sync 2056; PPC64LE-NEXT: .LBB134_1: 2057; PPC64LE-NEXT: lwarx 5, 0, 3 2058; PPC64LE-NEXT: stwcx. 4, 0, 3 2059; PPC64LE-NEXT: bne 0, .LBB134_1 2060; PPC64LE-NEXT: # %bb.2: 2061; PPC64LE-NEXT: lwsync 2062; PPC64LE-NEXT: mr 3, 5 2063; PPC64LE-NEXT: blr 2064 %ret = atomicrmw xchg ptr %ptr, i32 %val seq_cst 2065 ret i32 %ret 2066} 2067 2068define i64 @test135(ptr %ptr, i64 %val) { 2069; PPC64LE-LABEL: test135: 2070; PPC64LE: # %bb.0: 2071; PPC64LE-NEXT: .LBB135_1: 2072; PPC64LE-NEXT: ldarx 5, 0, 3 2073; PPC64LE-NEXT: stdcx. 4, 0, 3 2074; PPC64LE-NEXT: bne 0, .LBB135_1 2075; PPC64LE-NEXT: # %bb.2: 2076; PPC64LE-NEXT: mr 3, 5 2077; PPC64LE-NEXT: blr 2078 %ret = atomicrmw xchg ptr %ptr, i64 %val monotonic 2079 ret i64 %ret 2080} 2081 2082define i64 @test136(ptr %ptr, i64 %val) { 2083; PPC64LE-LABEL: test136: 2084; PPC64LE: # %bb.0: 2085; PPC64LE-NEXT: mr 5, 3 2086; PPC64LE-NEXT: .LBB136_1: 2087; PPC64LE-NEXT: ldarx 3, 0, 5 2088; PPC64LE-NEXT: stdcx. 4, 0, 5 2089; PPC64LE-NEXT: bne 0, .LBB136_1 2090; PPC64LE-NEXT: # %bb.2: 2091; PPC64LE-NEXT: lwsync 2092; PPC64LE-NEXT: blr 2093 %ret = atomicrmw xchg ptr %ptr, i64 %val acquire 2094 ret i64 %ret 2095} 2096 2097define i64 @test137(ptr %ptr, i64 %val) { 2098; PPC64LE-LABEL: test137: 2099; PPC64LE: # %bb.0: 2100; PPC64LE-NEXT: lwsync 2101; PPC64LE-NEXT: .LBB137_1: 2102; PPC64LE-NEXT: ldarx 5, 0, 3 2103; PPC64LE-NEXT: stdcx. 4, 0, 3 2104; PPC64LE-NEXT: bne 0, .LBB137_1 2105; PPC64LE-NEXT: # %bb.2: 2106; PPC64LE-NEXT: mr 3, 5 2107; PPC64LE-NEXT: blr 2108 %ret = atomicrmw xchg ptr %ptr, i64 %val release 2109 ret i64 %ret 2110} 2111 2112define i64 @test138(ptr %ptr, i64 %val) { 2113; PPC64LE-LABEL: test138: 2114; PPC64LE: # %bb.0: 2115; PPC64LE-NEXT: lwsync 2116; PPC64LE-NEXT: .LBB138_1: 2117; PPC64LE-NEXT: ldarx 5, 0, 3 2118; PPC64LE-NEXT: stdcx. 4, 0, 3 2119; PPC64LE-NEXT: bne 0, .LBB138_1 2120; PPC64LE-NEXT: # %bb.2: 2121; PPC64LE-NEXT: lwsync 2122; PPC64LE-NEXT: mr 3, 5 2123; PPC64LE-NEXT: blr 2124 %ret = atomicrmw xchg ptr %ptr, i64 %val acq_rel 2125 ret i64 %ret 2126} 2127 2128define i64 @test139(ptr %ptr, i64 %val) { 2129; PPC64LE-LABEL: test139: 2130; PPC64LE: # %bb.0: 2131; PPC64LE-NEXT: sync 2132; PPC64LE-NEXT: .LBB139_1: 2133; PPC64LE-NEXT: ldarx 5, 0, 3 2134; PPC64LE-NEXT: stdcx. 4, 0, 3 2135; PPC64LE-NEXT: bne 0, .LBB139_1 2136; PPC64LE-NEXT: # %bb.2: 2137; PPC64LE-NEXT: lwsync 2138; PPC64LE-NEXT: mr 3, 5 2139; PPC64LE-NEXT: blr 2140 %ret = atomicrmw xchg ptr %ptr, i64 %val seq_cst 2141 ret i64 %ret 2142} 2143 2144define i8 @test140(ptr %ptr, i8 %val) { 2145; PPC64LE-LABEL: test140: 2146; PPC64LE: # %bb.0: 2147; PPC64LE-NEXT: .LBB140_1: 2148; PPC64LE-NEXT: lbarx 5, 0, 3 2149; PPC64LE-NEXT: add 6, 4, 5 2150; PPC64LE-NEXT: stbcx. 6, 0, 3 2151; PPC64LE-NEXT: bne 0, .LBB140_1 2152; PPC64LE-NEXT: # %bb.2: 2153; PPC64LE-NEXT: mr 3, 5 2154; PPC64LE-NEXT: blr 2155 %ret = atomicrmw add ptr %ptr, i8 %val monotonic 2156 ret i8 %ret 2157} 2158 2159define i8 @test141(ptr %ptr, i8 %val) { 2160; PPC64LE-LABEL: test141: 2161; PPC64LE: # %bb.0: 2162; PPC64LE-NEXT: mr 5, 3 2163; PPC64LE-NEXT: .LBB141_1: 2164; PPC64LE-NEXT: lbarx 3, 0, 5 2165; PPC64LE-NEXT: add 6, 4, 3 2166; PPC64LE-NEXT: stbcx. 6, 0, 5 2167; PPC64LE-NEXT: bne 0, .LBB141_1 2168; PPC64LE-NEXT: # %bb.2: 2169; PPC64LE-NEXT: lwsync 2170; PPC64LE-NEXT: blr 2171 %ret = atomicrmw add ptr %ptr, i8 %val acquire 2172 ret i8 %ret 2173} 2174 2175define i8 @test142(ptr %ptr, i8 %val) { 2176; PPC64LE-LABEL: test142: 2177; PPC64LE: # %bb.0: 2178; PPC64LE-NEXT: lwsync 2179; PPC64LE-NEXT: .LBB142_1: 2180; PPC64LE-NEXT: lbarx 5, 0, 3 2181; PPC64LE-NEXT: add 6, 4, 5 2182; PPC64LE-NEXT: stbcx. 6, 0, 3 2183; PPC64LE-NEXT: bne 0, .LBB142_1 2184; PPC64LE-NEXT: # %bb.2: 2185; PPC64LE-NEXT: mr 3, 5 2186; PPC64LE-NEXT: blr 2187 %ret = atomicrmw add ptr %ptr, i8 %val release 2188 ret i8 %ret 2189} 2190 2191define i8 @test143(ptr %ptr, i8 %val) { 2192; PPC64LE-LABEL: test143: 2193; PPC64LE: # %bb.0: 2194; PPC64LE-NEXT: lwsync 2195; PPC64LE-NEXT: .LBB143_1: 2196; PPC64LE-NEXT: lbarx 5, 0, 3 2197; PPC64LE-NEXT: add 6, 4, 5 2198; PPC64LE-NEXT: stbcx. 6, 0, 3 2199; PPC64LE-NEXT: bne 0, .LBB143_1 2200; PPC64LE-NEXT: # %bb.2: 2201; PPC64LE-NEXT: lwsync 2202; PPC64LE-NEXT: mr 3, 5 2203; PPC64LE-NEXT: blr 2204 %ret = atomicrmw add ptr %ptr, i8 %val acq_rel 2205 ret i8 %ret 2206} 2207 2208define i8 @test144(ptr %ptr, i8 %val) { 2209; PPC64LE-LABEL: test144: 2210; PPC64LE: # %bb.0: 2211; PPC64LE-NEXT: sync 2212; PPC64LE-NEXT: .LBB144_1: 2213; PPC64LE-NEXT: lbarx 5, 0, 3 2214; PPC64LE-NEXT: add 6, 4, 5 2215; PPC64LE-NEXT: stbcx. 6, 0, 3 2216; PPC64LE-NEXT: bne 0, .LBB144_1 2217; PPC64LE-NEXT: # %bb.2: 2218; PPC64LE-NEXT: lwsync 2219; PPC64LE-NEXT: mr 3, 5 2220; PPC64LE-NEXT: blr 2221 %ret = atomicrmw add ptr %ptr, i8 %val seq_cst 2222 ret i8 %ret 2223} 2224 2225define i16 @test145(ptr %ptr, i16 %val) { 2226; PPC64LE-LABEL: test145: 2227; PPC64LE: # %bb.0: 2228; PPC64LE-NEXT: .LBB145_1: 2229; PPC64LE-NEXT: lharx 5, 0, 3 2230; PPC64LE-NEXT: add 6, 4, 5 2231; PPC64LE-NEXT: sthcx. 6, 0, 3 2232; PPC64LE-NEXT: bne 0, .LBB145_1 2233; PPC64LE-NEXT: # %bb.2: 2234; PPC64LE-NEXT: mr 3, 5 2235; PPC64LE-NEXT: blr 2236 %ret = atomicrmw add ptr %ptr, i16 %val monotonic 2237 ret i16 %ret 2238} 2239 2240define i16 @test146(ptr %ptr, i16 %val) { 2241; PPC64LE-LABEL: test146: 2242; PPC64LE: # %bb.0: 2243; PPC64LE-NEXT: mr 5, 3 2244; PPC64LE-NEXT: .LBB146_1: 2245; PPC64LE-NEXT: lharx 3, 0, 5 2246; PPC64LE-NEXT: add 6, 4, 3 2247; PPC64LE-NEXT: sthcx. 6, 0, 5 2248; PPC64LE-NEXT: bne 0, .LBB146_1 2249; PPC64LE-NEXT: # %bb.2: 2250; PPC64LE-NEXT: lwsync 2251; PPC64LE-NEXT: blr 2252 %ret = atomicrmw add ptr %ptr, i16 %val acquire 2253 ret i16 %ret 2254} 2255 2256define i16 @test147(ptr %ptr, i16 %val) { 2257; PPC64LE-LABEL: test147: 2258; PPC64LE: # %bb.0: 2259; PPC64LE-NEXT: lwsync 2260; PPC64LE-NEXT: .LBB147_1: 2261; PPC64LE-NEXT: lharx 5, 0, 3 2262; PPC64LE-NEXT: add 6, 4, 5 2263; PPC64LE-NEXT: sthcx. 6, 0, 3 2264; PPC64LE-NEXT: bne 0, .LBB147_1 2265; PPC64LE-NEXT: # %bb.2: 2266; PPC64LE-NEXT: mr 3, 5 2267; PPC64LE-NEXT: blr 2268 %ret = atomicrmw add ptr %ptr, i16 %val release 2269 ret i16 %ret 2270} 2271 2272define i16 @test148(ptr %ptr, i16 %val) { 2273; PPC64LE-LABEL: test148: 2274; PPC64LE: # %bb.0: 2275; PPC64LE-NEXT: lwsync 2276; PPC64LE-NEXT: .LBB148_1: 2277; PPC64LE-NEXT: lharx 5, 0, 3 2278; PPC64LE-NEXT: add 6, 4, 5 2279; PPC64LE-NEXT: sthcx. 6, 0, 3 2280; PPC64LE-NEXT: bne 0, .LBB148_1 2281; PPC64LE-NEXT: # %bb.2: 2282; PPC64LE-NEXT: lwsync 2283; PPC64LE-NEXT: mr 3, 5 2284; PPC64LE-NEXT: blr 2285 %ret = atomicrmw add ptr %ptr, i16 %val acq_rel 2286 ret i16 %ret 2287} 2288 2289define i16 @test149(ptr %ptr, i16 %val) { 2290; PPC64LE-LABEL: test149: 2291; PPC64LE: # %bb.0: 2292; PPC64LE-NEXT: sync 2293; PPC64LE-NEXT: .LBB149_1: 2294; PPC64LE-NEXT: lharx 5, 0, 3 2295; PPC64LE-NEXT: add 6, 4, 5 2296; PPC64LE-NEXT: sthcx. 6, 0, 3 2297; PPC64LE-NEXT: bne 0, .LBB149_1 2298; PPC64LE-NEXT: # %bb.2: 2299; PPC64LE-NEXT: lwsync 2300; PPC64LE-NEXT: mr 3, 5 2301; PPC64LE-NEXT: blr 2302 %ret = atomicrmw add ptr %ptr, i16 %val seq_cst 2303 ret i16 %ret 2304} 2305 2306define i32 @test150(ptr %ptr, i32 %val) { 2307; PPC64LE-LABEL: test150: 2308; PPC64LE: # %bb.0: 2309; PPC64LE-NEXT: .LBB150_1: 2310; PPC64LE-NEXT: lwarx 5, 0, 3 2311; PPC64LE-NEXT: add 6, 4, 5 2312; PPC64LE-NEXT: stwcx. 6, 0, 3 2313; PPC64LE-NEXT: bne 0, .LBB150_1 2314; PPC64LE-NEXT: # %bb.2: 2315; PPC64LE-NEXT: mr 3, 5 2316; PPC64LE-NEXT: blr 2317 %ret = atomicrmw add ptr %ptr, i32 %val monotonic 2318 ret i32 %ret 2319} 2320 2321define i32 @test151(ptr %ptr, i32 %val) { 2322; PPC64LE-LABEL: test151: 2323; PPC64LE: # %bb.0: 2324; PPC64LE-NEXT: mr 5, 3 2325; PPC64LE-NEXT: .LBB151_1: 2326; PPC64LE-NEXT: lwarx 3, 0, 5 2327; PPC64LE-NEXT: add 6, 4, 3 2328; PPC64LE-NEXT: stwcx. 6, 0, 5 2329; PPC64LE-NEXT: bne 0, .LBB151_1 2330; PPC64LE-NEXT: # %bb.2: 2331; PPC64LE-NEXT: lwsync 2332; PPC64LE-NEXT: blr 2333 %ret = atomicrmw add ptr %ptr, i32 %val acquire 2334 ret i32 %ret 2335} 2336 2337define i32 @test152(ptr %ptr, i32 %val) { 2338; PPC64LE-LABEL: test152: 2339; PPC64LE: # %bb.0: 2340; PPC64LE-NEXT: lwsync 2341; PPC64LE-NEXT: .LBB152_1: 2342; PPC64LE-NEXT: lwarx 5, 0, 3 2343; PPC64LE-NEXT: add 6, 4, 5 2344; PPC64LE-NEXT: stwcx. 6, 0, 3 2345; PPC64LE-NEXT: bne 0, .LBB152_1 2346; PPC64LE-NEXT: # %bb.2: 2347; PPC64LE-NEXT: mr 3, 5 2348; PPC64LE-NEXT: blr 2349 %ret = atomicrmw add ptr %ptr, i32 %val release 2350 ret i32 %ret 2351} 2352 2353define i32 @test153(ptr %ptr, i32 %val) { 2354; PPC64LE-LABEL: test153: 2355; PPC64LE: # %bb.0: 2356; PPC64LE-NEXT: lwsync 2357; PPC64LE-NEXT: .LBB153_1: 2358; PPC64LE-NEXT: lwarx 5, 0, 3 2359; PPC64LE-NEXT: add 6, 4, 5 2360; PPC64LE-NEXT: stwcx. 6, 0, 3 2361; PPC64LE-NEXT: bne 0, .LBB153_1 2362; PPC64LE-NEXT: # %bb.2: 2363; PPC64LE-NEXT: lwsync 2364; PPC64LE-NEXT: mr 3, 5 2365; PPC64LE-NEXT: blr 2366 %ret = atomicrmw add ptr %ptr, i32 %val acq_rel 2367 ret i32 %ret 2368} 2369 2370define i32 @test154(ptr %ptr, i32 %val) { 2371; PPC64LE-LABEL: test154: 2372; PPC64LE: # %bb.0: 2373; PPC64LE-NEXT: sync 2374; PPC64LE-NEXT: .LBB154_1: 2375; PPC64LE-NEXT: lwarx 5, 0, 3 2376; PPC64LE-NEXT: add 6, 4, 5 2377; PPC64LE-NEXT: stwcx. 6, 0, 3 2378; PPC64LE-NEXT: bne 0, .LBB154_1 2379; PPC64LE-NEXT: # %bb.2: 2380; PPC64LE-NEXT: lwsync 2381; PPC64LE-NEXT: mr 3, 5 2382; PPC64LE-NEXT: blr 2383 %ret = atomicrmw add ptr %ptr, i32 %val seq_cst 2384 ret i32 %ret 2385} 2386 2387define i64 @test155(ptr %ptr, i64 %val) { 2388; PPC64LE-LABEL: test155: 2389; PPC64LE: # %bb.0: 2390; PPC64LE-NEXT: .LBB155_1: 2391; PPC64LE-NEXT: ldarx 5, 0, 3 2392; PPC64LE-NEXT: add 6, 4, 5 2393; PPC64LE-NEXT: stdcx. 6, 0, 3 2394; PPC64LE-NEXT: bne 0, .LBB155_1 2395; PPC64LE-NEXT: # %bb.2: 2396; PPC64LE-NEXT: mr 3, 5 2397; PPC64LE-NEXT: blr 2398 %ret = atomicrmw add ptr %ptr, i64 %val monotonic 2399 ret i64 %ret 2400} 2401 2402define i64 @test156(ptr %ptr, i64 %val) { 2403; PPC64LE-LABEL: test156: 2404; PPC64LE: # %bb.0: 2405; PPC64LE-NEXT: mr 5, 3 2406; PPC64LE-NEXT: .LBB156_1: 2407; PPC64LE-NEXT: ldarx 3, 0, 5 2408; PPC64LE-NEXT: add 6, 4, 3 2409; PPC64LE-NEXT: stdcx. 6, 0, 5 2410; PPC64LE-NEXT: bne 0, .LBB156_1 2411; PPC64LE-NEXT: # %bb.2: 2412; PPC64LE-NEXT: lwsync 2413; PPC64LE-NEXT: blr 2414 %ret = atomicrmw add ptr %ptr, i64 %val acquire 2415 ret i64 %ret 2416} 2417 2418define i64 @test157(ptr %ptr, i64 %val) { 2419; PPC64LE-LABEL: test157: 2420; PPC64LE: # %bb.0: 2421; PPC64LE-NEXT: lwsync 2422; PPC64LE-NEXT: .LBB157_1: 2423; PPC64LE-NEXT: ldarx 5, 0, 3 2424; PPC64LE-NEXT: add 6, 4, 5 2425; PPC64LE-NEXT: stdcx. 6, 0, 3 2426; PPC64LE-NEXT: bne 0, .LBB157_1 2427; PPC64LE-NEXT: # %bb.2: 2428; PPC64LE-NEXT: mr 3, 5 2429; PPC64LE-NEXT: blr 2430 %ret = atomicrmw add ptr %ptr, i64 %val release 2431 ret i64 %ret 2432} 2433 2434define i64 @test158(ptr %ptr, i64 %val) { 2435; PPC64LE-LABEL: test158: 2436; PPC64LE: # %bb.0: 2437; PPC64LE-NEXT: lwsync 2438; PPC64LE-NEXT: .LBB158_1: 2439; PPC64LE-NEXT: ldarx 5, 0, 3 2440; PPC64LE-NEXT: add 6, 4, 5 2441; PPC64LE-NEXT: stdcx. 6, 0, 3 2442; PPC64LE-NEXT: bne 0, .LBB158_1 2443; PPC64LE-NEXT: # %bb.2: 2444; PPC64LE-NEXT: lwsync 2445; PPC64LE-NEXT: mr 3, 5 2446; PPC64LE-NEXT: blr 2447 %ret = atomicrmw add ptr %ptr, i64 %val acq_rel 2448 ret i64 %ret 2449} 2450 2451define i64 @test159(ptr %ptr, i64 %val) { 2452; PPC64LE-LABEL: test159: 2453; PPC64LE: # %bb.0: 2454; PPC64LE-NEXT: sync 2455; PPC64LE-NEXT: .LBB159_1: 2456; PPC64LE-NEXT: ldarx 5, 0, 3 2457; PPC64LE-NEXT: add 6, 4, 5 2458; PPC64LE-NEXT: stdcx. 6, 0, 3 2459; PPC64LE-NEXT: bne 0, .LBB159_1 2460; PPC64LE-NEXT: # %bb.2: 2461; PPC64LE-NEXT: lwsync 2462; PPC64LE-NEXT: mr 3, 5 2463; PPC64LE-NEXT: blr 2464 %ret = atomicrmw add ptr %ptr, i64 %val seq_cst 2465 ret i64 %ret 2466} 2467 2468define i8 @test160(ptr %ptr, i8 %val) { 2469; PPC64LE-LABEL: test160: 2470; PPC64LE: # %bb.0: 2471; PPC64LE-NEXT: .LBB160_1: 2472; PPC64LE-NEXT: lbarx 5, 0, 3 2473; PPC64LE-NEXT: sub 6, 5, 4 2474; PPC64LE-NEXT: stbcx. 6, 0, 3 2475; PPC64LE-NEXT: bne 0, .LBB160_1 2476; PPC64LE-NEXT: # %bb.2: 2477; PPC64LE-NEXT: mr 3, 5 2478; PPC64LE-NEXT: blr 2479 %ret = atomicrmw sub ptr %ptr, i8 %val monotonic 2480 ret i8 %ret 2481} 2482 2483define i8 @test161(ptr %ptr, i8 %val) { 2484; PPC64LE-LABEL: test161: 2485; PPC64LE: # %bb.0: 2486; PPC64LE-NEXT: mr 5, 3 2487; PPC64LE-NEXT: .LBB161_1: 2488; PPC64LE-NEXT: lbarx 3, 0, 5 2489; PPC64LE-NEXT: sub 6, 3, 4 2490; PPC64LE-NEXT: stbcx. 6, 0, 5 2491; PPC64LE-NEXT: bne 0, .LBB161_1 2492; PPC64LE-NEXT: # %bb.2: 2493; PPC64LE-NEXT: lwsync 2494; PPC64LE-NEXT: blr 2495 %ret = atomicrmw sub ptr %ptr, i8 %val acquire 2496 ret i8 %ret 2497} 2498 2499define i8 @test162(ptr %ptr, i8 %val) { 2500; PPC64LE-LABEL: test162: 2501; PPC64LE: # %bb.0: 2502; PPC64LE-NEXT: lwsync 2503; PPC64LE-NEXT: .LBB162_1: 2504; PPC64LE-NEXT: lbarx 5, 0, 3 2505; PPC64LE-NEXT: sub 6, 5, 4 2506; PPC64LE-NEXT: stbcx. 6, 0, 3 2507; PPC64LE-NEXT: bne 0, .LBB162_1 2508; PPC64LE-NEXT: # %bb.2: 2509; PPC64LE-NEXT: mr 3, 5 2510; PPC64LE-NEXT: blr 2511 %ret = atomicrmw sub ptr %ptr, i8 %val release 2512 ret i8 %ret 2513} 2514 2515define i8 @test163(ptr %ptr, i8 %val) { 2516; PPC64LE-LABEL: test163: 2517; PPC64LE: # %bb.0: 2518; PPC64LE-NEXT: lwsync 2519; PPC64LE-NEXT: .LBB163_1: 2520; PPC64LE-NEXT: lbarx 5, 0, 3 2521; PPC64LE-NEXT: sub 6, 5, 4 2522; PPC64LE-NEXT: stbcx. 6, 0, 3 2523; PPC64LE-NEXT: bne 0, .LBB163_1 2524; PPC64LE-NEXT: # %bb.2: 2525; PPC64LE-NEXT: lwsync 2526; PPC64LE-NEXT: mr 3, 5 2527; PPC64LE-NEXT: blr 2528 %ret = atomicrmw sub ptr %ptr, i8 %val acq_rel 2529 ret i8 %ret 2530} 2531 2532define i8 @test164(ptr %ptr, i8 %val) { 2533; PPC64LE-LABEL: test164: 2534; PPC64LE: # %bb.0: 2535; PPC64LE-NEXT: sync 2536; PPC64LE-NEXT: .LBB164_1: 2537; PPC64LE-NEXT: lbarx 5, 0, 3 2538; PPC64LE-NEXT: sub 6, 5, 4 2539; PPC64LE-NEXT: stbcx. 6, 0, 3 2540; PPC64LE-NEXT: bne 0, .LBB164_1 2541; PPC64LE-NEXT: # %bb.2: 2542; PPC64LE-NEXT: lwsync 2543; PPC64LE-NEXT: mr 3, 5 2544; PPC64LE-NEXT: blr 2545 %ret = atomicrmw sub ptr %ptr, i8 %val seq_cst 2546 ret i8 %ret 2547} 2548 2549define i16 @test165(ptr %ptr, i16 %val) { 2550; PPC64LE-LABEL: test165: 2551; PPC64LE: # %bb.0: 2552; PPC64LE-NEXT: .LBB165_1: 2553; PPC64LE-NEXT: lharx 5, 0, 3 2554; PPC64LE-NEXT: sub 6, 5, 4 2555; PPC64LE-NEXT: sthcx. 6, 0, 3 2556; PPC64LE-NEXT: bne 0, .LBB165_1 2557; PPC64LE-NEXT: # %bb.2: 2558; PPC64LE-NEXT: mr 3, 5 2559; PPC64LE-NEXT: blr 2560 %ret = atomicrmw sub ptr %ptr, i16 %val monotonic 2561 ret i16 %ret 2562} 2563 2564define i16 @test166(ptr %ptr, i16 %val) { 2565; PPC64LE-LABEL: test166: 2566; PPC64LE: # %bb.0: 2567; PPC64LE-NEXT: mr 5, 3 2568; PPC64LE-NEXT: .LBB166_1: 2569; PPC64LE-NEXT: lharx 3, 0, 5 2570; PPC64LE-NEXT: sub 6, 3, 4 2571; PPC64LE-NEXT: sthcx. 6, 0, 5 2572; PPC64LE-NEXT: bne 0, .LBB166_1 2573; PPC64LE-NEXT: # %bb.2: 2574; PPC64LE-NEXT: lwsync 2575; PPC64LE-NEXT: blr 2576 %ret = atomicrmw sub ptr %ptr, i16 %val acquire 2577 ret i16 %ret 2578} 2579 2580define i16 @test167(ptr %ptr, i16 %val) { 2581; PPC64LE-LABEL: test167: 2582; PPC64LE: # %bb.0: 2583; PPC64LE-NEXT: lwsync 2584; PPC64LE-NEXT: .LBB167_1: 2585; PPC64LE-NEXT: lharx 5, 0, 3 2586; PPC64LE-NEXT: sub 6, 5, 4 2587; PPC64LE-NEXT: sthcx. 6, 0, 3 2588; PPC64LE-NEXT: bne 0, .LBB167_1 2589; PPC64LE-NEXT: # %bb.2: 2590; PPC64LE-NEXT: mr 3, 5 2591; PPC64LE-NEXT: blr 2592 %ret = atomicrmw sub ptr %ptr, i16 %val release 2593 ret i16 %ret 2594} 2595 2596define i16 @test168(ptr %ptr, i16 %val) { 2597; PPC64LE-LABEL: test168: 2598; PPC64LE: # %bb.0: 2599; PPC64LE-NEXT: lwsync 2600; PPC64LE-NEXT: .LBB168_1: 2601; PPC64LE-NEXT: lharx 5, 0, 3 2602; PPC64LE-NEXT: sub 6, 5, 4 2603; PPC64LE-NEXT: sthcx. 6, 0, 3 2604; PPC64LE-NEXT: bne 0, .LBB168_1 2605; PPC64LE-NEXT: # %bb.2: 2606; PPC64LE-NEXT: lwsync 2607; PPC64LE-NEXT: mr 3, 5 2608; PPC64LE-NEXT: blr 2609 %ret = atomicrmw sub ptr %ptr, i16 %val acq_rel 2610 ret i16 %ret 2611} 2612 2613define i16 @test169(ptr %ptr, i16 %val) { 2614; PPC64LE-LABEL: test169: 2615; PPC64LE: # %bb.0: 2616; PPC64LE-NEXT: sync 2617; PPC64LE-NEXT: .LBB169_1: 2618; PPC64LE-NEXT: lharx 5, 0, 3 2619; PPC64LE-NEXT: sub 6, 5, 4 2620; PPC64LE-NEXT: sthcx. 6, 0, 3 2621; PPC64LE-NEXT: bne 0, .LBB169_1 2622; PPC64LE-NEXT: # %bb.2: 2623; PPC64LE-NEXT: lwsync 2624; PPC64LE-NEXT: mr 3, 5 2625; PPC64LE-NEXT: blr 2626 %ret = atomicrmw sub ptr %ptr, i16 %val seq_cst 2627 ret i16 %ret 2628} 2629 2630define i32 @test170(ptr %ptr, i32 %val) { 2631; PPC64LE-LABEL: test170: 2632; PPC64LE: # %bb.0: 2633; PPC64LE-NEXT: .LBB170_1: 2634; PPC64LE-NEXT: lwarx 5, 0, 3 2635; PPC64LE-NEXT: sub 6, 5, 4 2636; PPC64LE-NEXT: stwcx. 6, 0, 3 2637; PPC64LE-NEXT: bne 0, .LBB170_1 2638; PPC64LE-NEXT: # %bb.2: 2639; PPC64LE-NEXT: mr 3, 5 2640; PPC64LE-NEXT: blr 2641 %ret = atomicrmw sub ptr %ptr, i32 %val monotonic 2642 ret i32 %ret 2643} 2644 2645define i32 @test171(ptr %ptr, i32 %val) { 2646; PPC64LE-LABEL: test171: 2647; PPC64LE: # %bb.0: 2648; PPC64LE-NEXT: mr 5, 3 2649; PPC64LE-NEXT: .LBB171_1: 2650; PPC64LE-NEXT: lwarx 3, 0, 5 2651; PPC64LE-NEXT: sub 6, 3, 4 2652; PPC64LE-NEXT: stwcx. 6, 0, 5 2653; PPC64LE-NEXT: bne 0, .LBB171_1 2654; PPC64LE-NEXT: # %bb.2: 2655; PPC64LE-NEXT: lwsync 2656; PPC64LE-NEXT: blr 2657 %ret = atomicrmw sub ptr %ptr, i32 %val acquire 2658 ret i32 %ret 2659} 2660 2661define i32 @test172(ptr %ptr, i32 %val) { 2662; PPC64LE-LABEL: test172: 2663; PPC64LE: # %bb.0: 2664; PPC64LE-NEXT: lwsync 2665; PPC64LE-NEXT: .LBB172_1: 2666; PPC64LE-NEXT: lwarx 5, 0, 3 2667; PPC64LE-NEXT: sub 6, 5, 4 2668; PPC64LE-NEXT: stwcx. 6, 0, 3 2669; PPC64LE-NEXT: bne 0, .LBB172_1 2670; PPC64LE-NEXT: # %bb.2: 2671; PPC64LE-NEXT: mr 3, 5 2672; PPC64LE-NEXT: blr 2673 %ret = atomicrmw sub ptr %ptr, i32 %val release 2674 ret i32 %ret 2675} 2676 2677define i32 @test173(ptr %ptr, i32 %val) { 2678; PPC64LE-LABEL: test173: 2679; PPC64LE: # %bb.0: 2680; PPC64LE-NEXT: lwsync 2681; PPC64LE-NEXT: .LBB173_1: 2682; PPC64LE-NEXT: lwarx 5, 0, 3 2683; PPC64LE-NEXT: sub 6, 5, 4 2684; PPC64LE-NEXT: stwcx. 6, 0, 3 2685; PPC64LE-NEXT: bne 0, .LBB173_1 2686; PPC64LE-NEXT: # %bb.2: 2687; PPC64LE-NEXT: lwsync 2688; PPC64LE-NEXT: mr 3, 5 2689; PPC64LE-NEXT: blr 2690 %ret = atomicrmw sub ptr %ptr, i32 %val acq_rel 2691 ret i32 %ret 2692} 2693 2694define i32 @test174(ptr %ptr, i32 %val) { 2695; PPC64LE-LABEL: test174: 2696; PPC64LE: # %bb.0: 2697; PPC64LE-NEXT: sync 2698; PPC64LE-NEXT: .LBB174_1: 2699; PPC64LE-NEXT: lwarx 5, 0, 3 2700; PPC64LE-NEXT: sub 6, 5, 4 2701; PPC64LE-NEXT: stwcx. 6, 0, 3 2702; PPC64LE-NEXT: bne 0, .LBB174_1 2703; PPC64LE-NEXT: # %bb.2: 2704; PPC64LE-NEXT: lwsync 2705; PPC64LE-NEXT: mr 3, 5 2706; PPC64LE-NEXT: blr 2707 %ret = atomicrmw sub ptr %ptr, i32 %val seq_cst 2708 ret i32 %ret 2709} 2710 2711define i64 @test175(ptr %ptr, i64 %val) { 2712; PPC64LE-LABEL: test175: 2713; PPC64LE: # %bb.0: 2714; PPC64LE-NEXT: .LBB175_1: 2715; PPC64LE-NEXT: ldarx 5, 0, 3 2716; PPC64LE-NEXT: sub 6, 5, 4 2717; PPC64LE-NEXT: stdcx. 6, 0, 3 2718; PPC64LE-NEXT: bne 0, .LBB175_1 2719; PPC64LE-NEXT: # %bb.2: 2720; PPC64LE-NEXT: mr 3, 5 2721; PPC64LE-NEXT: blr 2722 %ret = atomicrmw sub ptr %ptr, i64 %val monotonic 2723 ret i64 %ret 2724} 2725 2726define i64 @test176(ptr %ptr, i64 %val) { 2727; PPC64LE-LABEL: test176: 2728; PPC64LE: # %bb.0: 2729; PPC64LE-NEXT: mr 5, 3 2730; PPC64LE-NEXT: .LBB176_1: 2731; PPC64LE-NEXT: ldarx 3, 0, 5 2732; PPC64LE-NEXT: sub 6, 3, 4 2733; PPC64LE-NEXT: stdcx. 6, 0, 5 2734; PPC64LE-NEXT: bne 0, .LBB176_1 2735; PPC64LE-NEXT: # %bb.2: 2736; PPC64LE-NEXT: lwsync 2737; PPC64LE-NEXT: blr 2738 %ret = atomicrmw sub ptr %ptr, i64 %val acquire 2739 ret i64 %ret 2740} 2741 2742define i64 @test177(ptr %ptr, i64 %val) { 2743; PPC64LE-LABEL: test177: 2744; PPC64LE: # %bb.0: 2745; PPC64LE-NEXT: lwsync 2746; PPC64LE-NEXT: .LBB177_1: 2747; PPC64LE-NEXT: ldarx 5, 0, 3 2748; PPC64LE-NEXT: sub 6, 5, 4 2749; PPC64LE-NEXT: stdcx. 6, 0, 3 2750; PPC64LE-NEXT: bne 0, .LBB177_1 2751; PPC64LE-NEXT: # %bb.2: 2752; PPC64LE-NEXT: mr 3, 5 2753; PPC64LE-NEXT: blr 2754 %ret = atomicrmw sub ptr %ptr, i64 %val release 2755 ret i64 %ret 2756} 2757 2758define i64 @test178(ptr %ptr, i64 %val) { 2759; PPC64LE-LABEL: test178: 2760; PPC64LE: # %bb.0: 2761; PPC64LE-NEXT: lwsync 2762; PPC64LE-NEXT: .LBB178_1: 2763; PPC64LE-NEXT: ldarx 5, 0, 3 2764; PPC64LE-NEXT: sub 6, 5, 4 2765; PPC64LE-NEXT: stdcx. 6, 0, 3 2766; PPC64LE-NEXT: bne 0, .LBB178_1 2767; PPC64LE-NEXT: # %bb.2: 2768; PPC64LE-NEXT: lwsync 2769; PPC64LE-NEXT: mr 3, 5 2770; PPC64LE-NEXT: blr 2771 %ret = atomicrmw sub ptr %ptr, i64 %val acq_rel 2772 ret i64 %ret 2773} 2774 2775define i64 @test179(ptr %ptr, i64 %val) { 2776; PPC64LE-LABEL: test179: 2777; PPC64LE: # %bb.0: 2778; PPC64LE-NEXT: sync 2779; PPC64LE-NEXT: .LBB179_1: 2780; PPC64LE-NEXT: ldarx 5, 0, 3 2781; PPC64LE-NEXT: sub 6, 5, 4 2782; PPC64LE-NEXT: stdcx. 6, 0, 3 2783; PPC64LE-NEXT: bne 0, .LBB179_1 2784; PPC64LE-NEXT: # %bb.2: 2785; PPC64LE-NEXT: lwsync 2786; PPC64LE-NEXT: mr 3, 5 2787; PPC64LE-NEXT: blr 2788 %ret = atomicrmw sub ptr %ptr, i64 %val seq_cst 2789 ret i64 %ret 2790} 2791 2792define i8 @test180(ptr %ptr, i8 %val) { 2793; PPC64LE-LABEL: test180: 2794; PPC64LE: # %bb.0: 2795; PPC64LE-NEXT: .LBB180_1: 2796; PPC64LE-NEXT: lbarx 5, 0, 3 2797; PPC64LE-NEXT: and 6, 4, 5 2798; PPC64LE-NEXT: stbcx. 6, 0, 3 2799; PPC64LE-NEXT: bne 0, .LBB180_1 2800; PPC64LE-NEXT: # %bb.2: 2801; PPC64LE-NEXT: mr 3, 5 2802; PPC64LE-NEXT: blr 2803 %ret = atomicrmw and ptr %ptr, i8 %val monotonic 2804 ret i8 %ret 2805} 2806 2807define i8 @test181(ptr %ptr, i8 %val) { 2808; PPC64LE-LABEL: test181: 2809; PPC64LE: # %bb.0: 2810; PPC64LE-NEXT: mr 5, 3 2811; PPC64LE-NEXT: .LBB181_1: 2812; PPC64LE-NEXT: lbarx 3, 0, 5 2813; PPC64LE-NEXT: and 6, 4, 3 2814; PPC64LE-NEXT: stbcx. 6, 0, 5 2815; PPC64LE-NEXT: bne 0, .LBB181_1 2816; PPC64LE-NEXT: # %bb.2: 2817; PPC64LE-NEXT: lwsync 2818; PPC64LE-NEXT: blr 2819 %ret = atomicrmw and ptr %ptr, i8 %val acquire 2820 ret i8 %ret 2821} 2822 2823define i8 @test182(ptr %ptr, i8 %val) { 2824; PPC64LE-LABEL: test182: 2825; PPC64LE: # %bb.0: 2826; PPC64LE-NEXT: lwsync 2827; PPC64LE-NEXT: .LBB182_1: 2828; PPC64LE-NEXT: lbarx 5, 0, 3 2829; PPC64LE-NEXT: and 6, 4, 5 2830; PPC64LE-NEXT: stbcx. 6, 0, 3 2831; PPC64LE-NEXT: bne 0, .LBB182_1 2832; PPC64LE-NEXT: # %bb.2: 2833; PPC64LE-NEXT: mr 3, 5 2834; PPC64LE-NEXT: blr 2835 %ret = atomicrmw and ptr %ptr, i8 %val release 2836 ret i8 %ret 2837} 2838 2839define i8 @test183(ptr %ptr, i8 %val) { 2840; PPC64LE-LABEL: test183: 2841; PPC64LE: # %bb.0: 2842; PPC64LE-NEXT: lwsync 2843; PPC64LE-NEXT: .LBB183_1: 2844; PPC64LE-NEXT: lbarx 5, 0, 3 2845; PPC64LE-NEXT: and 6, 4, 5 2846; PPC64LE-NEXT: stbcx. 6, 0, 3 2847; PPC64LE-NEXT: bne 0, .LBB183_1 2848; PPC64LE-NEXT: # %bb.2: 2849; PPC64LE-NEXT: lwsync 2850; PPC64LE-NEXT: mr 3, 5 2851; PPC64LE-NEXT: blr 2852 %ret = atomicrmw and ptr %ptr, i8 %val acq_rel 2853 ret i8 %ret 2854} 2855 2856define i8 @test184(ptr %ptr, i8 %val) { 2857; PPC64LE-LABEL: test184: 2858; PPC64LE: # %bb.0: 2859; PPC64LE-NEXT: sync 2860; PPC64LE-NEXT: .LBB184_1: 2861; PPC64LE-NEXT: lbarx 5, 0, 3 2862; PPC64LE-NEXT: and 6, 4, 5 2863; PPC64LE-NEXT: stbcx. 6, 0, 3 2864; PPC64LE-NEXT: bne 0, .LBB184_1 2865; PPC64LE-NEXT: # %bb.2: 2866; PPC64LE-NEXT: lwsync 2867; PPC64LE-NEXT: mr 3, 5 2868; PPC64LE-NEXT: blr 2869 %ret = atomicrmw and ptr %ptr, i8 %val seq_cst 2870 ret i8 %ret 2871} 2872 2873define i16 @test185(ptr %ptr, i16 %val) { 2874; PPC64LE-LABEL: test185: 2875; PPC64LE: # %bb.0: 2876; PPC64LE-NEXT: .LBB185_1: 2877; PPC64LE-NEXT: lharx 5, 0, 3 2878; PPC64LE-NEXT: and 6, 4, 5 2879; PPC64LE-NEXT: sthcx. 6, 0, 3 2880; PPC64LE-NEXT: bne 0, .LBB185_1 2881; PPC64LE-NEXT: # %bb.2: 2882; PPC64LE-NEXT: mr 3, 5 2883; PPC64LE-NEXT: blr 2884 %ret = atomicrmw and ptr %ptr, i16 %val monotonic 2885 ret i16 %ret 2886} 2887 2888define i16 @test186(ptr %ptr, i16 %val) { 2889; PPC64LE-LABEL: test186: 2890; PPC64LE: # %bb.0: 2891; PPC64LE-NEXT: mr 5, 3 2892; PPC64LE-NEXT: .LBB186_1: 2893; PPC64LE-NEXT: lharx 3, 0, 5 2894; PPC64LE-NEXT: and 6, 4, 3 2895; PPC64LE-NEXT: sthcx. 6, 0, 5 2896; PPC64LE-NEXT: bne 0, .LBB186_1 2897; PPC64LE-NEXT: # %bb.2: 2898; PPC64LE-NEXT: lwsync 2899; PPC64LE-NEXT: blr 2900 %ret = atomicrmw and ptr %ptr, i16 %val acquire 2901 ret i16 %ret 2902} 2903 2904define i16 @test187(ptr %ptr, i16 %val) { 2905; PPC64LE-LABEL: test187: 2906; PPC64LE: # %bb.0: 2907; PPC64LE-NEXT: lwsync 2908; PPC64LE-NEXT: .LBB187_1: 2909; PPC64LE-NEXT: lharx 5, 0, 3 2910; PPC64LE-NEXT: and 6, 4, 5 2911; PPC64LE-NEXT: sthcx. 6, 0, 3 2912; PPC64LE-NEXT: bne 0, .LBB187_1 2913; PPC64LE-NEXT: # %bb.2: 2914; PPC64LE-NEXT: mr 3, 5 2915; PPC64LE-NEXT: blr 2916 %ret = atomicrmw and ptr %ptr, i16 %val release 2917 ret i16 %ret 2918} 2919 2920define i16 @test188(ptr %ptr, i16 %val) { 2921; PPC64LE-LABEL: test188: 2922; PPC64LE: # %bb.0: 2923; PPC64LE-NEXT: lwsync 2924; PPC64LE-NEXT: .LBB188_1: 2925; PPC64LE-NEXT: lharx 5, 0, 3 2926; PPC64LE-NEXT: and 6, 4, 5 2927; PPC64LE-NEXT: sthcx. 6, 0, 3 2928; PPC64LE-NEXT: bne 0, .LBB188_1 2929; PPC64LE-NEXT: # %bb.2: 2930; PPC64LE-NEXT: lwsync 2931; PPC64LE-NEXT: mr 3, 5 2932; PPC64LE-NEXT: blr 2933 %ret = atomicrmw and ptr %ptr, i16 %val acq_rel 2934 ret i16 %ret 2935} 2936 2937define i16 @test189(ptr %ptr, i16 %val) { 2938; PPC64LE-LABEL: test189: 2939; PPC64LE: # %bb.0: 2940; PPC64LE-NEXT: sync 2941; PPC64LE-NEXT: .LBB189_1: 2942; PPC64LE-NEXT: lharx 5, 0, 3 2943; PPC64LE-NEXT: and 6, 4, 5 2944; PPC64LE-NEXT: sthcx. 6, 0, 3 2945; PPC64LE-NEXT: bne 0, .LBB189_1 2946; PPC64LE-NEXT: # %bb.2: 2947; PPC64LE-NEXT: lwsync 2948; PPC64LE-NEXT: mr 3, 5 2949; PPC64LE-NEXT: blr 2950 %ret = atomicrmw and ptr %ptr, i16 %val seq_cst 2951 ret i16 %ret 2952} 2953 2954define i32 @test190(ptr %ptr, i32 %val) { 2955; PPC64LE-LABEL: test190: 2956; PPC64LE: # %bb.0: 2957; PPC64LE-NEXT: .LBB190_1: 2958; PPC64LE-NEXT: lwarx 5, 0, 3 2959; PPC64LE-NEXT: and 6, 4, 5 2960; PPC64LE-NEXT: stwcx. 6, 0, 3 2961; PPC64LE-NEXT: bne 0, .LBB190_1 2962; PPC64LE-NEXT: # %bb.2: 2963; PPC64LE-NEXT: mr 3, 5 2964; PPC64LE-NEXT: blr 2965 %ret = atomicrmw and ptr %ptr, i32 %val monotonic 2966 ret i32 %ret 2967} 2968 2969define i32 @test191(ptr %ptr, i32 %val) { 2970; PPC64LE-LABEL: test191: 2971; PPC64LE: # %bb.0: 2972; PPC64LE-NEXT: mr 5, 3 2973; PPC64LE-NEXT: .LBB191_1: 2974; PPC64LE-NEXT: lwarx 3, 0, 5 2975; PPC64LE-NEXT: and 6, 4, 3 2976; PPC64LE-NEXT: stwcx. 6, 0, 5 2977; PPC64LE-NEXT: bne 0, .LBB191_1 2978; PPC64LE-NEXT: # %bb.2: 2979; PPC64LE-NEXT: lwsync 2980; PPC64LE-NEXT: blr 2981 %ret = atomicrmw and ptr %ptr, i32 %val acquire 2982 ret i32 %ret 2983} 2984 2985define i32 @test192(ptr %ptr, i32 %val) { 2986; PPC64LE-LABEL: test192: 2987; PPC64LE: # %bb.0: 2988; PPC64LE-NEXT: lwsync 2989; PPC64LE-NEXT: .LBB192_1: 2990; PPC64LE-NEXT: lwarx 5, 0, 3 2991; PPC64LE-NEXT: and 6, 4, 5 2992; PPC64LE-NEXT: stwcx. 6, 0, 3 2993; PPC64LE-NEXT: bne 0, .LBB192_1 2994; PPC64LE-NEXT: # %bb.2: 2995; PPC64LE-NEXT: mr 3, 5 2996; PPC64LE-NEXT: blr 2997 %ret = atomicrmw and ptr %ptr, i32 %val release 2998 ret i32 %ret 2999} 3000 3001define i32 @test193(ptr %ptr, i32 %val) { 3002; PPC64LE-LABEL: test193: 3003; PPC64LE: # %bb.0: 3004; PPC64LE-NEXT: lwsync 3005; PPC64LE-NEXT: .LBB193_1: 3006; PPC64LE-NEXT: lwarx 5, 0, 3 3007; PPC64LE-NEXT: and 6, 4, 5 3008; PPC64LE-NEXT: stwcx. 6, 0, 3 3009; PPC64LE-NEXT: bne 0, .LBB193_1 3010; PPC64LE-NEXT: # %bb.2: 3011; PPC64LE-NEXT: lwsync 3012; PPC64LE-NEXT: mr 3, 5 3013; PPC64LE-NEXT: blr 3014 %ret = atomicrmw and ptr %ptr, i32 %val acq_rel 3015 ret i32 %ret 3016} 3017 3018define i32 @test194(ptr %ptr, i32 %val) { 3019; PPC64LE-LABEL: test194: 3020; PPC64LE: # %bb.0: 3021; PPC64LE-NEXT: sync 3022; PPC64LE-NEXT: .LBB194_1: 3023; PPC64LE-NEXT: lwarx 5, 0, 3 3024; PPC64LE-NEXT: and 6, 4, 5 3025; PPC64LE-NEXT: stwcx. 6, 0, 3 3026; PPC64LE-NEXT: bne 0, .LBB194_1 3027; PPC64LE-NEXT: # %bb.2: 3028; PPC64LE-NEXT: lwsync 3029; PPC64LE-NEXT: mr 3, 5 3030; PPC64LE-NEXT: blr 3031 %ret = atomicrmw and ptr %ptr, i32 %val seq_cst 3032 ret i32 %ret 3033} 3034 3035define i64 @test195(ptr %ptr, i64 %val) { 3036; PPC64LE-LABEL: test195: 3037; PPC64LE: # %bb.0: 3038; PPC64LE-NEXT: .LBB195_1: 3039; PPC64LE-NEXT: ldarx 5, 0, 3 3040; PPC64LE-NEXT: and 6, 4, 5 3041; PPC64LE-NEXT: stdcx. 6, 0, 3 3042; PPC64LE-NEXT: bne 0, .LBB195_1 3043; PPC64LE-NEXT: # %bb.2: 3044; PPC64LE-NEXT: mr 3, 5 3045; PPC64LE-NEXT: blr 3046 %ret = atomicrmw and ptr %ptr, i64 %val monotonic 3047 ret i64 %ret 3048} 3049 3050define i64 @test196(ptr %ptr, i64 %val) { 3051; PPC64LE-LABEL: test196: 3052; PPC64LE: # %bb.0: 3053; PPC64LE-NEXT: mr 5, 3 3054; PPC64LE-NEXT: .LBB196_1: 3055; PPC64LE-NEXT: ldarx 3, 0, 5 3056; PPC64LE-NEXT: and 6, 4, 3 3057; PPC64LE-NEXT: stdcx. 6, 0, 5 3058; PPC64LE-NEXT: bne 0, .LBB196_1 3059; PPC64LE-NEXT: # %bb.2: 3060; PPC64LE-NEXT: lwsync 3061; PPC64LE-NEXT: blr 3062 %ret = atomicrmw and ptr %ptr, i64 %val acquire 3063 ret i64 %ret 3064} 3065 3066define i64 @test197(ptr %ptr, i64 %val) { 3067; PPC64LE-LABEL: test197: 3068; PPC64LE: # %bb.0: 3069; PPC64LE-NEXT: lwsync 3070; PPC64LE-NEXT: .LBB197_1: 3071; PPC64LE-NEXT: ldarx 5, 0, 3 3072; PPC64LE-NEXT: and 6, 4, 5 3073; PPC64LE-NEXT: stdcx. 6, 0, 3 3074; PPC64LE-NEXT: bne 0, .LBB197_1 3075; PPC64LE-NEXT: # %bb.2: 3076; PPC64LE-NEXT: mr 3, 5 3077; PPC64LE-NEXT: blr 3078 %ret = atomicrmw and ptr %ptr, i64 %val release 3079 ret i64 %ret 3080} 3081 3082define i64 @test198(ptr %ptr, i64 %val) { 3083; PPC64LE-LABEL: test198: 3084; PPC64LE: # %bb.0: 3085; PPC64LE-NEXT: lwsync 3086; PPC64LE-NEXT: .LBB198_1: 3087; PPC64LE-NEXT: ldarx 5, 0, 3 3088; PPC64LE-NEXT: and 6, 4, 5 3089; PPC64LE-NEXT: stdcx. 6, 0, 3 3090; PPC64LE-NEXT: bne 0, .LBB198_1 3091; PPC64LE-NEXT: # %bb.2: 3092; PPC64LE-NEXT: lwsync 3093; PPC64LE-NEXT: mr 3, 5 3094; PPC64LE-NEXT: blr 3095 %ret = atomicrmw and ptr %ptr, i64 %val acq_rel 3096 ret i64 %ret 3097} 3098 3099define i64 @test199(ptr %ptr, i64 %val) { 3100; PPC64LE-LABEL: test199: 3101; PPC64LE: # %bb.0: 3102; PPC64LE-NEXT: sync 3103; PPC64LE-NEXT: .LBB199_1: 3104; PPC64LE-NEXT: ldarx 5, 0, 3 3105; PPC64LE-NEXT: and 6, 4, 5 3106; PPC64LE-NEXT: stdcx. 6, 0, 3 3107; PPC64LE-NEXT: bne 0, .LBB199_1 3108; PPC64LE-NEXT: # %bb.2: 3109; PPC64LE-NEXT: lwsync 3110; PPC64LE-NEXT: mr 3, 5 3111; PPC64LE-NEXT: blr 3112 %ret = atomicrmw and ptr %ptr, i64 %val seq_cst 3113 ret i64 %ret 3114} 3115 3116define i8 @test200(ptr %ptr, i8 %val) { 3117; PPC64LE-LABEL: test200: 3118; PPC64LE: # %bb.0: 3119; PPC64LE-NEXT: .LBB200_1: 3120; PPC64LE-NEXT: lbarx 5, 0, 3 3121; PPC64LE-NEXT: nand 6, 4, 5 3122; PPC64LE-NEXT: stbcx. 6, 0, 3 3123; PPC64LE-NEXT: bne 0, .LBB200_1 3124; PPC64LE-NEXT: # %bb.2: 3125; PPC64LE-NEXT: mr 3, 5 3126; PPC64LE-NEXT: blr 3127 %ret = atomicrmw nand ptr %ptr, i8 %val monotonic 3128 ret i8 %ret 3129} 3130 3131define i8 @test201(ptr %ptr, i8 %val) { 3132; PPC64LE-LABEL: test201: 3133; PPC64LE: # %bb.0: 3134; PPC64LE-NEXT: mr 5, 3 3135; PPC64LE-NEXT: .LBB201_1: 3136; PPC64LE-NEXT: lbarx 3, 0, 5 3137; PPC64LE-NEXT: nand 6, 4, 3 3138; PPC64LE-NEXT: stbcx. 6, 0, 5 3139; PPC64LE-NEXT: bne 0, .LBB201_1 3140; PPC64LE-NEXT: # %bb.2: 3141; PPC64LE-NEXT: lwsync 3142; PPC64LE-NEXT: blr 3143 %ret = atomicrmw nand ptr %ptr, i8 %val acquire 3144 ret i8 %ret 3145} 3146 3147define i8 @test202(ptr %ptr, i8 %val) { 3148; PPC64LE-LABEL: test202: 3149; PPC64LE: # %bb.0: 3150; PPC64LE-NEXT: lwsync 3151; PPC64LE-NEXT: .LBB202_1: 3152; PPC64LE-NEXT: lbarx 5, 0, 3 3153; PPC64LE-NEXT: nand 6, 4, 5 3154; PPC64LE-NEXT: stbcx. 6, 0, 3 3155; PPC64LE-NEXT: bne 0, .LBB202_1 3156; PPC64LE-NEXT: # %bb.2: 3157; PPC64LE-NEXT: mr 3, 5 3158; PPC64LE-NEXT: blr 3159 %ret = atomicrmw nand ptr %ptr, i8 %val release 3160 ret i8 %ret 3161} 3162 3163define i8 @test203(ptr %ptr, i8 %val) { 3164; PPC64LE-LABEL: test203: 3165; PPC64LE: # %bb.0: 3166; PPC64LE-NEXT: lwsync 3167; PPC64LE-NEXT: .LBB203_1: 3168; PPC64LE-NEXT: lbarx 5, 0, 3 3169; PPC64LE-NEXT: nand 6, 4, 5 3170; PPC64LE-NEXT: stbcx. 6, 0, 3 3171; PPC64LE-NEXT: bne 0, .LBB203_1 3172; PPC64LE-NEXT: # %bb.2: 3173; PPC64LE-NEXT: lwsync 3174; PPC64LE-NEXT: mr 3, 5 3175; PPC64LE-NEXT: blr 3176 %ret = atomicrmw nand ptr %ptr, i8 %val acq_rel 3177 ret i8 %ret 3178} 3179 3180define i8 @test204(ptr %ptr, i8 %val) { 3181; PPC64LE-LABEL: test204: 3182; PPC64LE: # %bb.0: 3183; PPC64LE-NEXT: sync 3184; PPC64LE-NEXT: .LBB204_1: 3185; PPC64LE-NEXT: lbarx 5, 0, 3 3186; PPC64LE-NEXT: nand 6, 4, 5 3187; PPC64LE-NEXT: stbcx. 6, 0, 3 3188; PPC64LE-NEXT: bne 0, .LBB204_1 3189; PPC64LE-NEXT: # %bb.2: 3190; PPC64LE-NEXT: lwsync 3191; PPC64LE-NEXT: mr 3, 5 3192; PPC64LE-NEXT: blr 3193 %ret = atomicrmw nand ptr %ptr, i8 %val seq_cst 3194 ret i8 %ret 3195} 3196 3197define i16 @test205(ptr %ptr, i16 %val) { 3198; PPC64LE-LABEL: test205: 3199; PPC64LE: # %bb.0: 3200; PPC64LE-NEXT: .LBB205_1: 3201; PPC64LE-NEXT: lharx 5, 0, 3 3202; PPC64LE-NEXT: nand 6, 4, 5 3203; PPC64LE-NEXT: sthcx. 6, 0, 3 3204; PPC64LE-NEXT: bne 0, .LBB205_1 3205; PPC64LE-NEXT: # %bb.2: 3206; PPC64LE-NEXT: mr 3, 5 3207; PPC64LE-NEXT: blr 3208 %ret = atomicrmw nand ptr %ptr, i16 %val monotonic 3209 ret i16 %ret 3210} 3211 3212define i16 @test206(ptr %ptr, i16 %val) { 3213; PPC64LE-LABEL: test206: 3214; PPC64LE: # %bb.0: 3215; PPC64LE-NEXT: mr 5, 3 3216; PPC64LE-NEXT: .LBB206_1: 3217; PPC64LE-NEXT: lharx 3, 0, 5 3218; PPC64LE-NEXT: nand 6, 4, 3 3219; PPC64LE-NEXT: sthcx. 6, 0, 5 3220; PPC64LE-NEXT: bne 0, .LBB206_1 3221; PPC64LE-NEXT: # %bb.2: 3222; PPC64LE-NEXT: lwsync 3223; PPC64LE-NEXT: blr 3224 %ret = atomicrmw nand ptr %ptr, i16 %val acquire 3225 ret i16 %ret 3226} 3227 3228define i16 @test207(ptr %ptr, i16 %val) { 3229; PPC64LE-LABEL: test207: 3230; PPC64LE: # %bb.0: 3231; PPC64LE-NEXT: lwsync 3232; PPC64LE-NEXT: .LBB207_1: 3233; PPC64LE-NEXT: lharx 5, 0, 3 3234; PPC64LE-NEXT: nand 6, 4, 5 3235; PPC64LE-NEXT: sthcx. 6, 0, 3 3236; PPC64LE-NEXT: bne 0, .LBB207_1 3237; PPC64LE-NEXT: # %bb.2: 3238; PPC64LE-NEXT: mr 3, 5 3239; PPC64LE-NEXT: blr 3240 %ret = atomicrmw nand ptr %ptr, i16 %val release 3241 ret i16 %ret 3242} 3243 3244define i16 @test208(ptr %ptr, i16 %val) { 3245; PPC64LE-LABEL: test208: 3246; PPC64LE: # %bb.0: 3247; PPC64LE-NEXT: lwsync 3248; PPC64LE-NEXT: .LBB208_1: 3249; PPC64LE-NEXT: lharx 5, 0, 3 3250; PPC64LE-NEXT: nand 6, 4, 5 3251; PPC64LE-NEXT: sthcx. 6, 0, 3 3252; PPC64LE-NEXT: bne 0, .LBB208_1 3253; PPC64LE-NEXT: # %bb.2: 3254; PPC64LE-NEXT: lwsync 3255; PPC64LE-NEXT: mr 3, 5 3256; PPC64LE-NEXT: blr 3257 %ret = atomicrmw nand ptr %ptr, i16 %val acq_rel 3258 ret i16 %ret 3259} 3260 3261define i16 @test209(ptr %ptr, i16 %val) { 3262; PPC64LE-LABEL: test209: 3263; PPC64LE: # %bb.0: 3264; PPC64LE-NEXT: sync 3265; PPC64LE-NEXT: .LBB209_1: 3266; PPC64LE-NEXT: lharx 5, 0, 3 3267; PPC64LE-NEXT: nand 6, 4, 5 3268; PPC64LE-NEXT: sthcx. 6, 0, 3 3269; PPC64LE-NEXT: bne 0, .LBB209_1 3270; PPC64LE-NEXT: # %bb.2: 3271; PPC64LE-NEXT: lwsync 3272; PPC64LE-NEXT: mr 3, 5 3273; PPC64LE-NEXT: blr 3274 %ret = atomicrmw nand ptr %ptr, i16 %val seq_cst 3275 ret i16 %ret 3276} 3277 3278define i32 @test210(ptr %ptr, i32 %val) { 3279; PPC64LE-LABEL: test210: 3280; PPC64LE: # %bb.0: 3281; PPC64LE-NEXT: .LBB210_1: 3282; PPC64LE-NEXT: lwarx 5, 0, 3 3283; PPC64LE-NEXT: nand 6, 4, 5 3284; PPC64LE-NEXT: stwcx. 6, 0, 3 3285; PPC64LE-NEXT: bne 0, .LBB210_1 3286; PPC64LE-NEXT: # %bb.2: 3287; PPC64LE-NEXT: mr 3, 5 3288; PPC64LE-NEXT: blr 3289 %ret = atomicrmw nand ptr %ptr, i32 %val monotonic 3290 ret i32 %ret 3291} 3292 3293define i32 @test211(ptr %ptr, i32 %val) { 3294; PPC64LE-LABEL: test211: 3295; PPC64LE: # %bb.0: 3296; PPC64LE-NEXT: mr 5, 3 3297; PPC64LE-NEXT: .LBB211_1: 3298; PPC64LE-NEXT: lwarx 3, 0, 5 3299; PPC64LE-NEXT: nand 6, 4, 3 3300; PPC64LE-NEXT: stwcx. 6, 0, 5 3301; PPC64LE-NEXT: bne 0, .LBB211_1 3302; PPC64LE-NEXT: # %bb.2: 3303; PPC64LE-NEXT: lwsync 3304; PPC64LE-NEXT: blr 3305 %ret = atomicrmw nand ptr %ptr, i32 %val acquire 3306 ret i32 %ret 3307} 3308 3309define i32 @test212(ptr %ptr, i32 %val) { 3310; PPC64LE-LABEL: test212: 3311; PPC64LE: # %bb.0: 3312; PPC64LE-NEXT: lwsync 3313; PPC64LE-NEXT: .LBB212_1: 3314; PPC64LE-NEXT: lwarx 5, 0, 3 3315; PPC64LE-NEXT: nand 6, 4, 5 3316; PPC64LE-NEXT: stwcx. 6, 0, 3 3317; PPC64LE-NEXT: bne 0, .LBB212_1 3318; PPC64LE-NEXT: # %bb.2: 3319; PPC64LE-NEXT: mr 3, 5 3320; PPC64LE-NEXT: blr 3321 %ret = atomicrmw nand ptr %ptr, i32 %val release 3322 ret i32 %ret 3323} 3324 3325define i32 @test213(ptr %ptr, i32 %val) { 3326; PPC64LE-LABEL: test213: 3327; PPC64LE: # %bb.0: 3328; PPC64LE-NEXT: lwsync 3329; PPC64LE-NEXT: .LBB213_1: 3330; PPC64LE-NEXT: lwarx 5, 0, 3 3331; PPC64LE-NEXT: nand 6, 4, 5 3332; PPC64LE-NEXT: stwcx. 6, 0, 3 3333; PPC64LE-NEXT: bne 0, .LBB213_1 3334; PPC64LE-NEXT: # %bb.2: 3335; PPC64LE-NEXT: lwsync 3336; PPC64LE-NEXT: mr 3, 5 3337; PPC64LE-NEXT: blr 3338 %ret = atomicrmw nand ptr %ptr, i32 %val acq_rel 3339 ret i32 %ret 3340} 3341 3342define i32 @test214(ptr %ptr, i32 %val) { 3343; PPC64LE-LABEL: test214: 3344; PPC64LE: # %bb.0: 3345; PPC64LE-NEXT: sync 3346; PPC64LE-NEXT: .LBB214_1: 3347; PPC64LE-NEXT: lwarx 5, 0, 3 3348; PPC64LE-NEXT: nand 6, 4, 5 3349; PPC64LE-NEXT: stwcx. 6, 0, 3 3350; PPC64LE-NEXT: bne 0, .LBB214_1 3351; PPC64LE-NEXT: # %bb.2: 3352; PPC64LE-NEXT: lwsync 3353; PPC64LE-NEXT: mr 3, 5 3354; PPC64LE-NEXT: blr 3355 %ret = atomicrmw nand ptr %ptr, i32 %val seq_cst 3356 ret i32 %ret 3357} 3358 3359define i64 @test215(ptr %ptr, i64 %val) { 3360; PPC64LE-LABEL: test215: 3361; PPC64LE: # %bb.0: 3362; PPC64LE-NEXT: .LBB215_1: 3363; PPC64LE-NEXT: ldarx 5, 0, 3 3364; PPC64LE-NEXT: nand 6, 4, 5 3365; PPC64LE-NEXT: stdcx. 6, 0, 3 3366; PPC64LE-NEXT: bne 0, .LBB215_1 3367; PPC64LE-NEXT: # %bb.2: 3368; PPC64LE-NEXT: mr 3, 5 3369; PPC64LE-NEXT: blr 3370 %ret = atomicrmw nand ptr %ptr, i64 %val monotonic 3371 ret i64 %ret 3372} 3373 3374define i64 @test216(ptr %ptr, i64 %val) { 3375; PPC64LE-LABEL: test216: 3376; PPC64LE: # %bb.0: 3377; PPC64LE-NEXT: mr 5, 3 3378; PPC64LE-NEXT: .LBB216_1: 3379; PPC64LE-NEXT: ldarx 3, 0, 5 3380; PPC64LE-NEXT: nand 6, 4, 3 3381; PPC64LE-NEXT: stdcx. 6, 0, 5 3382; PPC64LE-NEXT: bne 0, .LBB216_1 3383; PPC64LE-NEXT: # %bb.2: 3384; PPC64LE-NEXT: lwsync 3385; PPC64LE-NEXT: blr 3386 %ret = atomicrmw nand ptr %ptr, i64 %val acquire 3387 ret i64 %ret 3388} 3389 3390define i64 @test217(ptr %ptr, i64 %val) { 3391; PPC64LE-LABEL: test217: 3392; PPC64LE: # %bb.0: 3393; PPC64LE-NEXT: lwsync 3394; PPC64LE-NEXT: .LBB217_1: 3395; PPC64LE-NEXT: ldarx 5, 0, 3 3396; PPC64LE-NEXT: nand 6, 4, 5 3397; PPC64LE-NEXT: stdcx. 6, 0, 3 3398; PPC64LE-NEXT: bne 0, .LBB217_1 3399; PPC64LE-NEXT: # %bb.2: 3400; PPC64LE-NEXT: mr 3, 5 3401; PPC64LE-NEXT: blr 3402 %ret = atomicrmw nand ptr %ptr, i64 %val release 3403 ret i64 %ret 3404} 3405 3406define i64 @test218(ptr %ptr, i64 %val) { 3407; PPC64LE-LABEL: test218: 3408; PPC64LE: # %bb.0: 3409; PPC64LE-NEXT: lwsync 3410; PPC64LE-NEXT: .LBB218_1: 3411; PPC64LE-NEXT: ldarx 5, 0, 3 3412; PPC64LE-NEXT: nand 6, 4, 5 3413; PPC64LE-NEXT: stdcx. 6, 0, 3 3414; PPC64LE-NEXT: bne 0, .LBB218_1 3415; PPC64LE-NEXT: # %bb.2: 3416; PPC64LE-NEXT: lwsync 3417; PPC64LE-NEXT: mr 3, 5 3418; PPC64LE-NEXT: blr 3419 %ret = atomicrmw nand ptr %ptr, i64 %val acq_rel 3420 ret i64 %ret 3421} 3422 3423define i64 @test219(ptr %ptr, i64 %val) { 3424; PPC64LE-LABEL: test219: 3425; PPC64LE: # %bb.0: 3426; PPC64LE-NEXT: sync 3427; PPC64LE-NEXT: .LBB219_1: 3428; PPC64LE-NEXT: ldarx 5, 0, 3 3429; PPC64LE-NEXT: nand 6, 4, 5 3430; PPC64LE-NEXT: stdcx. 6, 0, 3 3431; PPC64LE-NEXT: bne 0, .LBB219_1 3432; PPC64LE-NEXT: # %bb.2: 3433; PPC64LE-NEXT: lwsync 3434; PPC64LE-NEXT: mr 3, 5 3435; PPC64LE-NEXT: blr 3436 %ret = atomicrmw nand ptr %ptr, i64 %val seq_cst 3437 ret i64 %ret 3438} 3439 3440define i8 @test220(ptr %ptr, i8 %val) { 3441; PPC64LE-LABEL: test220: 3442; PPC64LE: # %bb.0: 3443; PPC64LE-NEXT: .LBB220_1: 3444; PPC64LE-NEXT: lbarx 5, 0, 3 3445; PPC64LE-NEXT: or 6, 4, 5 3446; PPC64LE-NEXT: stbcx. 6, 0, 3 3447; PPC64LE-NEXT: bne 0, .LBB220_1 3448; PPC64LE-NEXT: # %bb.2: 3449; PPC64LE-NEXT: mr 3, 5 3450; PPC64LE-NEXT: blr 3451 %ret = atomicrmw or ptr %ptr, i8 %val monotonic 3452 ret i8 %ret 3453} 3454 3455define i8 @test221(ptr %ptr, i8 %val) { 3456; PPC64LE-LABEL: test221: 3457; PPC64LE: # %bb.0: 3458; PPC64LE-NEXT: mr 5, 3 3459; PPC64LE-NEXT: .LBB221_1: 3460; PPC64LE-NEXT: lbarx 3, 0, 5 3461; PPC64LE-NEXT: or 6, 4, 3 3462; PPC64LE-NEXT: stbcx. 6, 0, 5 3463; PPC64LE-NEXT: bne 0, .LBB221_1 3464; PPC64LE-NEXT: # %bb.2: 3465; PPC64LE-NEXT: lwsync 3466; PPC64LE-NEXT: blr 3467 %ret = atomicrmw or ptr %ptr, i8 %val acquire 3468 ret i8 %ret 3469} 3470 3471define i8 @test222(ptr %ptr, i8 %val) { 3472; PPC64LE-LABEL: test222: 3473; PPC64LE: # %bb.0: 3474; PPC64LE-NEXT: lwsync 3475; PPC64LE-NEXT: .LBB222_1: 3476; PPC64LE-NEXT: lbarx 5, 0, 3 3477; PPC64LE-NEXT: or 6, 4, 5 3478; PPC64LE-NEXT: stbcx. 6, 0, 3 3479; PPC64LE-NEXT: bne 0, .LBB222_1 3480; PPC64LE-NEXT: # %bb.2: 3481; PPC64LE-NEXT: mr 3, 5 3482; PPC64LE-NEXT: blr 3483 %ret = atomicrmw or ptr %ptr, i8 %val release 3484 ret i8 %ret 3485} 3486 3487define i8 @test223(ptr %ptr, i8 %val) { 3488; PPC64LE-LABEL: test223: 3489; PPC64LE: # %bb.0: 3490; PPC64LE-NEXT: lwsync 3491; PPC64LE-NEXT: .LBB223_1: 3492; PPC64LE-NEXT: lbarx 5, 0, 3 3493; PPC64LE-NEXT: or 6, 4, 5 3494; PPC64LE-NEXT: stbcx. 6, 0, 3 3495; PPC64LE-NEXT: bne 0, .LBB223_1 3496; PPC64LE-NEXT: # %bb.2: 3497; PPC64LE-NEXT: lwsync 3498; PPC64LE-NEXT: mr 3, 5 3499; PPC64LE-NEXT: blr 3500 %ret = atomicrmw or ptr %ptr, i8 %val acq_rel 3501 ret i8 %ret 3502} 3503 3504define i8 @test224(ptr %ptr, i8 %val) { 3505; PPC64LE-LABEL: test224: 3506; PPC64LE: # %bb.0: 3507; PPC64LE-NEXT: sync 3508; PPC64LE-NEXT: .LBB224_1: 3509; PPC64LE-NEXT: lbarx 5, 0, 3 3510; PPC64LE-NEXT: or 6, 4, 5 3511; PPC64LE-NEXT: stbcx. 6, 0, 3 3512; PPC64LE-NEXT: bne 0, .LBB224_1 3513; PPC64LE-NEXT: # %bb.2: 3514; PPC64LE-NEXT: lwsync 3515; PPC64LE-NEXT: mr 3, 5 3516; PPC64LE-NEXT: blr 3517 %ret = atomicrmw or ptr %ptr, i8 %val seq_cst 3518 ret i8 %ret 3519} 3520 3521define i16 @test225(ptr %ptr, i16 %val) { 3522; PPC64LE-LABEL: test225: 3523; PPC64LE: # %bb.0: 3524; PPC64LE-NEXT: .LBB225_1: 3525; PPC64LE-NEXT: lharx 5, 0, 3 3526; PPC64LE-NEXT: or 6, 4, 5 3527; PPC64LE-NEXT: sthcx. 6, 0, 3 3528; PPC64LE-NEXT: bne 0, .LBB225_1 3529; PPC64LE-NEXT: # %bb.2: 3530; PPC64LE-NEXT: mr 3, 5 3531; PPC64LE-NEXT: blr 3532 %ret = atomicrmw or ptr %ptr, i16 %val monotonic 3533 ret i16 %ret 3534} 3535 3536define i16 @test226(ptr %ptr, i16 %val) { 3537; PPC64LE-LABEL: test226: 3538; PPC64LE: # %bb.0: 3539; PPC64LE-NEXT: mr 5, 3 3540; PPC64LE-NEXT: .LBB226_1: 3541; PPC64LE-NEXT: lharx 3, 0, 5 3542; PPC64LE-NEXT: or 6, 4, 3 3543; PPC64LE-NEXT: sthcx. 6, 0, 5 3544; PPC64LE-NEXT: bne 0, .LBB226_1 3545; PPC64LE-NEXT: # %bb.2: 3546; PPC64LE-NEXT: lwsync 3547; PPC64LE-NEXT: blr 3548 %ret = atomicrmw or ptr %ptr, i16 %val acquire 3549 ret i16 %ret 3550} 3551 3552define i16 @test227(ptr %ptr, i16 %val) { 3553; PPC64LE-LABEL: test227: 3554; PPC64LE: # %bb.0: 3555; PPC64LE-NEXT: lwsync 3556; PPC64LE-NEXT: .LBB227_1: 3557; PPC64LE-NEXT: lharx 5, 0, 3 3558; PPC64LE-NEXT: or 6, 4, 5 3559; PPC64LE-NEXT: sthcx. 6, 0, 3 3560; PPC64LE-NEXT: bne 0, .LBB227_1 3561; PPC64LE-NEXT: # %bb.2: 3562; PPC64LE-NEXT: mr 3, 5 3563; PPC64LE-NEXT: blr 3564 %ret = atomicrmw or ptr %ptr, i16 %val release 3565 ret i16 %ret 3566} 3567 3568define i16 @test228(ptr %ptr, i16 %val) { 3569; PPC64LE-LABEL: test228: 3570; PPC64LE: # %bb.0: 3571; PPC64LE-NEXT: lwsync 3572; PPC64LE-NEXT: .LBB228_1: 3573; PPC64LE-NEXT: lharx 5, 0, 3 3574; PPC64LE-NEXT: or 6, 4, 5 3575; PPC64LE-NEXT: sthcx. 6, 0, 3 3576; PPC64LE-NEXT: bne 0, .LBB228_1 3577; PPC64LE-NEXT: # %bb.2: 3578; PPC64LE-NEXT: lwsync 3579; PPC64LE-NEXT: mr 3, 5 3580; PPC64LE-NEXT: blr 3581 %ret = atomicrmw or ptr %ptr, i16 %val acq_rel 3582 ret i16 %ret 3583} 3584 3585define i16 @test229(ptr %ptr, i16 %val) { 3586; PPC64LE-LABEL: test229: 3587; PPC64LE: # %bb.0: 3588; PPC64LE-NEXT: sync 3589; PPC64LE-NEXT: .LBB229_1: 3590; PPC64LE-NEXT: lharx 5, 0, 3 3591; PPC64LE-NEXT: or 6, 4, 5 3592; PPC64LE-NEXT: sthcx. 6, 0, 3 3593; PPC64LE-NEXT: bne 0, .LBB229_1 3594; PPC64LE-NEXT: # %bb.2: 3595; PPC64LE-NEXT: lwsync 3596; PPC64LE-NEXT: mr 3, 5 3597; PPC64LE-NEXT: blr 3598 %ret = atomicrmw or ptr %ptr, i16 %val seq_cst 3599 ret i16 %ret 3600} 3601 3602define i32 @test230(ptr %ptr, i32 %val) { 3603; PPC64LE-LABEL: test230: 3604; PPC64LE: # %bb.0: 3605; PPC64LE-NEXT: .LBB230_1: 3606; PPC64LE-NEXT: lwarx 5, 0, 3 3607; PPC64LE-NEXT: or 6, 4, 5 3608; PPC64LE-NEXT: stwcx. 6, 0, 3 3609; PPC64LE-NEXT: bne 0, .LBB230_1 3610; PPC64LE-NEXT: # %bb.2: 3611; PPC64LE-NEXT: mr 3, 5 3612; PPC64LE-NEXT: blr 3613 %ret = atomicrmw or ptr %ptr, i32 %val monotonic 3614 ret i32 %ret 3615} 3616 3617define i32 @test231(ptr %ptr, i32 %val) { 3618; PPC64LE-LABEL: test231: 3619; PPC64LE: # %bb.0: 3620; PPC64LE-NEXT: mr 5, 3 3621; PPC64LE-NEXT: .LBB231_1: 3622; PPC64LE-NEXT: lwarx 3, 0, 5 3623; PPC64LE-NEXT: or 6, 4, 3 3624; PPC64LE-NEXT: stwcx. 6, 0, 5 3625; PPC64LE-NEXT: bne 0, .LBB231_1 3626; PPC64LE-NEXT: # %bb.2: 3627; PPC64LE-NEXT: lwsync 3628; PPC64LE-NEXT: blr 3629 %ret = atomicrmw or ptr %ptr, i32 %val acquire 3630 ret i32 %ret 3631} 3632 3633define i32 @test232(ptr %ptr, i32 %val) { 3634; PPC64LE-LABEL: test232: 3635; PPC64LE: # %bb.0: 3636; PPC64LE-NEXT: lwsync 3637; PPC64LE-NEXT: .LBB232_1: 3638; PPC64LE-NEXT: lwarx 5, 0, 3 3639; PPC64LE-NEXT: or 6, 4, 5 3640; PPC64LE-NEXT: stwcx. 6, 0, 3 3641; PPC64LE-NEXT: bne 0, .LBB232_1 3642; PPC64LE-NEXT: # %bb.2: 3643; PPC64LE-NEXT: mr 3, 5 3644; PPC64LE-NEXT: blr 3645 %ret = atomicrmw or ptr %ptr, i32 %val release 3646 ret i32 %ret 3647} 3648 3649define i32 @test233(ptr %ptr, i32 %val) { 3650; PPC64LE-LABEL: test233: 3651; PPC64LE: # %bb.0: 3652; PPC64LE-NEXT: lwsync 3653; PPC64LE-NEXT: .LBB233_1: 3654; PPC64LE-NEXT: lwarx 5, 0, 3 3655; PPC64LE-NEXT: or 6, 4, 5 3656; PPC64LE-NEXT: stwcx. 6, 0, 3 3657; PPC64LE-NEXT: bne 0, .LBB233_1 3658; PPC64LE-NEXT: # %bb.2: 3659; PPC64LE-NEXT: lwsync 3660; PPC64LE-NEXT: mr 3, 5 3661; PPC64LE-NEXT: blr 3662 %ret = atomicrmw or ptr %ptr, i32 %val acq_rel 3663 ret i32 %ret 3664} 3665 3666define i32 @test234(ptr %ptr, i32 %val) { 3667; PPC64LE-LABEL: test234: 3668; PPC64LE: # %bb.0: 3669; PPC64LE-NEXT: sync 3670; PPC64LE-NEXT: .LBB234_1: 3671; PPC64LE-NEXT: lwarx 5, 0, 3 3672; PPC64LE-NEXT: or 6, 4, 5 3673; PPC64LE-NEXT: stwcx. 6, 0, 3 3674; PPC64LE-NEXT: bne 0, .LBB234_1 3675; PPC64LE-NEXT: # %bb.2: 3676; PPC64LE-NEXT: lwsync 3677; PPC64LE-NEXT: mr 3, 5 3678; PPC64LE-NEXT: blr 3679 %ret = atomicrmw or ptr %ptr, i32 %val seq_cst 3680 ret i32 %ret 3681} 3682 3683define i64 @test235(ptr %ptr, i64 %val) { 3684; PPC64LE-LABEL: test235: 3685; PPC64LE: # %bb.0: 3686; PPC64LE-NEXT: .LBB235_1: 3687; PPC64LE-NEXT: ldarx 5, 0, 3 3688; PPC64LE-NEXT: or 6, 4, 5 3689; PPC64LE-NEXT: stdcx. 6, 0, 3 3690; PPC64LE-NEXT: bne 0, .LBB235_1 3691; PPC64LE-NEXT: # %bb.2: 3692; PPC64LE-NEXT: mr 3, 5 3693; PPC64LE-NEXT: blr 3694 %ret = atomicrmw or ptr %ptr, i64 %val monotonic 3695 ret i64 %ret 3696} 3697 3698define i64 @test236(ptr %ptr, i64 %val) { 3699; PPC64LE-LABEL: test236: 3700; PPC64LE: # %bb.0: 3701; PPC64LE-NEXT: mr 5, 3 3702; PPC64LE-NEXT: .LBB236_1: 3703; PPC64LE-NEXT: ldarx 3, 0, 5 3704; PPC64LE-NEXT: or 6, 4, 3 3705; PPC64LE-NEXT: stdcx. 6, 0, 5 3706; PPC64LE-NEXT: bne 0, .LBB236_1 3707; PPC64LE-NEXT: # %bb.2: 3708; PPC64LE-NEXT: lwsync 3709; PPC64LE-NEXT: blr 3710 %ret = atomicrmw or ptr %ptr, i64 %val acquire 3711 ret i64 %ret 3712} 3713 3714define i64 @test237(ptr %ptr, i64 %val) { 3715; PPC64LE-LABEL: test237: 3716; PPC64LE: # %bb.0: 3717; PPC64LE-NEXT: lwsync 3718; PPC64LE-NEXT: .LBB237_1: 3719; PPC64LE-NEXT: ldarx 5, 0, 3 3720; PPC64LE-NEXT: or 6, 4, 5 3721; PPC64LE-NEXT: stdcx. 6, 0, 3 3722; PPC64LE-NEXT: bne 0, .LBB237_1 3723; PPC64LE-NEXT: # %bb.2: 3724; PPC64LE-NEXT: mr 3, 5 3725; PPC64LE-NEXT: blr 3726 %ret = atomicrmw or ptr %ptr, i64 %val release 3727 ret i64 %ret 3728} 3729 3730define i64 @test238(ptr %ptr, i64 %val) { 3731; PPC64LE-LABEL: test238: 3732; PPC64LE: # %bb.0: 3733; PPC64LE-NEXT: lwsync 3734; PPC64LE-NEXT: .LBB238_1: 3735; PPC64LE-NEXT: ldarx 5, 0, 3 3736; PPC64LE-NEXT: or 6, 4, 5 3737; PPC64LE-NEXT: stdcx. 6, 0, 3 3738; PPC64LE-NEXT: bne 0, .LBB238_1 3739; PPC64LE-NEXT: # %bb.2: 3740; PPC64LE-NEXT: lwsync 3741; PPC64LE-NEXT: mr 3, 5 3742; PPC64LE-NEXT: blr 3743 %ret = atomicrmw or ptr %ptr, i64 %val acq_rel 3744 ret i64 %ret 3745} 3746 3747define i64 @test239(ptr %ptr, i64 %val) { 3748; PPC64LE-LABEL: test239: 3749; PPC64LE: # %bb.0: 3750; PPC64LE-NEXT: sync 3751; PPC64LE-NEXT: .LBB239_1: 3752; PPC64LE-NEXT: ldarx 5, 0, 3 3753; PPC64LE-NEXT: or 6, 4, 5 3754; PPC64LE-NEXT: stdcx. 6, 0, 3 3755; PPC64LE-NEXT: bne 0, .LBB239_1 3756; PPC64LE-NEXT: # %bb.2: 3757; PPC64LE-NEXT: lwsync 3758; PPC64LE-NEXT: mr 3, 5 3759; PPC64LE-NEXT: blr 3760 %ret = atomicrmw or ptr %ptr, i64 %val seq_cst 3761 ret i64 %ret 3762} 3763 3764define i8 @test240(ptr %ptr, i8 %val) { 3765; PPC64LE-LABEL: test240: 3766; PPC64LE: # %bb.0: 3767; PPC64LE-NEXT: .LBB240_1: 3768; PPC64LE-NEXT: lbarx 5, 0, 3 3769; PPC64LE-NEXT: xor 6, 4, 5 3770; PPC64LE-NEXT: stbcx. 6, 0, 3 3771; PPC64LE-NEXT: bne 0, .LBB240_1 3772; PPC64LE-NEXT: # %bb.2: 3773; PPC64LE-NEXT: mr 3, 5 3774; PPC64LE-NEXT: blr 3775 %ret = atomicrmw xor ptr %ptr, i8 %val monotonic 3776 ret i8 %ret 3777} 3778 3779define i8 @test241(ptr %ptr, i8 %val) { 3780; PPC64LE-LABEL: test241: 3781; PPC64LE: # %bb.0: 3782; PPC64LE-NEXT: mr 5, 3 3783; PPC64LE-NEXT: .LBB241_1: 3784; PPC64LE-NEXT: lbarx 3, 0, 5 3785; PPC64LE-NEXT: xor 6, 4, 3 3786; PPC64LE-NEXT: stbcx. 6, 0, 5 3787; PPC64LE-NEXT: bne 0, .LBB241_1 3788; PPC64LE-NEXT: # %bb.2: 3789; PPC64LE-NEXT: lwsync 3790; PPC64LE-NEXT: blr 3791 %ret = atomicrmw xor ptr %ptr, i8 %val acquire 3792 ret i8 %ret 3793} 3794 3795define i8 @test242(ptr %ptr, i8 %val) { 3796; PPC64LE-LABEL: test242: 3797; PPC64LE: # %bb.0: 3798; PPC64LE-NEXT: lwsync 3799; PPC64LE-NEXT: .LBB242_1: 3800; PPC64LE-NEXT: lbarx 5, 0, 3 3801; PPC64LE-NEXT: xor 6, 4, 5 3802; PPC64LE-NEXT: stbcx. 6, 0, 3 3803; PPC64LE-NEXT: bne 0, .LBB242_1 3804; PPC64LE-NEXT: # %bb.2: 3805; PPC64LE-NEXT: mr 3, 5 3806; PPC64LE-NEXT: blr 3807 %ret = atomicrmw xor ptr %ptr, i8 %val release 3808 ret i8 %ret 3809} 3810 3811define i8 @test243(ptr %ptr, i8 %val) { 3812; PPC64LE-LABEL: test243: 3813; PPC64LE: # %bb.0: 3814; PPC64LE-NEXT: lwsync 3815; PPC64LE-NEXT: .LBB243_1: 3816; PPC64LE-NEXT: lbarx 5, 0, 3 3817; PPC64LE-NEXT: xor 6, 4, 5 3818; PPC64LE-NEXT: stbcx. 6, 0, 3 3819; PPC64LE-NEXT: bne 0, .LBB243_1 3820; PPC64LE-NEXT: # %bb.2: 3821; PPC64LE-NEXT: lwsync 3822; PPC64LE-NEXT: mr 3, 5 3823; PPC64LE-NEXT: blr 3824 %ret = atomicrmw xor ptr %ptr, i8 %val acq_rel 3825 ret i8 %ret 3826} 3827 3828define i8 @test244(ptr %ptr, i8 %val) { 3829; PPC64LE-LABEL: test244: 3830; PPC64LE: # %bb.0: 3831; PPC64LE-NEXT: sync 3832; PPC64LE-NEXT: .LBB244_1: 3833; PPC64LE-NEXT: lbarx 5, 0, 3 3834; PPC64LE-NEXT: xor 6, 4, 5 3835; PPC64LE-NEXT: stbcx. 6, 0, 3 3836; PPC64LE-NEXT: bne 0, .LBB244_1 3837; PPC64LE-NEXT: # %bb.2: 3838; PPC64LE-NEXT: lwsync 3839; PPC64LE-NEXT: mr 3, 5 3840; PPC64LE-NEXT: blr 3841 %ret = atomicrmw xor ptr %ptr, i8 %val seq_cst 3842 ret i8 %ret 3843} 3844 3845define i16 @test245(ptr %ptr, i16 %val) { 3846; PPC64LE-LABEL: test245: 3847; PPC64LE: # %bb.0: 3848; PPC64LE-NEXT: .LBB245_1: 3849; PPC64LE-NEXT: lharx 5, 0, 3 3850; PPC64LE-NEXT: xor 6, 4, 5 3851; PPC64LE-NEXT: sthcx. 6, 0, 3 3852; PPC64LE-NEXT: bne 0, .LBB245_1 3853; PPC64LE-NEXT: # %bb.2: 3854; PPC64LE-NEXT: mr 3, 5 3855; PPC64LE-NEXT: blr 3856 %ret = atomicrmw xor ptr %ptr, i16 %val monotonic 3857 ret i16 %ret 3858} 3859 3860define i16 @test246(ptr %ptr, i16 %val) { 3861; PPC64LE-LABEL: test246: 3862; PPC64LE: # %bb.0: 3863; PPC64LE-NEXT: mr 5, 3 3864; PPC64LE-NEXT: .LBB246_1: 3865; PPC64LE-NEXT: lharx 3, 0, 5 3866; PPC64LE-NEXT: xor 6, 4, 3 3867; PPC64LE-NEXT: sthcx. 6, 0, 5 3868; PPC64LE-NEXT: bne 0, .LBB246_1 3869; PPC64LE-NEXT: # %bb.2: 3870; PPC64LE-NEXT: lwsync 3871; PPC64LE-NEXT: blr 3872 %ret = atomicrmw xor ptr %ptr, i16 %val acquire 3873 ret i16 %ret 3874} 3875 3876define i16 @test247(ptr %ptr, i16 %val) { 3877; PPC64LE-LABEL: test247: 3878; PPC64LE: # %bb.0: 3879; PPC64LE-NEXT: lwsync 3880; PPC64LE-NEXT: .LBB247_1: 3881; PPC64LE-NEXT: lharx 5, 0, 3 3882; PPC64LE-NEXT: xor 6, 4, 5 3883; PPC64LE-NEXT: sthcx. 6, 0, 3 3884; PPC64LE-NEXT: bne 0, .LBB247_1 3885; PPC64LE-NEXT: # %bb.2: 3886; PPC64LE-NEXT: mr 3, 5 3887; PPC64LE-NEXT: blr 3888 %ret = atomicrmw xor ptr %ptr, i16 %val release 3889 ret i16 %ret 3890} 3891 3892define i16 @test248(ptr %ptr, i16 %val) { 3893; PPC64LE-LABEL: test248: 3894; PPC64LE: # %bb.0: 3895; PPC64LE-NEXT: lwsync 3896; PPC64LE-NEXT: .LBB248_1: 3897; PPC64LE-NEXT: lharx 5, 0, 3 3898; PPC64LE-NEXT: xor 6, 4, 5 3899; PPC64LE-NEXT: sthcx. 6, 0, 3 3900; PPC64LE-NEXT: bne 0, .LBB248_1 3901; PPC64LE-NEXT: # %bb.2: 3902; PPC64LE-NEXT: lwsync 3903; PPC64LE-NEXT: mr 3, 5 3904; PPC64LE-NEXT: blr 3905 %ret = atomicrmw xor ptr %ptr, i16 %val acq_rel 3906 ret i16 %ret 3907} 3908 3909define i16 @test249(ptr %ptr, i16 %val) { 3910; PPC64LE-LABEL: test249: 3911; PPC64LE: # %bb.0: 3912; PPC64LE-NEXT: sync 3913; PPC64LE-NEXT: .LBB249_1: 3914; PPC64LE-NEXT: lharx 5, 0, 3 3915; PPC64LE-NEXT: xor 6, 4, 5 3916; PPC64LE-NEXT: sthcx. 6, 0, 3 3917; PPC64LE-NEXT: bne 0, .LBB249_1 3918; PPC64LE-NEXT: # %bb.2: 3919; PPC64LE-NEXT: lwsync 3920; PPC64LE-NEXT: mr 3, 5 3921; PPC64LE-NEXT: blr 3922 %ret = atomicrmw xor ptr %ptr, i16 %val seq_cst 3923 ret i16 %ret 3924} 3925 3926define i32 @test250(ptr %ptr, i32 %val) { 3927; PPC64LE-LABEL: test250: 3928; PPC64LE: # %bb.0: 3929; PPC64LE-NEXT: .LBB250_1: 3930; PPC64LE-NEXT: lwarx 5, 0, 3 3931; PPC64LE-NEXT: xor 6, 4, 5 3932; PPC64LE-NEXT: stwcx. 6, 0, 3 3933; PPC64LE-NEXT: bne 0, .LBB250_1 3934; PPC64LE-NEXT: # %bb.2: 3935; PPC64LE-NEXT: mr 3, 5 3936; PPC64LE-NEXT: blr 3937 %ret = atomicrmw xor ptr %ptr, i32 %val monotonic 3938 ret i32 %ret 3939} 3940 3941define i32 @test251(ptr %ptr, i32 %val) { 3942; PPC64LE-LABEL: test251: 3943; PPC64LE: # %bb.0: 3944; PPC64LE-NEXT: mr 5, 3 3945; PPC64LE-NEXT: .LBB251_1: 3946; PPC64LE-NEXT: lwarx 3, 0, 5 3947; PPC64LE-NEXT: xor 6, 4, 3 3948; PPC64LE-NEXT: stwcx. 6, 0, 5 3949; PPC64LE-NEXT: bne 0, .LBB251_1 3950; PPC64LE-NEXT: # %bb.2: 3951; PPC64LE-NEXT: lwsync 3952; PPC64LE-NEXT: blr 3953 %ret = atomicrmw xor ptr %ptr, i32 %val acquire 3954 ret i32 %ret 3955} 3956 3957define i32 @test252(ptr %ptr, i32 %val) { 3958; PPC64LE-LABEL: test252: 3959; PPC64LE: # %bb.0: 3960; PPC64LE-NEXT: lwsync 3961; PPC64LE-NEXT: .LBB252_1: 3962; PPC64LE-NEXT: lwarx 5, 0, 3 3963; PPC64LE-NEXT: xor 6, 4, 5 3964; PPC64LE-NEXT: stwcx. 6, 0, 3 3965; PPC64LE-NEXT: bne 0, .LBB252_1 3966; PPC64LE-NEXT: # %bb.2: 3967; PPC64LE-NEXT: mr 3, 5 3968; PPC64LE-NEXT: blr 3969 %ret = atomicrmw xor ptr %ptr, i32 %val release 3970 ret i32 %ret 3971} 3972 3973define i32 @test253(ptr %ptr, i32 %val) { 3974; PPC64LE-LABEL: test253: 3975; PPC64LE: # %bb.0: 3976; PPC64LE-NEXT: lwsync 3977; PPC64LE-NEXT: .LBB253_1: 3978; PPC64LE-NEXT: lwarx 5, 0, 3 3979; PPC64LE-NEXT: xor 6, 4, 5 3980; PPC64LE-NEXT: stwcx. 6, 0, 3 3981; PPC64LE-NEXT: bne 0, .LBB253_1 3982; PPC64LE-NEXT: # %bb.2: 3983; PPC64LE-NEXT: lwsync 3984; PPC64LE-NEXT: mr 3, 5 3985; PPC64LE-NEXT: blr 3986 %ret = atomicrmw xor ptr %ptr, i32 %val acq_rel 3987 ret i32 %ret 3988} 3989 3990define i32 @test254(ptr %ptr, i32 %val) { 3991; PPC64LE-LABEL: test254: 3992; PPC64LE: # %bb.0: 3993; PPC64LE-NEXT: sync 3994; PPC64LE-NEXT: .LBB254_1: 3995; PPC64LE-NEXT: lwarx 5, 0, 3 3996; PPC64LE-NEXT: xor 6, 4, 5 3997; PPC64LE-NEXT: stwcx. 6, 0, 3 3998; PPC64LE-NEXT: bne 0, .LBB254_1 3999; PPC64LE-NEXT: # %bb.2: 4000; PPC64LE-NEXT: lwsync 4001; PPC64LE-NEXT: mr 3, 5 4002; PPC64LE-NEXT: blr 4003 %ret = atomicrmw xor ptr %ptr, i32 %val seq_cst 4004 ret i32 %ret 4005} 4006 4007define i64 @test255(ptr %ptr, i64 %val) { 4008; PPC64LE-LABEL: test255: 4009; PPC64LE: # %bb.0: 4010; PPC64LE-NEXT: .LBB255_1: 4011; PPC64LE-NEXT: ldarx 5, 0, 3 4012; PPC64LE-NEXT: xor 6, 4, 5 4013; PPC64LE-NEXT: stdcx. 6, 0, 3 4014; PPC64LE-NEXT: bne 0, .LBB255_1 4015; PPC64LE-NEXT: # %bb.2: 4016; PPC64LE-NEXT: mr 3, 5 4017; PPC64LE-NEXT: blr 4018 %ret = atomicrmw xor ptr %ptr, i64 %val monotonic 4019 ret i64 %ret 4020} 4021 4022define i64 @test256(ptr %ptr, i64 %val) { 4023; PPC64LE-LABEL: test256: 4024; PPC64LE: # %bb.0: 4025; PPC64LE-NEXT: mr 5, 3 4026; PPC64LE-NEXT: .LBB256_1: 4027; PPC64LE-NEXT: ldarx 3, 0, 5 4028; PPC64LE-NEXT: xor 6, 4, 3 4029; PPC64LE-NEXT: stdcx. 6, 0, 5 4030; PPC64LE-NEXT: bne 0, .LBB256_1 4031; PPC64LE-NEXT: # %bb.2: 4032; PPC64LE-NEXT: lwsync 4033; PPC64LE-NEXT: blr 4034 %ret = atomicrmw xor ptr %ptr, i64 %val acquire 4035 ret i64 %ret 4036} 4037 4038define i64 @test257(ptr %ptr, i64 %val) { 4039; PPC64LE-LABEL: test257: 4040; PPC64LE: # %bb.0: 4041; PPC64LE-NEXT: lwsync 4042; PPC64LE-NEXT: .LBB257_1: 4043; PPC64LE-NEXT: ldarx 5, 0, 3 4044; PPC64LE-NEXT: xor 6, 4, 5 4045; PPC64LE-NEXT: stdcx. 6, 0, 3 4046; PPC64LE-NEXT: bne 0, .LBB257_1 4047; PPC64LE-NEXT: # %bb.2: 4048; PPC64LE-NEXT: mr 3, 5 4049; PPC64LE-NEXT: blr 4050 %ret = atomicrmw xor ptr %ptr, i64 %val release 4051 ret i64 %ret 4052} 4053 4054define i64 @test258(ptr %ptr, i64 %val) { 4055; PPC64LE-LABEL: test258: 4056; PPC64LE: # %bb.0: 4057; PPC64LE-NEXT: lwsync 4058; PPC64LE-NEXT: .LBB258_1: 4059; PPC64LE-NEXT: ldarx 5, 0, 3 4060; PPC64LE-NEXT: xor 6, 4, 5 4061; PPC64LE-NEXT: stdcx. 6, 0, 3 4062; PPC64LE-NEXT: bne 0, .LBB258_1 4063; PPC64LE-NEXT: # %bb.2: 4064; PPC64LE-NEXT: lwsync 4065; PPC64LE-NEXT: mr 3, 5 4066; PPC64LE-NEXT: blr 4067 %ret = atomicrmw xor ptr %ptr, i64 %val acq_rel 4068 ret i64 %ret 4069} 4070 4071define i64 @test259(ptr %ptr, i64 %val) { 4072; PPC64LE-LABEL: test259: 4073; PPC64LE: # %bb.0: 4074; PPC64LE-NEXT: sync 4075; PPC64LE-NEXT: .LBB259_1: 4076; PPC64LE-NEXT: ldarx 5, 0, 3 4077; PPC64LE-NEXT: xor 6, 4, 5 4078; PPC64LE-NEXT: stdcx. 6, 0, 3 4079; PPC64LE-NEXT: bne 0, .LBB259_1 4080; PPC64LE-NEXT: # %bb.2: 4081; PPC64LE-NEXT: lwsync 4082; PPC64LE-NEXT: mr 3, 5 4083; PPC64LE-NEXT: blr 4084 %ret = atomicrmw xor ptr %ptr, i64 %val seq_cst 4085 ret i64 %ret 4086} 4087 4088define i8 @test260(ptr %ptr, i8 %val) { 4089; PPC64LE-LABEL: test260: 4090; PPC64LE: # %bb.0: 4091; PPC64LE-NEXT: extsb 5, 4 4092; PPC64LE-NEXT: .LBB260_1: 4093; PPC64LE-NEXT: lbarx 4, 0, 3 4094; PPC64LE-NEXT: extsb 6, 4 4095; PPC64LE-NEXT: cmpw 6, 5 4096; PPC64LE-NEXT: bgt 0, .LBB260_3 4097; PPC64LE-NEXT: # %bb.2: 4098; PPC64LE-NEXT: stbcx. 5, 0, 3 4099; PPC64LE-NEXT: bne 0, .LBB260_1 4100; PPC64LE-NEXT: .LBB260_3: 4101; PPC64LE-NEXT: mr 3, 4 4102; PPC64LE-NEXT: blr 4103 %ret = atomicrmw max ptr %ptr, i8 %val monotonic 4104 ret i8 %ret 4105} 4106 4107define i8 @test261(ptr %ptr, i8 %val) { 4108; PPC64LE-LABEL: test261: 4109; PPC64LE: # %bb.0: 4110; PPC64LE-NEXT: extsb 5, 4 4111; PPC64LE-NEXT: .LBB261_1: 4112; PPC64LE-NEXT: lbarx 4, 0, 3 4113; PPC64LE-NEXT: extsb 6, 4 4114; PPC64LE-NEXT: cmpw 6, 5 4115; PPC64LE-NEXT: bgt 0, .LBB261_3 4116; PPC64LE-NEXT: # %bb.2: 4117; PPC64LE-NEXT: stbcx. 5, 0, 3 4118; PPC64LE-NEXT: bne 0, .LBB261_1 4119; PPC64LE-NEXT: .LBB261_3: 4120; PPC64LE-NEXT: lwsync 4121; PPC64LE-NEXT: mr 3, 4 4122; PPC64LE-NEXT: blr 4123 %ret = atomicrmw max ptr %ptr, i8 %val acquire 4124 ret i8 %ret 4125} 4126 4127define i8 @test262(ptr %ptr, i8 %val) { 4128; PPC64LE-LABEL: test262: 4129; PPC64LE: # %bb.0: 4130; PPC64LE-NEXT: lwsync 4131; PPC64LE-NEXT: extsb 5, 4 4132; PPC64LE-NEXT: .LBB262_1: 4133; PPC64LE-NEXT: lbarx 4, 0, 3 4134; PPC64LE-NEXT: extsb 6, 4 4135; PPC64LE-NEXT: cmpw 6, 5 4136; PPC64LE-NEXT: bgt 0, .LBB262_3 4137; PPC64LE-NEXT: # %bb.2: 4138; PPC64LE-NEXT: stbcx. 5, 0, 3 4139; PPC64LE-NEXT: bne 0, .LBB262_1 4140; PPC64LE-NEXT: .LBB262_3: 4141; PPC64LE-NEXT: mr 3, 4 4142; PPC64LE-NEXT: blr 4143 %ret = atomicrmw max ptr %ptr, i8 %val release 4144 ret i8 %ret 4145} 4146 4147define i8 @test263(ptr %ptr, i8 %val) { 4148; PPC64LE-LABEL: test263: 4149; PPC64LE: # %bb.0: 4150; PPC64LE-NEXT: lwsync 4151; PPC64LE-NEXT: extsb 5, 4 4152; PPC64LE-NEXT: .LBB263_1: 4153; PPC64LE-NEXT: lbarx 4, 0, 3 4154; PPC64LE-NEXT: extsb 6, 4 4155; PPC64LE-NEXT: cmpw 6, 5 4156; PPC64LE-NEXT: bgt 0, .LBB263_3 4157; PPC64LE-NEXT: # %bb.2: 4158; PPC64LE-NEXT: stbcx. 5, 0, 3 4159; PPC64LE-NEXT: bne 0, .LBB263_1 4160; PPC64LE-NEXT: .LBB263_3: 4161; PPC64LE-NEXT: lwsync 4162; PPC64LE-NEXT: mr 3, 4 4163; PPC64LE-NEXT: blr 4164 %ret = atomicrmw max ptr %ptr, i8 %val acq_rel 4165 ret i8 %ret 4166} 4167 4168define i8 @test264(ptr %ptr, i8 %val) { 4169; PPC64LE-LABEL: test264: 4170; PPC64LE: # %bb.0: 4171; PPC64LE-NEXT: sync 4172; PPC64LE-NEXT: extsb 5, 4 4173; PPC64LE-NEXT: .LBB264_1: 4174; PPC64LE-NEXT: lbarx 4, 0, 3 4175; PPC64LE-NEXT: extsb 6, 4 4176; PPC64LE-NEXT: cmpw 6, 5 4177; PPC64LE-NEXT: bgt 0, .LBB264_3 4178; PPC64LE-NEXT: # %bb.2: 4179; PPC64LE-NEXT: stbcx. 5, 0, 3 4180; PPC64LE-NEXT: bne 0, .LBB264_1 4181; PPC64LE-NEXT: .LBB264_3: 4182; PPC64LE-NEXT: lwsync 4183; PPC64LE-NEXT: mr 3, 4 4184; PPC64LE-NEXT: blr 4185 %ret = atomicrmw max ptr %ptr, i8 %val seq_cst 4186 ret i8 %ret 4187} 4188 4189define i16 @test265(ptr %ptr, i16 %val) { 4190; PPC64LE-LABEL: test265: 4191; PPC64LE: # %bb.0: 4192; PPC64LE-NEXT: extsh 5, 4 4193; PPC64LE-NEXT: .LBB265_1: 4194; PPC64LE-NEXT: lharx 4, 0, 3 4195; PPC64LE-NEXT: extsh 6, 4 4196; PPC64LE-NEXT: cmpw 6, 5 4197; PPC64LE-NEXT: bgt 0, .LBB265_3 4198; PPC64LE-NEXT: # %bb.2: 4199; PPC64LE-NEXT: sthcx. 5, 0, 3 4200; PPC64LE-NEXT: bne 0, .LBB265_1 4201; PPC64LE-NEXT: .LBB265_3: 4202; PPC64LE-NEXT: mr 3, 4 4203; PPC64LE-NEXT: blr 4204 %ret = atomicrmw max ptr %ptr, i16 %val monotonic 4205 ret i16 %ret 4206} 4207 4208define i16 @test266(ptr %ptr, i16 %val) { 4209; PPC64LE-LABEL: test266: 4210; PPC64LE: # %bb.0: 4211; PPC64LE-NEXT: extsh 5, 4 4212; PPC64LE-NEXT: .LBB266_1: 4213; PPC64LE-NEXT: lharx 4, 0, 3 4214; PPC64LE-NEXT: extsh 6, 4 4215; PPC64LE-NEXT: cmpw 6, 5 4216; PPC64LE-NEXT: bgt 0, .LBB266_3 4217; PPC64LE-NEXT: # %bb.2: 4218; PPC64LE-NEXT: sthcx. 5, 0, 3 4219; PPC64LE-NEXT: bne 0, .LBB266_1 4220; PPC64LE-NEXT: .LBB266_3: 4221; PPC64LE-NEXT: lwsync 4222; PPC64LE-NEXT: mr 3, 4 4223; PPC64LE-NEXT: blr 4224 %ret = atomicrmw max ptr %ptr, i16 %val acquire 4225 ret i16 %ret 4226} 4227 4228define i16 @test267(ptr %ptr, i16 %val) { 4229; PPC64LE-LABEL: test267: 4230; PPC64LE: # %bb.0: 4231; PPC64LE-NEXT: lwsync 4232; PPC64LE-NEXT: extsh 5, 4 4233; PPC64LE-NEXT: .LBB267_1: 4234; PPC64LE-NEXT: lharx 4, 0, 3 4235; PPC64LE-NEXT: extsh 6, 4 4236; PPC64LE-NEXT: cmpw 6, 5 4237; PPC64LE-NEXT: bgt 0, .LBB267_3 4238; PPC64LE-NEXT: # %bb.2: 4239; PPC64LE-NEXT: sthcx. 5, 0, 3 4240; PPC64LE-NEXT: bne 0, .LBB267_1 4241; PPC64LE-NEXT: .LBB267_3: 4242; PPC64LE-NEXT: mr 3, 4 4243; PPC64LE-NEXT: blr 4244 %ret = atomicrmw max ptr %ptr, i16 %val release 4245 ret i16 %ret 4246} 4247 4248define i16 @test268(ptr %ptr, i16 %val) { 4249; PPC64LE-LABEL: test268: 4250; PPC64LE: # %bb.0: 4251; PPC64LE-NEXT: lwsync 4252; PPC64LE-NEXT: extsh 5, 4 4253; PPC64LE-NEXT: .LBB268_1: 4254; PPC64LE-NEXT: lharx 4, 0, 3 4255; PPC64LE-NEXT: extsh 6, 4 4256; PPC64LE-NEXT: cmpw 6, 5 4257; PPC64LE-NEXT: bgt 0, .LBB268_3 4258; PPC64LE-NEXT: # %bb.2: 4259; PPC64LE-NEXT: sthcx. 5, 0, 3 4260; PPC64LE-NEXT: bne 0, .LBB268_1 4261; PPC64LE-NEXT: .LBB268_3: 4262; PPC64LE-NEXT: lwsync 4263; PPC64LE-NEXT: mr 3, 4 4264; PPC64LE-NEXT: blr 4265 %ret = atomicrmw max ptr %ptr, i16 %val acq_rel 4266 ret i16 %ret 4267} 4268 4269define i16 @test269(ptr %ptr, i16 %val) { 4270; PPC64LE-LABEL: test269: 4271; PPC64LE: # %bb.0: 4272; PPC64LE-NEXT: sync 4273; PPC64LE-NEXT: extsh 5, 4 4274; PPC64LE-NEXT: .LBB269_1: 4275; PPC64LE-NEXT: lharx 4, 0, 3 4276; PPC64LE-NEXT: extsh 6, 4 4277; PPC64LE-NEXT: cmpw 6, 5 4278; PPC64LE-NEXT: bgt 0, .LBB269_3 4279; PPC64LE-NEXT: # %bb.2: 4280; PPC64LE-NEXT: sthcx. 5, 0, 3 4281; PPC64LE-NEXT: bne 0, .LBB269_1 4282; PPC64LE-NEXT: .LBB269_3: 4283; PPC64LE-NEXT: lwsync 4284; PPC64LE-NEXT: mr 3, 4 4285; PPC64LE-NEXT: blr 4286 %ret = atomicrmw max ptr %ptr, i16 %val seq_cst 4287 ret i16 %ret 4288} 4289 4290define i32 @test270(ptr %ptr, i32 %val) { 4291; PPC64LE-LABEL: test270: 4292; PPC64LE: # %bb.0: 4293; PPC64LE-NEXT: .LBB270_1: 4294; PPC64LE-NEXT: lwarx 5, 0, 3 4295; PPC64LE-NEXT: cmpw 5, 4 4296; PPC64LE-NEXT: bgt 0, .LBB270_3 4297; PPC64LE-NEXT: # %bb.2: 4298; PPC64LE-NEXT: stwcx. 4, 0, 3 4299; PPC64LE-NEXT: bne 0, .LBB270_1 4300; PPC64LE-NEXT: .LBB270_3: 4301; PPC64LE-NEXT: mr 3, 5 4302; PPC64LE-NEXT: blr 4303 %ret = atomicrmw max ptr %ptr, i32 %val monotonic 4304 ret i32 %ret 4305} 4306 4307define i32 @test271(ptr %ptr, i32 %val) { 4308; PPC64LE-LABEL: test271: 4309; PPC64LE: # %bb.0: 4310; PPC64LE-NEXT: mr 5, 3 4311; PPC64LE-NEXT: .LBB271_1: 4312; PPC64LE-NEXT: lwarx 3, 0, 5 4313; PPC64LE-NEXT: cmpw 3, 4 4314; PPC64LE-NEXT: bgt 0, .LBB271_3 4315; PPC64LE-NEXT: # %bb.2: 4316; PPC64LE-NEXT: stwcx. 4, 0, 5 4317; PPC64LE-NEXT: bne 0, .LBB271_1 4318; PPC64LE-NEXT: .LBB271_3: 4319; PPC64LE-NEXT: lwsync 4320; PPC64LE-NEXT: blr 4321 %ret = atomicrmw max ptr %ptr, i32 %val acquire 4322 ret i32 %ret 4323} 4324 4325define i32 @test272(ptr %ptr, i32 %val) { 4326; PPC64LE-LABEL: test272: 4327; PPC64LE: # %bb.0: 4328; PPC64LE-NEXT: lwsync 4329; PPC64LE-NEXT: .LBB272_1: 4330; PPC64LE-NEXT: lwarx 5, 0, 3 4331; PPC64LE-NEXT: cmpw 5, 4 4332; PPC64LE-NEXT: bgt 0, .LBB272_3 4333; PPC64LE-NEXT: # %bb.2: 4334; PPC64LE-NEXT: stwcx. 4, 0, 3 4335; PPC64LE-NEXT: bne 0, .LBB272_1 4336; PPC64LE-NEXT: .LBB272_3: 4337; PPC64LE-NEXT: mr 3, 5 4338; PPC64LE-NEXT: blr 4339 %ret = atomicrmw max ptr %ptr, i32 %val release 4340 ret i32 %ret 4341} 4342 4343define i32 @test273(ptr %ptr, i32 %val) { 4344; PPC64LE-LABEL: test273: 4345; PPC64LE: # %bb.0: 4346; PPC64LE-NEXT: lwsync 4347; PPC64LE-NEXT: .LBB273_1: 4348; PPC64LE-NEXT: lwarx 5, 0, 3 4349; PPC64LE-NEXT: cmpw 5, 4 4350; PPC64LE-NEXT: bgt 0, .LBB273_3 4351; PPC64LE-NEXT: # %bb.2: 4352; PPC64LE-NEXT: stwcx. 4, 0, 3 4353; PPC64LE-NEXT: bne 0, .LBB273_1 4354; PPC64LE-NEXT: .LBB273_3: 4355; PPC64LE-NEXT: lwsync 4356; PPC64LE-NEXT: mr 3, 5 4357; PPC64LE-NEXT: blr 4358 %ret = atomicrmw max ptr %ptr, i32 %val acq_rel 4359 ret i32 %ret 4360} 4361 4362define i32 @test274(ptr %ptr, i32 %val) { 4363; PPC64LE-LABEL: test274: 4364; PPC64LE: # %bb.0: 4365; PPC64LE-NEXT: sync 4366; PPC64LE-NEXT: .LBB274_1: 4367; PPC64LE-NEXT: lwarx 5, 0, 3 4368; PPC64LE-NEXT: cmpw 5, 4 4369; PPC64LE-NEXT: bgt 0, .LBB274_3 4370; PPC64LE-NEXT: # %bb.2: 4371; PPC64LE-NEXT: stwcx. 4, 0, 3 4372; PPC64LE-NEXT: bne 0, .LBB274_1 4373; PPC64LE-NEXT: .LBB274_3: 4374; PPC64LE-NEXT: lwsync 4375; PPC64LE-NEXT: mr 3, 5 4376; PPC64LE-NEXT: blr 4377 %ret = atomicrmw max ptr %ptr, i32 %val seq_cst 4378 ret i32 %ret 4379} 4380 4381define i64 @test275(ptr %ptr, i64 %val) { 4382; PPC64LE-LABEL: test275: 4383; PPC64LE: # %bb.0: 4384; PPC64LE-NEXT: .LBB275_1: 4385; PPC64LE-NEXT: ldarx 5, 0, 3 4386; PPC64LE-NEXT: cmpd 5, 4 4387; PPC64LE-NEXT: bgt 0, .LBB275_3 4388; PPC64LE-NEXT: # %bb.2: 4389; PPC64LE-NEXT: stdcx. 4, 0, 3 4390; PPC64LE-NEXT: bne 0, .LBB275_1 4391; PPC64LE-NEXT: .LBB275_3: 4392; PPC64LE-NEXT: mr 3, 5 4393; PPC64LE-NEXT: blr 4394 %ret = atomicrmw max ptr %ptr, i64 %val monotonic 4395 ret i64 %ret 4396} 4397 4398define i64 @test276(ptr %ptr, i64 %val) { 4399; PPC64LE-LABEL: test276: 4400; PPC64LE: # %bb.0: 4401; PPC64LE-NEXT: mr 5, 3 4402; PPC64LE-NEXT: .LBB276_1: 4403; PPC64LE-NEXT: ldarx 3, 0, 5 4404; PPC64LE-NEXT: cmpd 3, 4 4405; PPC64LE-NEXT: bgt 0, .LBB276_3 4406; PPC64LE-NEXT: # %bb.2: 4407; PPC64LE-NEXT: stdcx. 4, 0, 5 4408; PPC64LE-NEXT: bne 0, .LBB276_1 4409; PPC64LE-NEXT: .LBB276_3: 4410; PPC64LE-NEXT: lwsync 4411; PPC64LE-NEXT: blr 4412 %ret = atomicrmw max ptr %ptr, i64 %val acquire 4413 ret i64 %ret 4414} 4415 4416define i64 @test277(ptr %ptr, i64 %val) { 4417; PPC64LE-LABEL: test277: 4418; PPC64LE: # %bb.0: 4419; PPC64LE-NEXT: lwsync 4420; PPC64LE-NEXT: .LBB277_1: 4421; PPC64LE-NEXT: ldarx 5, 0, 3 4422; PPC64LE-NEXT: cmpd 5, 4 4423; PPC64LE-NEXT: bgt 0, .LBB277_3 4424; PPC64LE-NEXT: # %bb.2: 4425; PPC64LE-NEXT: stdcx. 4, 0, 3 4426; PPC64LE-NEXT: bne 0, .LBB277_1 4427; PPC64LE-NEXT: .LBB277_3: 4428; PPC64LE-NEXT: mr 3, 5 4429; PPC64LE-NEXT: blr 4430 %ret = atomicrmw max ptr %ptr, i64 %val release 4431 ret i64 %ret 4432} 4433 4434define i64 @test278(ptr %ptr, i64 %val) { 4435; PPC64LE-LABEL: test278: 4436; PPC64LE: # %bb.0: 4437; PPC64LE-NEXT: lwsync 4438; PPC64LE-NEXT: .LBB278_1: 4439; PPC64LE-NEXT: ldarx 5, 0, 3 4440; PPC64LE-NEXT: cmpd 5, 4 4441; PPC64LE-NEXT: bgt 0, .LBB278_3 4442; PPC64LE-NEXT: # %bb.2: 4443; PPC64LE-NEXT: stdcx. 4, 0, 3 4444; PPC64LE-NEXT: bne 0, .LBB278_1 4445; PPC64LE-NEXT: .LBB278_3: 4446; PPC64LE-NEXT: lwsync 4447; PPC64LE-NEXT: mr 3, 5 4448; PPC64LE-NEXT: blr 4449 %ret = atomicrmw max ptr %ptr, i64 %val acq_rel 4450 ret i64 %ret 4451} 4452 4453define i64 @test279(ptr %ptr, i64 %val) { 4454; PPC64LE-LABEL: test279: 4455; PPC64LE: # %bb.0: 4456; PPC64LE-NEXT: sync 4457; PPC64LE-NEXT: .LBB279_1: 4458; PPC64LE-NEXT: ldarx 5, 0, 3 4459; PPC64LE-NEXT: cmpd 5, 4 4460; PPC64LE-NEXT: bgt 0, .LBB279_3 4461; PPC64LE-NEXT: # %bb.2: 4462; PPC64LE-NEXT: stdcx. 4, 0, 3 4463; PPC64LE-NEXT: bne 0, .LBB279_1 4464; PPC64LE-NEXT: .LBB279_3: 4465; PPC64LE-NEXT: lwsync 4466; PPC64LE-NEXT: mr 3, 5 4467; PPC64LE-NEXT: blr 4468 %ret = atomicrmw max ptr %ptr, i64 %val seq_cst 4469 ret i64 %ret 4470} 4471 4472define i8 @test280(ptr %ptr, i8 %val) { 4473; PPC64LE-LABEL: test280: 4474; PPC64LE: # %bb.0: 4475; PPC64LE-NEXT: extsb 5, 4 4476; PPC64LE-NEXT: .LBB280_1: 4477; PPC64LE-NEXT: lbarx 4, 0, 3 4478; PPC64LE-NEXT: extsb 6, 4 4479; PPC64LE-NEXT: cmpw 6, 5 4480; PPC64LE-NEXT: blt 0, .LBB280_3 4481; PPC64LE-NEXT: # %bb.2: 4482; PPC64LE-NEXT: stbcx. 5, 0, 3 4483; PPC64LE-NEXT: bne 0, .LBB280_1 4484; PPC64LE-NEXT: .LBB280_3: 4485; PPC64LE-NEXT: mr 3, 4 4486; PPC64LE-NEXT: blr 4487 %ret = atomicrmw min ptr %ptr, i8 %val monotonic 4488 ret i8 %ret 4489} 4490 4491define i8 @test281(ptr %ptr, i8 %val) { 4492; PPC64LE-LABEL: test281: 4493; PPC64LE: # %bb.0: 4494; PPC64LE-NEXT: extsb 5, 4 4495; PPC64LE-NEXT: .LBB281_1: 4496; PPC64LE-NEXT: lbarx 4, 0, 3 4497; PPC64LE-NEXT: extsb 6, 4 4498; PPC64LE-NEXT: cmpw 6, 5 4499; PPC64LE-NEXT: blt 0, .LBB281_3 4500; PPC64LE-NEXT: # %bb.2: 4501; PPC64LE-NEXT: stbcx. 5, 0, 3 4502; PPC64LE-NEXT: bne 0, .LBB281_1 4503; PPC64LE-NEXT: .LBB281_3: 4504; PPC64LE-NEXT: lwsync 4505; PPC64LE-NEXT: mr 3, 4 4506; PPC64LE-NEXT: blr 4507 %ret = atomicrmw min ptr %ptr, i8 %val acquire 4508 ret i8 %ret 4509} 4510 4511define i8 @test282(ptr %ptr, i8 %val) { 4512; PPC64LE-LABEL: test282: 4513; PPC64LE: # %bb.0: 4514; PPC64LE-NEXT: lwsync 4515; PPC64LE-NEXT: extsb 5, 4 4516; PPC64LE-NEXT: .LBB282_1: 4517; PPC64LE-NEXT: lbarx 4, 0, 3 4518; PPC64LE-NEXT: extsb 6, 4 4519; PPC64LE-NEXT: cmpw 6, 5 4520; PPC64LE-NEXT: blt 0, .LBB282_3 4521; PPC64LE-NEXT: # %bb.2: 4522; PPC64LE-NEXT: stbcx. 5, 0, 3 4523; PPC64LE-NEXT: bne 0, .LBB282_1 4524; PPC64LE-NEXT: .LBB282_3: 4525; PPC64LE-NEXT: mr 3, 4 4526; PPC64LE-NEXT: blr 4527 %ret = atomicrmw min ptr %ptr, i8 %val release 4528 ret i8 %ret 4529} 4530 4531define i8 @test283(ptr %ptr, i8 %val) { 4532; PPC64LE-LABEL: test283: 4533; PPC64LE: # %bb.0: 4534; PPC64LE-NEXT: lwsync 4535; PPC64LE-NEXT: extsb 5, 4 4536; PPC64LE-NEXT: .LBB283_1: 4537; PPC64LE-NEXT: lbarx 4, 0, 3 4538; PPC64LE-NEXT: extsb 6, 4 4539; PPC64LE-NEXT: cmpw 6, 5 4540; PPC64LE-NEXT: blt 0, .LBB283_3 4541; PPC64LE-NEXT: # %bb.2: 4542; PPC64LE-NEXT: stbcx. 5, 0, 3 4543; PPC64LE-NEXT: bne 0, .LBB283_1 4544; PPC64LE-NEXT: .LBB283_3: 4545; PPC64LE-NEXT: lwsync 4546; PPC64LE-NEXT: mr 3, 4 4547; PPC64LE-NEXT: blr 4548 %ret = atomicrmw min ptr %ptr, i8 %val acq_rel 4549 ret i8 %ret 4550} 4551 4552define i8 @test284(ptr %ptr, i8 %val) { 4553; PPC64LE-LABEL: test284: 4554; PPC64LE: # %bb.0: 4555; PPC64LE-NEXT: sync 4556; PPC64LE-NEXT: extsb 5, 4 4557; PPC64LE-NEXT: .LBB284_1: 4558; PPC64LE-NEXT: lbarx 4, 0, 3 4559; PPC64LE-NEXT: extsb 6, 4 4560; PPC64LE-NEXT: cmpw 6, 5 4561; PPC64LE-NEXT: blt 0, .LBB284_3 4562; PPC64LE-NEXT: # %bb.2: 4563; PPC64LE-NEXT: stbcx. 5, 0, 3 4564; PPC64LE-NEXT: bne 0, .LBB284_1 4565; PPC64LE-NEXT: .LBB284_3: 4566; PPC64LE-NEXT: lwsync 4567; PPC64LE-NEXT: mr 3, 4 4568; PPC64LE-NEXT: blr 4569 %ret = atomicrmw min ptr %ptr, i8 %val seq_cst 4570 ret i8 %ret 4571} 4572 4573define i16 @test285(ptr %ptr, i16 %val) { 4574; PPC64LE-LABEL: test285: 4575; PPC64LE: # %bb.0: 4576; PPC64LE-NEXT: extsh 5, 4 4577; PPC64LE-NEXT: .LBB285_1: 4578; PPC64LE-NEXT: lharx 4, 0, 3 4579; PPC64LE-NEXT: extsh 6, 4 4580; PPC64LE-NEXT: cmpw 6, 5 4581; PPC64LE-NEXT: blt 0, .LBB285_3 4582; PPC64LE-NEXT: # %bb.2: 4583; PPC64LE-NEXT: sthcx. 5, 0, 3 4584; PPC64LE-NEXT: bne 0, .LBB285_1 4585; PPC64LE-NEXT: .LBB285_3: 4586; PPC64LE-NEXT: mr 3, 4 4587; PPC64LE-NEXT: blr 4588 %ret = atomicrmw min ptr %ptr, i16 %val monotonic 4589 ret i16 %ret 4590} 4591 4592define i16 @test286(ptr %ptr, i16 %val) { 4593; PPC64LE-LABEL: test286: 4594; PPC64LE: # %bb.0: 4595; PPC64LE-NEXT: extsh 5, 4 4596; PPC64LE-NEXT: .LBB286_1: 4597; PPC64LE-NEXT: lharx 4, 0, 3 4598; PPC64LE-NEXT: extsh 6, 4 4599; PPC64LE-NEXT: cmpw 6, 5 4600; PPC64LE-NEXT: blt 0, .LBB286_3 4601; PPC64LE-NEXT: # %bb.2: 4602; PPC64LE-NEXT: sthcx. 5, 0, 3 4603; PPC64LE-NEXT: bne 0, .LBB286_1 4604; PPC64LE-NEXT: .LBB286_3: 4605; PPC64LE-NEXT: lwsync 4606; PPC64LE-NEXT: mr 3, 4 4607; PPC64LE-NEXT: blr 4608 %ret = atomicrmw min ptr %ptr, i16 %val acquire 4609 ret i16 %ret 4610} 4611 4612define i16 @test287(ptr %ptr, i16 %val) { 4613; PPC64LE-LABEL: test287: 4614; PPC64LE: # %bb.0: 4615; PPC64LE-NEXT: lwsync 4616; PPC64LE-NEXT: extsh 5, 4 4617; PPC64LE-NEXT: .LBB287_1: 4618; PPC64LE-NEXT: lharx 4, 0, 3 4619; PPC64LE-NEXT: extsh 6, 4 4620; PPC64LE-NEXT: cmpw 6, 5 4621; PPC64LE-NEXT: blt 0, .LBB287_3 4622; PPC64LE-NEXT: # %bb.2: 4623; PPC64LE-NEXT: sthcx. 5, 0, 3 4624; PPC64LE-NEXT: bne 0, .LBB287_1 4625; PPC64LE-NEXT: .LBB287_3: 4626; PPC64LE-NEXT: mr 3, 4 4627; PPC64LE-NEXT: blr 4628 %ret = atomicrmw min ptr %ptr, i16 %val release 4629 ret i16 %ret 4630} 4631 4632define i16 @test288(ptr %ptr, i16 %val) { 4633; PPC64LE-LABEL: test288: 4634; PPC64LE: # %bb.0: 4635; PPC64LE-NEXT: lwsync 4636; PPC64LE-NEXT: extsh 5, 4 4637; PPC64LE-NEXT: .LBB288_1: 4638; PPC64LE-NEXT: lharx 4, 0, 3 4639; PPC64LE-NEXT: extsh 6, 4 4640; PPC64LE-NEXT: cmpw 6, 5 4641; PPC64LE-NEXT: blt 0, .LBB288_3 4642; PPC64LE-NEXT: # %bb.2: 4643; PPC64LE-NEXT: sthcx. 5, 0, 3 4644; PPC64LE-NEXT: bne 0, .LBB288_1 4645; PPC64LE-NEXT: .LBB288_3: 4646; PPC64LE-NEXT: lwsync 4647; PPC64LE-NEXT: mr 3, 4 4648; PPC64LE-NEXT: blr 4649 %ret = atomicrmw min ptr %ptr, i16 %val acq_rel 4650 ret i16 %ret 4651} 4652 4653define i16 @test289(ptr %ptr, i16 %val) { 4654; PPC64LE-LABEL: test289: 4655; PPC64LE: # %bb.0: 4656; PPC64LE-NEXT: sync 4657; PPC64LE-NEXT: extsh 5, 4 4658; PPC64LE-NEXT: .LBB289_1: 4659; PPC64LE-NEXT: lharx 4, 0, 3 4660; PPC64LE-NEXT: extsh 6, 4 4661; PPC64LE-NEXT: cmpw 6, 5 4662; PPC64LE-NEXT: blt 0, .LBB289_3 4663; PPC64LE-NEXT: # %bb.2: 4664; PPC64LE-NEXT: sthcx. 5, 0, 3 4665; PPC64LE-NEXT: bne 0, .LBB289_1 4666; PPC64LE-NEXT: .LBB289_3: 4667; PPC64LE-NEXT: lwsync 4668; PPC64LE-NEXT: mr 3, 4 4669; PPC64LE-NEXT: blr 4670 %ret = atomicrmw min ptr %ptr, i16 %val seq_cst 4671 ret i16 %ret 4672} 4673 4674define i32 @test290(ptr %ptr, i32 %val) { 4675; PPC64LE-LABEL: test290: 4676; PPC64LE: # %bb.0: 4677; PPC64LE-NEXT: .LBB290_1: 4678; PPC64LE-NEXT: lwarx 5, 0, 3 4679; PPC64LE-NEXT: cmpw 5, 4 4680; PPC64LE-NEXT: blt 0, .LBB290_3 4681; PPC64LE-NEXT: # %bb.2: 4682; PPC64LE-NEXT: stwcx. 4, 0, 3 4683; PPC64LE-NEXT: bne 0, .LBB290_1 4684; PPC64LE-NEXT: .LBB290_3: 4685; PPC64LE-NEXT: mr 3, 5 4686; PPC64LE-NEXT: blr 4687 %ret = atomicrmw min ptr %ptr, i32 %val monotonic 4688 ret i32 %ret 4689} 4690 4691define i32 @test291(ptr %ptr, i32 %val) { 4692; PPC64LE-LABEL: test291: 4693; PPC64LE: # %bb.0: 4694; PPC64LE-NEXT: mr 5, 3 4695; PPC64LE-NEXT: .LBB291_1: 4696; PPC64LE-NEXT: lwarx 3, 0, 5 4697; PPC64LE-NEXT: cmpw 3, 4 4698; PPC64LE-NEXT: blt 0, .LBB291_3 4699; PPC64LE-NEXT: # %bb.2: 4700; PPC64LE-NEXT: stwcx. 4, 0, 5 4701; PPC64LE-NEXT: bne 0, .LBB291_1 4702; PPC64LE-NEXT: .LBB291_3: 4703; PPC64LE-NEXT: lwsync 4704; PPC64LE-NEXT: blr 4705 %ret = atomicrmw min ptr %ptr, i32 %val acquire 4706 ret i32 %ret 4707} 4708 4709define i32 @test292(ptr %ptr, i32 %val) { 4710; PPC64LE-LABEL: test292: 4711; PPC64LE: # %bb.0: 4712; PPC64LE-NEXT: lwsync 4713; PPC64LE-NEXT: .LBB292_1: 4714; PPC64LE-NEXT: lwarx 5, 0, 3 4715; PPC64LE-NEXT: cmpw 5, 4 4716; PPC64LE-NEXT: blt 0, .LBB292_3 4717; PPC64LE-NEXT: # %bb.2: 4718; PPC64LE-NEXT: stwcx. 4, 0, 3 4719; PPC64LE-NEXT: bne 0, .LBB292_1 4720; PPC64LE-NEXT: .LBB292_3: 4721; PPC64LE-NEXT: mr 3, 5 4722; PPC64LE-NEXT: blr 4723 %ret = atomicrmw min ptr %ptr, i32 %val release 4724 ret i32 %ret 4725} 4726 4727define i32 @test293(ptr %ptr, i32 %val) { 4728; PPC64LE-LABEL: test293: 4729; PPC64LE: # %bb.0: 4730; PPC64LE-NEXT: lwsync 4731; PPC64LE-NEXT: .LBB293_1: 4732; PPC64LE-NEXT: lwarx 5, 0, 3 4733; PPC64LE-NEXT: cmpw 5, 4 4734; PPC64LE-NEXT: blt 0, .LBB293_3 4735; PPC64LE-NEXT: # %bb.2: 4736; PPC64LE-NEXT: stwcx. 4, 0, 3 4737; PPC64LE-NEXT: bne 0, .LBB293_1 4738; PPC64LE-NEXT: .LBB293_3: 4739; PPC64LE-NEXT: lwsync 4740; PPC64LE-NEXT: mr 3, 5 4741; PPC64LE-NEXT: blr 4742 %ret = atomicrmw min ptr %ptr, i32 %val acq_rel 4743 ret i32 %ret 4744} 4745 4746define i32 @test294(ptr %ptr, i32 %val) { 4747; PPC64LE-LABEL: test294: 4748; PPC64LE: # %bb.0: 4749; PPC64LE-NEXT: sync 4750; PPC64LE-NEXT: .LBB294_1: 4751; PPC64LE-NEXT: lwarx 5, 0, 3 4752; PPC64LE-NEXT: cmpw 5, 4 4753; PPC64LE-NEXT: blt 0, .LBB294_3 4754; PPC64LE-NEXT: # %bb.2: 4755; PPC64LE-NEXT: stwcx. 4, 0, 3 4756; PPC64LE-NEXT: bne 0, .LBB294_1 4757; PPC64LE-NEXT: .LBB294_3: 4758; PPC64LE-NEXT: lwsync 4759; PPC64LE-NEXT: mr 3, 5 4760; PPC64LE-NEXT: blr 4761 %ret = atomicrmw min ptr %ptr, i32 %val seq_cst 4762 ret i32 %ret 4763} 4764 4765define i64 @test295(ptr %ptr, i64 %val) { 4766; PPC64LE-LABEL: test295: 4767; PPC64LE: # %bb.0: 4768; PPC64LE-NEXT: .LBB295_1: 4769; PPC64LE-NEXT: ldarx 5, 0, 3 4770; PPC64LE-NEXT: cmpd 5, 4 4771; PPC64LE-NEXT: blt 0, .LBB295_3 4772; PPC64LE-NEXT: # %bb.2: 4773; PPC64LE-NEXT: stdcx. 4, 0, 3 4774; PPC64LE-NEXT: bne 0, .LBB295_1 4775; PPC64LE-NEXT: .LBB295_3: 4776; PPC64LE-NEXT: mr 3, 5 4777; PPC64LE-NEXT: blr 4778 %ret = atomicrmw min ptr %ptr, i64 %val monotonic 4779 ret i64 %ret 4780} 4781 4782define i64 @test296(ptr %ptr, i64 %val) { 4783; PPC64LE-LABEL: test296: 4784; PPC64LE: # %bb.0: 4785; PPC64LE-NEXT: mr 5, 3 4786; PPC64LE-NEXT: .LBB296_1: 4787; PPC64LE-NEXT: ldarx 3, 0, 5 4788; PPC64LE-NEXT: cmpd 3, 4 4789; PPC64LE-NEXT: blt 0, .LBB296_3 4790; PPC64LE-NEXT: # %bb.2: 4791; PPC64LE-NEXT: stdcx. 4, 0, 5 4792; PPC64LE-NEXT: bne 0, .LBB296_1 4793; PPC64LE-NEXT: .LBB296_3: 4794; PPC64LE-NEXT: lwsync 4795; PPC64LE-NEXT: blr 4796 %ret = atomicrmw min ptr %ptr, i64 %val acquire 4797 ret i64 %ret 4798} 4799 4800define i64 @test297(ptr %ptr, i64 %val) { 4801; PPC64LE-LABEL: test297: 4802; PPC64LE: # %bb.0: 4803; PPC64LE-NEXT: lwsync 4804; PPC64LE-NEXT: .LBB297_1: 4805; PPC64LE-NEXT: ldarx 5, 0, 3 4806; PPC64LE-NEXT: cmpd 5, 4 4807; PPC64LE-NEXT: blt 0, .LBB297_3 4808; PPC64LE-NEXT: # %bb.2: 4809; PPC64LE-NEXT: stdcx. 4, 0, 3 4810; PPC64LE-NEXT: bne 0, .LBB297_1 4811; PPC64LE-NEXT: .LBB297_3: 4812; PPC64LE-NEXT: mr 3, 5 4813; PPC64LE-NEXT: blr 4814 %ret = atomicrmw min ptr %ptr, i64 %val release 4815 ret i64 %ret 4816} 4817 4818define i64 @test298(ptr %ptr, i64 %val) { 4819; PPC64LE-LABEL: test298: 4820; PPC64LE: # %bb.0: 4821; PPC64LE-NEXT: lwsync 4822; PPC64LE-NEXT: .LBB298_1: 4823; PPC64LE-NEXT: ldarx 5, 0, 3 4824; PPC64LE-NEXT: cmpd 5, 4 4825; PPC64LE-NEXT: blt 0, .LBB298_3 4826; PPC64LE-NEXT: # %bb.2: 4827; PPC64LE-NEXT: stdcx. 4, 0, 3 4828; PPC64LE-NEXT: bne 0, .LBB298_1 4829; PPC64LE-NEXT: .LBB298_3: 4830; PPC64LE-NEXT: lwsync 4831; PPC64LE-NEXT: mr 3, 5 4832; PPC64LE-NEXT: blr 4833 %ret = atomicrmw min ptr %ptr, i64 %val acq_rel 4834 ret i64 %ret 4835} 4836 4837define i64 @test299(ptr %ptr, i64 %val) { 4838; PPC64LE-LABEL: test299: 4839; PPC64LE: # %bb.0: 4840; PPC64LE-NEXT: sync 4841; PPC64LE-NEXT: .LBB299_1: 4842; PPC64LE-NEXT: ldarx 5, 0, 3 4843; PPC64LE-NEXT: cmpd 5, 4 4844; PPC64LE-NEXT: blt 0, .LBB299_3 4845; PPC64LE-NEXT: # %bb.2: 4846; PPC64LE-NEXT: stdcx. 4, 0, 3 4847; PPC64LE-NEXT: bne 0, .LBB299_1 4848; PPC64LE-NEXT: .LBB299_3: 4849; PPC64LE-NEXT: lwsync 4850; PPC64LE-NEXT: mr 3, 5 4851; PPC64LE-NEXT: blr 4852 %ret = atomicrmw min ptr %ptr, i64 %val seq_cst 4853 ret i64 %ret 4854} 4855 4856define i8 @test300(ptr %ptr, i8 %val) { 4857; PPC64LE-LABEL: test300: 4858; PPC64LE: # %bb.0: 4859; PPC64LE-NEXT: .LBB300_1: 4860; PPC64LE-NEXT: lbarx 5, 0, 3 4861; PPC64LE-NEXT: cmplw 5, 4 4862; PPC64LE-NEXT: bgt 0, .LBB300_3 4863; PPC64LE-NEXT: # %bb.2: 4864; PPC64LE-NEXT: stbcx. 4, 0, 3 4865; PPC64LE-NEXT: bne 0, .LBB300_1 4866; PPC64LE-NEXT: .LBB300_3: 4867; PPC64LE-NEXT: mr 3, 5 4868; PPC64LE-NEXT: blr 4869 %ret = atomicrmw umax ptr %ptr, i8 %val monotonic 4870 ret i8 %ret 4871} 4872 4873define i8 @test301(ptr %ptr, i8 %val) { 4874; PPC64LE-LABEL: test301: 4875; PPC64LE: # %bb.0: 4876; PPC64LE-NEXT: mr 5, 3 4877; PPC64LE-NEXT: .LBB301_1: 4878; PPC64LE-NEXT: lbarx 3, 0, 5 4879; PPC64LE-NEXT: cmplw 3, 4 4880; PPC64LE-NEXT: bgt 0, .LBB301_3 4881; PPC64LE-NEXT: # %bb.2: 4882; PPC64LE-NEXT: stbcx. 4, 0, 5 4883; PPC64LE-NEXT: bne 0, .LBB301_1 4884; PPC64LE-NEXT: .LBB301_3: 4885; PPC64LE-NEXT: lwsync 4886; PPC64LE-NEXT: blr 4887 %ret = atomicrmw umax ptr %ptr, i8 %val acquire 4888 ret i8 %ret 4889} 4890 4891define i8 @test302(ptr %ptr, i8 %val) { 4892; PPC64LE-LABEL: test302: 4893; PPC64LE: # %bb.0: 4894; PPC64LE-NEXT: lwsync 4895; PPC64LE-NEXT: .LBB302_1: 4896; PPC64LE-NEXT: lbarx 5, 0, 3 4897; PPC64LE-NEXT: cmplw 5, 4 4898; PPC64LE-NEXT: bgt 0, .LBB302_3 4899; PPC64LE-NEXT: # %bb.2: 4900; PPC64LE-NEXT: stbcx. 4, 0, 3 4901; PPC64LE-NEXT: bne 0, .LBB302_1 4902; PPC64LE-NEXT: .LBB302_3: 4903; PPC64LE-NEXT: mr 3, 5 4904; PPC64LE-NEXT: blr 4905 %ret = atomicrmw umax ptr %ptr, i8 %val release 4906 ret i8 %ret 4907} 4908 4909define i8 @test303(ptr %ptr, i8 %val) { 4910; PPC64LE-LABEL: test303: 4911; PPC64LE: # %bb.0: 4912; PPC64LE-NEXT: lwsync 4913; PPC64LE-NEXT: .LBB303_1: 4914; PPC64LE-NEXT: lbarx 5, 0, 3 4915; PPC64LE-NEXT: cmplw 5, 4 4916; PPC64LE-NEXT: bgt 0, .LBB303_3 4917; PPC64LE-NEXT: # %bb.2: 4918; PPC64LE-NEXT: stbcx. 4, 0, 3 4919; PPC64LE-NEXT: bne 0, .LBB303_1 4920; PPC64LE-NEXT: .LBB303_3: 4921; PPC64LE-NEXT: lwsync 4922; PPC64LE-NEXT: mr 3, 5 4923; PPC64LE-NEXT: blr 4924 %ret = atomicrmw umax ptr %ptr, i8 %val acq_rel 4925 ret i8 %ret 4926} 4927 4928define i8 @test304(ptr %ptr, i8 %val) { 4929; PPC64LE-LABEL: test304: 4930; PPC64LE: # %bb.0: 4931; PPC64LE-NEXT: sync 4932; PPC64LE-NEXT: .LBB304_1: 4933; PPC64LE-NEXT: lbarx 5, 0, 3 4934; PPC64LE-NEXT: cmplw 5, 4 4935; PPC64LE-NEXT: bgt 0, .LBB304_3 4936; PPC64LE-NEXT: # %bb.2: 4937; PPC64LE-NEXT: stbcx. 4, 0, 3 4938; PPC64LE-NEXT: bne 0, .LBB304_1 4939; PPC64LE-NEXT: .LBB304_3: 4940; PPC64LE-NEXT: lwsync 4941; PPC64LE-NEXT: mr 3, 5 4942; PPC64LE-NEXT: blr 4943 %ret = atomicrmw umax ptr %ptr, i8 %val seq_cst 4944 ret i8 %ret 4945} 4946 4947define i16 @test305(ptr %ptr, i16 %val) { 4948; PPC64LE-LABEL: test305: 4949; PPC64LE: # %bb.0: 4950; PPC64LE-NEXT: .LBB305_1: 4951; PPC64LE-NEXT: lharx 5, 0, 3 4952; PPC64LE-NEXT: cmplw 5, 4 4953; PPC64LE-NEXT: bgt 0, .LBB305_3 4954; PPC64LE-NEXT: # %bb.2: 4955; PPC64LE-NEXT: sthcx. 4, 0, 3 4956; PPC64LE-NEXT: bne 0, .LBB305_1 4957; PPC64LE-NEXT: .LBB305_3: 4958; PPC64LE-NEXT: mr 3, 5 4959; PPC64LE-NEXT: blr 4960 %ret = atomicrmw umax ptr %ptr, i16 %val monotonic 4961 ret i16 %ret 4962} 4963 4964define i16 @test306(ptr %ptr, i16 %val) { 4965; PPC64LE-LABEL: test306: 4966; PPC64LE: # %bb.0: 4967; PPC64LE-NEXT: mr 5, 3 4968; PPC64LE-NEXT: .LBB306_1: 4969; PPC64LE-NEXT: lharx 3, 0, 5 4970; PPC64LE-NEXT: cmplw 3, 4 4971; PPC64LE-NEXT: bgt 0, .LBB306_3 4972; PPC64LE-NEXT: # %bb.2: 4973; PPC64LE-NEXT: sthcx. 4, 0, 5 4974; PPC64LE-NEXT: bne 0, .LBB306_1 4975; PPC64LE-NEXT: .LBB306_3: 4976; PPC64LE-NEXT: lwsync 4977; PPC64LE-NEXT: blr 4978 %ret = atomicrmw umax ptr %ptr, i16 %val acquire 4979 ret i16 %ret 4980} 4981 4982define i16 @test307(ptr %ptr, i16 %val) { 4983; PPC64LE-LABEL: test307: 4984; PPC64LE: # %bb.0: 4985; PPC64LE-NEXT: lwsync 4986; PPC64LE-NEXT: .LBB307_1: 4987; PPC64LE-NEXT: lharx 5, 0, 3 4988; PPC64LE-NEXT: cmplw 5, 4 4989; PPC64LE-NEXT: bgt 0, .LBB307_3 4990; PPC64LE-NEXT: # %bb.2: 4991; PPC64LE-NEXT: sthcx. 4, 0, 3 4992; PPC64LE-NEXT: bne 0, .LBB307_1 4993; PPC64LE-NEXT: .LBB307_3: 4994; PPC64LE-NEXT: mr 3, 5 4995; PPC64LE-NEXT: blr 4996 %ret = atomicrmw umax ptr %ptr, i16 %val release 4997 ret i16 %ret 4998} 4999 5000define i16 @test308(ptr %ptr, i16 %val) { 5001; PPC64LE-LABEL: test308: 5002; PPC64LE: # %bb.0: 5003; PPC64LE-NEXT: lwsync 5004; PPC64LE-NEXT: .LBB308_1: 5005; PPC64LE-NEXT: lharx 5, 0, 3 5006; PPC64LE-NEXT: cmplw 5, 4 5007; PPC64LE-NEXT: bgt 0, .LBB308_3 5008; PPC64LE-NEXT: # %bb.2: 5009; PPC64LE-NEXT: sthcx. 4, 0, 3 5010; PPC64LE-NEXT: bne 0, .LBB308_1 5011; PPC64LE-NEXT: .LBB308_3: 5012; PPC64LE-NEXT: lwsync 5013; PPC64LE-NEXT: mr 3, 5 5014; PPC64LE-NEXT: blr 5015 %ret = atomicrmw umax ptr %ptr, i16 %val acq_rel 5016 ret i16 %ret 5017} 5018 5019define i16 @test309(ptr %ptr, i16 %val) { 5020; PPC64LE-LABEL: test309: 5021; PPC64LE: # %bb.0: 5022; PPC64LE-NEXT: sync 5023; PPC64LE-NEXT: .LBB309_1: 5024; PPC64LE-NEXT: lharx 5, 0, 3 5025; PPC64LE-NEXT: cmplw 5, 4 5026; PPC64LE-NEXT: bgt 0, .LBB309_3 5027; PPC64LE-NEXT: # %bb.2: 5028; PPC64LE-NEXT: sthcx. 4, 0, 3 5029; PPC64LE-NEXT: bne 0, .LBB309_1 5030; PPC64LE-NEXT: .LBB309_3: 5031; PPC64LE-NEXT: lwsync 5032; PPC64LE-NEXT: mr 3, 5 5033; PPC64LE-NEXT: blr 5034 %ret = atomicrmw umax ptr %ptr, i16 %val seq_cst 5035 ret i16 %ret 5036} 5037 5038define i32 @test310(ptr %ptr, i32 %val) { 5039; PPC64LE-LABEL: test310: 5040; PPC64LE: # %bb.0: 5041; PPC64LE-NEXT: .LBB310_1: 5042; PPC64LE-NEXT: lwarx 5, 0, 3 5043; PPC64LE-NEXT: cmplw 5, 4 5044; PPC64LE-NEXT: bgt 0, .LBB310_3 5045; PPC64LE-NEXT: # %bb.2: 5046; PPC64LE-NEXT: stwcx. 4, 0, 3 5047; PPC64LE-NEXT: bne 0, .LBB310_1 5048; PPC64LE-NEXT: .LBB310_3: 5049; PPC64LE-NEXT: mr 3, 5 5050; PPC64LE-NEXT: blr 5051 %ret = atomicrmw umax ptr %ptr, i32 %val monotonic 5052 ret i32 %ret 5053} 5054 5055define i32 @test311(ptr %ptr, i32 %val) { 5056; PPC64LE-LABEL: test311: 5057; PPC64LE: # %bb.0: 5058; PPC64LE-NEXT: mr 5, 3 5059; PPC64LE-NEXT: .LBB311_1: 5060; PPC64LE-NEXT: lwarx 3, 0, 5 5061; PPC64LE-NEXT: cmplw 3, 4 5062; PPC64LE-NEXT: bgt 0, .LBB311_3 5063; PPC64LE-NEXT: # %bb.2: 5064; PPC64LE-NEXT: stwcx. 4, 0, 5 5065; PPC64LE-NEXT: bne 0, .LBB311_1 5066; PPC64LE-NEXT: .LBB311_3: 5067; PPC64LE-NEXT: lwsync 5068; PPC64LE-NEXT: blr 5069 %ret = atomicrmw umax ptr %ptr, i32 %val acquire 5070 ret i32 %ret 5071} 5072 5073define i32 @test312(ptr %ptr, i32 %val) { 5074; PPC64LE-LABEL: test312: 5075; PPC64LE: # %bb.0: 5076; PPC64LE-NEXT: lwsync 5077; PPC64LE-NEXT: .LBB312_1: 5078; PPC64LE-NEXT: lwarx 5, 0, 3 5079; PPC64LE-NEXT: cmplw 5, 4 5080; PPC64LE-NEXT: bgt 0, .LBB312_3 5081; PPC64LE-NEXT: # %bb.2: 5082; PPC64LE-NEXT: stwcx. 4, 0, 3 5083; PPC64LE-NEXT: bne 0, .LBB312_1 5084; PPC64LE-NEXT: .LBB312_3: 5085; PPC64LE-NEXT: mr 3, 5 5086; PPC64LE-NEXT: blr 5087 %ret = atomicrmw umax ptr %ptr, i32 %val release 5088 ret i32 %ret 5089} 5090 5091define i32 @test313(ptr %ptr, i32 %val) { 5092; PPC64LE-LABEL: test313: 5093; PPC64LE: # %bb.0: 5094; PPC64LE-NEXT: lwsync 5095; PPC64LE-NEXT: .LBB313_1: 5096; PPC64LE-NEXT: lwarx 5, 0, 3 5097; PPC64LE-NEXT: cmplw 5, 4 5098; PPC64LE-NEXT: bgt 0, .LBB313_3 5099; PPC64LE-NEXT: # %bb.2: 5100; PPC64LE-NEXT: stwcx. 4, 0, 3 5101; PPC64LE-NEXT: bne 0, .LBB313_1 5102; PPC64LE-NEXT: .LBB313_3: 5103; PPC64LE-NEXT: lwsync 5104; PPC64LE-NEXT: mr 3, 5 5105; PPC64LE-NEXT: blr 5106 %ret = atomicrmw umax ptr %ptr, i32 %val acq_rel 5107 ret i32 %ret 5108} 5109 5110define i32 @test314(ptr %ptr, i32 %val) { 5111; PPC64LE-LABEL: test314: 5112; PPC64LE: # %bb.0: 5113; PPC64LE-NEXT: sync 5114; PPC64LE-NEXT: .LBB314_1: 5115; PPC64LE-NEXT: lwarx 5, 0, 3 5116; PPC64LE-NEXT: cmplw 5, 4 5117; PPC64LE-NEXT: bgt 0, .LBB314_3 5118; PPC64LE-NEXT: # %bb.2: 5119; PPC64LE-NEXT: stwcx. 4, 0, 3 5120; PPC64LE-NEXT: bne 0, .LBB314_1 5121; PPC64LE-NEXT: .LBB314_3: 5122; PPC64LE-NEXT: lwsync 5123; PPC64LE-NEXT: mr 3, 5 5124; PPC64LE-NEXT: blr 5125 %ret = atomicrmw umax ptr %ptr, i32 %val seq_cst 5126 ret i32 %ret 5127} 5128 5129define i64 @test315(ptr %ptr, i64 %val) { 5130; PPC64LE-LABEL: test315: 5131; PPC64LE: # %bb.0: 5132; PPC64LE-NEXT: .LBB315_1: 5133; PPC64LE-NEXT: ldarx 5, 0, 3 5134; PPC64LE-NEXT: cmpld 5, 4 5135; PPC64LE-NEXT: bgt 0, .LBB315_3 5136; PPC64LE-NEXT: # %bb.2: 5137; PPC64LE-NEXT: stdcx. 4, 0, 3 5138; PPC64LE-NEXT: bne 0, .LBB315_1 5139; PPC64LE-NEXT: .LBB315_3: 5140; PPC64LE-NEXT: mr 3, 5 5141; PPC64LE-NEXT: blr 5142 %ret = atomicrmw umax ptr %ptr, i64 %val monotonic 5143 ret i64 %ret 5144} 5145 5146define i64 @test316(ptr %ptr, i64 %val) { 5147; PPC64LE-LABEL: test316: 5148; PPC64LE: # %bb.0: 5149; PPC64LE-NEXT: mr 5, 3 5150; PPC64LE-NEXT: .LBB316_1: 5151; PPC64LE-NEXT: ldarx 3, 0, 5 5152; PPC64LE-NEXT: cmpld 3, 4 5153; PPC64LE-NEXT: bgt 0, .LBB316_3 5154; PPC64LE-NEXT: # %bb.2: 5155; PPC64LE-NEXT: stdcx. 4, 0, 5 5156; PPC64LE-NEXT: bne 0, .LBB316_1 5157; PPC64LE-NEXT: .LBB316_3: 5158; PPC64LE-NEXT: lwsync 5159; PPC64LE-NEXT: blr 5160 %ret = atomicrmw umax ptr %ptr, i64 %val acquire 5161 ret i64 %ret 5162} 5163 5164define i64 @test317(ptr %ptr, i64 %val) { 5165; PPC64LE-LABEL: test317: 5166; PPC64LE: # %bb.0: 5167; PPC64LE-NEXT: lwsync 5168; PPC64LE-NEXT: .LBB317_1: 5169; PPC64LE-NEXT: ldarx 5, 0, 3 5170; PPC64LE-NEXT: cmpld 5, 4 5171; PPC64LE-NEXT: bgt 0, .LBB317_3 5172; PPC64LE-NEXT: # %bb.2: 5173; PPC64LE-NEXT: stdcx. 4, 0, 3 5174; PPC64LE-NEXT: bne 0, .LBB317_1 5175; PPC64LE-NEXT: .LBB317_3: 5176; PPC64LE-NEXT: mr 3, 5 5177; PPC64LE-NEXT: blr 5178 %ret = atomicrmw umax ptr %ptr, i64 %val release 5179 ret i64 %ret 5180} 5181 5182define i64 @test318(ptr %ptr, i64 %val) { 5183; PPC64LE-LABEL: test318: 5184; PPC64LE: # %bb.0: 5185; PPC64LE-NEXT: lwsync 5186; PPC64LE-NEXT: .LBB318_1: 5187; PPC64LE-NEXT: ldarx 5, 0, 3 5188; PPC64LE-NEXT: cmpld 5, 4 5189; PPC64LE-NEXT: bgt 0, .LBB318_3 5190; PPC64LE-NEXT: # %bb.2: 5191; PPC64LE-NEXT: stdcx. 4, 0, 3 5192; PPC64LE-NEXT: bne 0, .LBB318_1 5193; PPC64LE-NEXT: .LBB318_3: 5194; PPC64LE-NEXT: lwsync 5195; PPC64LE-NEXT: mr 3, 5 5196; PPC64LE-NEXT: blr 5197 %ret = atomicrmw umax ptr %ptr, i64 %val acq_rel 5198 ret i64 %ret 5199} 5200 5201define i64 @test319(ptr %ptr, i64 %val) { 5202; PPC64LE-LABEL: test319: 5203; PPC64LE: # %bb.0: 5204; PPC64LE-NEXT: sync 5205; PPC64LE-NEXT: .LBB319_1: 5206; PPC64LE-NEXT: ldarx 5, 0, 3 5207; PPC64LE-NEXT: cmpld 5, 4 5208; PPC64LE-NEXT: bgt 0, .LBB319_3 5209; PPC64LE-NEXT: # %bb.2: 5210; PPC64LE-NEXT: stdcx. 4, 0, 3 5211; PPC64LE-NEXT: bne 0, .LBB319_1 5212; PPC64LE-NEXT: .LBB319_3: 5213; PPC64LE-NEXT: lwsync 5214; PPC64LE-NEXT: mr 3, 5 5215; PPC64LE-NEXT: blr 5216 %ret = atomicrmw umax ptr %ptr, i64 %val seq_cst 5217 ret i64 %ret 5218} 5219 5220define i8 @test320(ptr %ptr, i8 %val) { 5221; PPC64LE-LABEL: test320: 5222; PPC64LE: # %bb.0: 5223; PPC64LE-NEXT: .LBB320_1: 5224; PPC64LE-NEXT: lbarx 5, 0, 3 5225; PPC64LE-NEXT: cmplw 5, 4 5226; PPC64LE-NEXT: blt 0, .LBB320_3 5227; PPC64LE-NEXT: # %bb.2: 5228; PPC64LE-NEXT: stbcx. 4, 0, 3 5229; PPC64LE-NEXT: bne 0, .LBB320_1 5230; PPC64LE-NEXT: .LBB320_3: 5231; PPC64LE-NEXT: mr 3, 5 5232; PPC64LE-NEXT: blr 5233 %ret = atomicrmw umin ptr %ptr, i8 %val monotonic 5234 ret i8 %ret 5235} 5236 5237define i8 @test321(ptr %ptr, i8 %val) { 5238; PPC64LE-LABEL: test321: 5239; PPC64LE: # %bb.0: 5240; PPC64LE-NEXT: mr 5, 3 5241; PPC64LE-NEXT: .LBB321_1: 5242; PPC64LE-NEXT: lbarx 3, 0, 5 5243; PPC64LE-NEXT: cmplw 3, 4 5244; PPC64LE-NEXT: blt 0, .LBB321_3 5245; PPC64LE-NEXT: # %bb.2: 5246; PPC64LE-NEXT: stbcx. 4, 0, 5 5247; PPC64LE-NEXT: bne 0, .LBB321_1 5248; PPC64LE-NEXT: .LBB321_3: 5249; PPC64LE-NEXT: lwsync 5250; PPC64LE-NEXT: blr 5251 %ret = atomicrmw umin ptr %ptr, i8 %val acquire 5252 ret i8 %ret 5253} 5254 5255define i8 @test322(ptr %ptr, i8 %val) { 5256; PPC64LE-LABEL: test322: 5257; PPC64LE: # %bb.0: 5258; PPC64LE-NEXT: lwsync 5259; PPC64LE-NEXT: .LBB322_1: 5260; PPC64LE-NEXT: lbarx 5, 0, 3 5261; PPC64LE-NEXT: cmplw 5, 4 5262; PPC64LE-NEXT: blt 0, .LBB322_3 5263; PPC64LE-NEXT: # %bb.2: 5264; PPC64LE-NEXT: stbcx. 4, 0, 3 5265; PPC64LE-NEXT: bne 0, .LBB322_1 5266; PPC64LE-NEXT: .LBB322_3: 5267; PPC64LE-NEXT: mr 3, 5 5268; PPC64LE-NEXT: blr 5269 %ret = atomicrmw umin ptr %ptr, i8 %val release 5270 ret i8 %ret 5271} 5272 5273define i8 @test323(ptr %ptr, i8 %val) { 5274; PPC64LE-LABEL: test323: 5275; PPC64LE: # %bb.0: 5276; PPC64LE-NEXT: lwsync 5277; PPC64LE-NEXT: .LBB323_1: 5278; PPC64LE-NEXT: lbarx 5, 0, 3 5279; PPC64LE-NEXT: cmplw 5, 4 5280; PPC64LE-NEXT: blt 0, .LBB323_3 5281; PPC64LE-NEXT: # %bb.2: 5282; PPC64LE-NEXT: stbcx. 4, 0, 3 5283; PPC64LE-NEXT: bne 0, .LBB323_1 5284; PPC64LE-NEXT: .LBB323_3: 5285; PPC64LE-NEXT: lwsync 5286; PPC64LE-NEXT: mr 3, 5 5287; PPC64LE-NEXT: blr 5288 %ret = atomicrmw umin ptr %ptr, i8 %val acq_rel 5289 ret i8 %ret 5290} 5291 5292define i8 @test324(ptr %ptr, i8 %val) { 5293; PPC64LE-LABEL: test324: 5294; PPC64LE: # %bb.0: 5295; PPC64LE-NEXT: sync 5296; PPC64LE-NEXT: .LBB324_1: 5297; PPC64LE-NEXT: lbarx 5, 0, 3 5298; PPC64LE-NEXT: cmplw 5, 4 5299; PPC64LE-NEXT: blt 0, .LBB324_3 5300; PPC64LE-NEXT: # %bb.2: 5301; PPC64LE-NEXT: stbcx. 4, 0, 3 5302; PPC64LE-NEXT: bne 0, .LBB324_1 5303; PPC64LE-NEXT: .LBB324_3: 5304; PPC64LE-NEXT: lwsync 5305; PPC64LE-NEXT: mr 3, 5 5306; PPC64LE-NEXT: blr 5307 %ret = atomicrmw umin ptr %ptr, i8 %val seq_cst 5308 ret i8 %ret 5309} 5310 5311define i16 @test325(ptr %ptr, i16 %val) { 5312; PPC64LE-LABEL: test325: 5313; PPC64LE: # %bb.0: 5314; PPC64LE-NEXT: .LBB325_1: 5315; PPC64LE-NEXT: lharx 5, 0, 3 5316; PPC64LE-NEXT: cmplw 5, 4 5317; PPC64LE-NEXT: blt 0, .LBB325_3 5318; PPC64LE-NEXT: # %bb.2: 5319; PPC64LE-NEXT: sthcx. 4, 0, 3 5320; PPC64LE-NEXT: bne 0, .LBB325_1 5321; PPC64LE-NEXT: .LBB325_3: 5322; PPC64LE-NEXT: mr 3, 5 5323; PPC64LE-NEXT: blr 5324 %ret = atomicrmw umin ptr %ptr, i16 %val monotonic 5325 ret i16 %ret 5326} 5327 5328define i16 @test326(ptr %ptr, i16 %val) { 5329; PPC64LE-LABEL: test326: 5330; PPC64LE: # %bb.0: 5331; PPC64LE-NEXT: mr 5, 3 5332; PPC64LE-NEXT: .LBB326_1: 5333; PPC64LE-NEXT: lharx 3, 0, 5 5334; PPC64LE-NEXT: cmplw 3, 4 5335; PPC64LE-NEXT: blt 0, .LBB326_3 5336; PPC64LE-NEXT: # %bb.2: 5337; PPC64LE-NEXT: sthcx. 4, 0, 5 5338; PPC64LE-NEXT: bne 0, .LBB326_1 5339; PPC64LE-NEXT: .LBB326_3: 5340; PPC64LE-NEXT: lwsync 5341; PPC64LE-NEXT: blr 5342 %ret = atomicrmw umin ptr %ptr, i16 %val acquire 5343 ret i16 %ret 5344} 5345 5346define i16 @test327(ptr %ptr, i16 %val) { 5347; PPC64LE-LABEL: test327: 5348; PPC64LE: # %bb.0: 5349; PPC64LE-NEXT: lwsync 5350; PPC64LE-NEXT: .LBB327_1: 5351; PPC64LE-NEXT: lharx 5, 0, 3 5352; PPC64LE-NEXT: cmplw 5, 4 5353; PPC64LE-NEXT: blt 0, .LBB327_3 5354; PPC64LE-NEXT: # %bb.2: 5355; PPC64LE-NEXT: sthcx. 4, 0, 3 5356; PPC64LE-NEXT: bne 0, .LBB327_1 5357; PPC64LE-NEXT: .LBB327_3: 5358; PPC64LE-NEXT: mr 3, 5 5359; PPC64LE-NEXT: blr 5360 %ret = atomicrmw umin ptr %ptr, i16 %val release 5361 ret i16 %ret 5362} 5363 5364define i16 @test328(ptr %ptr, i16 %val) { 5365; PPC64LE-LABEL: test328: 5366; PPC64LE: # %bb.0: 5367; PPC64LE-NEXT: lwsync 5368; PPC64LE-NEXT: .LBB328_1: 5369; PPC64LE-NEXT: lharx 5, 0, 3 5370; PPC64LE-NEXT: cmplw 5, 4 5371; PPC64LE-NEXT: blt 0, .LBB328_3 5372; PPC64LE-NEXT: # %bb.2: 5373; PPC64LE-NEXT: sthcx. 4, 0, 3 5374; PPC64LE-NEXT: bne 0, .LBB328_1 5375; PPC64LE-NEXT: .LBB328_3: 5376; PPC64LE-NEXT: lwsync 5377; PPC64LE-NEXT: mr 3, 5 5378; PPC64LE-NEXT: blr 5379 %ret = atomicrmw umin ptr %ptr, i16 %val acq_rel 5380 ret i16 %ret 5381} 5382 5383define i16 @test329(ptr %ptr, i16 %val) { 5384; PPC64LE-LABEL: test329: 5385; PPC64LE: # %bb.0: 5386; PPC64LE-NEXT: sync 5387; PPC64LE-NEXT: .LBB329_1: 5388; PPC64LE-NEXT: lharx 5, 0, 3 5389; PPC64LE-NEXT: cmplw 5, 4 5390; PPC64LE-NEXT: blt 0, .LBB329_3 5391; PPC64LE-NEXT: # %bb.2: 5392; PPC64LE-NEXT: sthcx. 4, 0, 3 5393; PPC64LE-NEXT: bne 0, .LBB329_1 5394; PPC64LE-NEXT: .LBB329_3: 5395; PPC64LE-NEXT: lwsync 5396; PPC64LE-NEXT: mr 3, 5 5397; PPC64LE-NEXT: blr 5398 %ret = atomicrmw umin ptr %ptr, i16 %val seq_cst 5399 ret i16 %ret 5400} 5401 5402define i32 @test330(ptr %ptr, i32 %val) { 5403; PPC64LE-LABEL: test330: 5404; PPC64LE: # %bb.0: 5405; PPC64LE-NEXT: .LBB330_1: 5406; PPC64LE-NEXT: lwarx 5, 0, 3 5407; PPC64LE-NEXT: cmplw 5, 4 5408; PPC64LE-NEXT: blt 0, .LBB330_3 5409; PPC64LE-NEXT: # %bb.2: 5410; PPC64LE-NEXT: stwcx. 4, 0, 3 5411; PPC64LE-NEXT: bne 0, .LBB330_1 5412; PPC64LE-NEXT: .LBB330_3: 5413; PPC64LE-NEXT: mr 3, 5 5414; PPC64LE-NEXT: blr 5415 %ret = atomicrmw umin ptr %ptr, i32 %val monotonic 5416 ret i32 %ret 5417} 5418 5419define i32 @test331(ptr %ptr, i32 %val) { 5420; PPC64LE-LABEL: test331: 5421; PPC64LE: # %bb.0: 5422; PPC64LE-NEXT: mr 5, 3 5423; PPC64LE-NEXT: .LBB331_1: 5424; PPC64LE-NEXT: lwarx 3, 0, 5 5425; PPC64LE-NEXT: cmplw 3, 4 5426; PPC64LE-NEXT: blt 0, .LBB331_3 5427; PPC64LE-NEXT: # %bb.2: 5428; PPC64LE-NEXT: stwcx. 4, 0, 5 5429; PPC64LE-NEXT: bne 0, .LBB331_1 5430; PPC64LE-NEXT: .LBB331_3: 5431; PPC64LE-NEXT: lwsync 5432; PPC64LE-NEXT: blr 5433 %ret = atomicrmw umin ptr %ptr, i32 %val acquire 5434 ret i32 %ret 5435} 5436 5437define i32 @test332(ptr %ptr, i32 %val) { 5438; PPC64LE-LABEL: test332: 5439; PPC64LE: # %bb.0: 5440; PPC64LE-NEXT: lwsync 5441; PPC64LE-NEXT: .LBB332_1: 5442; PPC64LE-NEXT: lwarx 5, 0, 3 5443; PPC64LE-NEXT: cmplw 5, 4 5444; PPC64LE-NEXT: blt 0, .LBB332_3 5445; PPC64LE-NEXT: # %bb.2: 5446; PPC64LE-NEXT: stwcx. 4, 0, 3 5447; PPC64LE-NEXT: bne 0, .LBB332_1 5448; PPC64LE-NEXT: .LBB332_3: 5449; PPC64LE-NEXT: mr 3, 5 5450; PPC64LE-NEXT: blr 5451 %ret = atomicrmw umin ptr %ptr, i32 %val release 5452 ret i32 %ret 5453} 5454 5455define i32 @test333(ptr %ptr, i32 %val) { 5456; PPC64LE-LABEL: test333: 5457; PPC64LE: # %bb.0: 5458; PPC64LE-NEXT: lwsync 5459; PPC64LE-NEXT: .LBB333_1: 5460; PPC64LE-NEXT: lwarx 5, 0, 3 5461; PPC64LE-NEXT: cmplw 5, 4 5462; PPC64LE-NEXT: blt 0, .LBB333_3 5463; PPC64LE-NEXT: # %bb.2: 5464; PPC64LE-NEXT: stwcx. 4, 0, 3 5465; PPC64LE-NEXT: bne 0, .LBB333_1 5466; PPC64LE-NEXT: .LBB333_3: 5467; PPC64LE-NEXT: lwsync 5468; PPC64LE-NEXT: mr 3, 5 5469; PPC64LE-NEXT: blr 5470 %ret = atomicrmw umin ptr %ptr, i32 %val acq_rel 5471 ret i32 %ret 5472} 5473 5474define i32 @test334(ptr %ptr, i32 %val) { 5475; PPC64LE-LABEL: test334: 5476; PPC64LE: # %bb.0: 5477; PPC64LE-NEXT: sync 5478; PPC64LE-NEXT: .LBB334_1: 5479; PPC64LE-NEXT: lwarx 5, 0, 3 5480; PPC64LE-NEXT: cmplw 5, 4 5481; PPC64LE-NEXT: blt 0, .LBB334_3 5482; PPC64LE-NEXT: # %bb.2: 5483; PPC64LE-NEXT: stwcx. 4, 0, 3 5484; PPC64LE-NEXT: bne 0, .LBB334_1 5485; PPC64LE-NEXT: .LBB334_3: 5486; PPC64LE-NEXT: lwsync 5487; PPC64LE-NEXT: mr 3, 5 5488; PPC64LE-NEXT: blr 5489 %ret = atomicrmw umin ptr %ptr, i32 %val seq_cst 5490 ret i32 %ret 5491} 5492 5493define i64 @test335(ptr %ptr, i64 %val) { 5494; PPC64LE-LABEL: test335: 5495; PPC64LE: # %bb.0: 5496; PPC64LE-NEXT: .LBB335_1: 5497; PPC64LE-NEXT: ldarx 5, 0, 3 5498; PPC64LE-NEXT: cmpld 5, 4 5499; PPC64LE-NEXT: blt 0, .LBB335_3 5500; PPC64LE-NEXT: # %bb.2: 5501; PPC64LE-NEXT: stdcx. 4, 0, 3 5502; PPC64LE-NEXT: bne 0, .LBB335_1 5503; PPC64LE-NEXT: .LBB335_3: 5504; PPC64LE-NEXT: mr 3, 5 5505; PPC64LE-NEXT: blr 5506 %ret = atomicrmw umin ptr %ptr, i64 %val monotonic 5507 ret i64 %ret 5508} 5509 5510define i64 @test336(ptr %ptr, i64 %val) { 5511; PPC64LE-LABEL: test336: 5512; PPC64LE: # %bb.0: 5513; PPC64LE-NEXT: mr 5, 3 5514; PPC64LE-NEXT: .LBB336_1: 5515; PPC64LE-NEXT: ldarx 3, 0, 5 5516; PPC64LE-NEXT: cmpld 3, 4 5517; PPC64LE-NEXT: blt 0, .LBB336_3 5518; PPC64LE-NEXT: # %bb.2: 5519; PPC64LE-NEXT: stdcx. 4, 0, 5 5520; PPC64LE-NEXT: bne 0, .LBB336_1 5521; PPC64LE-NEXT: .LBB336_3: 5522; PPC64LE-NEXT: lwsync 5523; PPC64LE-NEXT: blr 5524 %ret = atomicrmw umin ptr %ptr, i64 %val acquire 5525 ret i64 %ret 5526} 5527 5528define i64 @test337(ptr %ptr, i64 %val) { 5529; PPC64LE-LABEL: test337: 5530; PPC64LE: # %bb.0: 5531; PPC64LE-NEXT: lwsync 5532; PPC64LE-NEXT: .LBB337_1: 5533; PPC64LE-NEXT: ldarx 5, 0, 3 5534; PPC64LE-NEXT: cmpld 5, 4 5535; PPC64LE-NEXT: blt 0, .LBB337_3 5536; PPC64LE-NEXT: # %bb.2: 5537; PPC64LE-NEXT: stdcx. 4, 0, 3 5538; PPC64LE-NEXT: bne 0, .LBB337_1 5539; PPC64LE-NEXT: .LBB337_3: 5540; PPC64LE-NEXT: mr 3, 5 5541; PPC64LE-NEXT: blr 5542 %ret = atomicrmw umin ptr %ptr, i64 %val release 5543 ret i64 %ret 5544} 5545 5546define i64 @test338(ptr %ptr, i64 %val) { 5547; PPC64LE-LABEL: test338: 5548; PPC64LE: # %bb.0: 5549; PPC64LE-NEXT: lwsync 5550; PPC64LE-NEXT: .LBB338_1: 5551; PPC64LE-NEXT: ldarx 5, 0, 3 5552; PPC64LE-NEXT: cmpld 5, 4 5553; PPC64LE-NEXT: blt 0, .LBB338_3 5554; PPC64LE-NEXT: # %bb.2: 5555; PPC64LE-NEXT: stdcx. 4, 0, 3 5556; PPC64LE-NEXT: bne 0, .LBB338_1 5557; PPC64LE-NEXT: .LBB338_3: 5558; PPC64LE-NEXT: lwsync 5559; PPC64LE-NEXT: mr 3, 5 5560; PPC64LE-NEXT: blr 5561 %ret = atomicrmw umin ptr %ptr, i64 %val acq_rel 5562 ret i64 %ret 5563} 5564 5565define i64 @test339(ptr %ptr, i64 %val) { 5566; PPC64LE-LABEL: test339: 5567; PPC64LE: # %bb.0: 5568; PPC64LE-NEXT: sync 5569; PPC64LE-NEXT: .LBB339_1: 5570; PPC64LE-NEXT: ldarx 5, 0, 3 5571; PPC64LE-NEXT: cmpld 5, 4 5572; PPC64LE-NEXT: blt 0, .LBB339_3 5573; PPC64LE-NEXT: # %bb.2: 5574; PPC64LE-NEXT: stdcx. 4, 0, 3 5575; PPC64LE-NEXT: bne 0, .LBB339_1 5576; PPC64LE-NEXT: .LBB339_3: 5577; PPC64LE-NEXT: lwsync 5578; PPC64LE-NEXT: mr 3, 5 5579; PPC64LE-NEXT: blr 5580 %ret = atomicrmw umin ptr %ptr, i64 %val seq_cst 5581 ret i64 %ret 5582} 5583 5584define i8 @test340(ptr %ptr, i8 %val) { 5585; PPC64LE-LABEL: test340: 5586; PPC64LE: # %bb.0: 5587; PPC64LE-NEXT: .LBB340_1: 5588; PPC64LE-NEXT: lbarx 5, 0, 3 5589; PPC64LE-NEXT: stbcx. 4, 0, 3 5590; PPC64LE-NEXT: bne 0, .LBB340_1 5591; PPC64LE-NEXT: # %bb.2: 5592; PPC64LE-NEXT: mr 3, 5 5593; PPC64LE-NEXT: blr 5594 %ret = atomicrmw xchg ptr %ptr, i8 %val syncscope("singlethread") monotonic 5595 ret i8 %ret 5596} 5597 5598define i8 @test341(ptr %ptr, i8 %val) { 5599; PPC64LE-LABEL: test341: 5600; PPC64LE: # %bb.0: 5601; PPC64LE-NEXT: mr 5, 3 5602; PPC64LE-NEXT: .LBB341_1: 5603; PPC64LE-NEXT: lbarx 3, 0, 5 5604; PPC64LE-NEXT: stbcx. 4, 0, 5 5605; PPC64LE-NEXT: bne 0, .LBB341_1 5606; PPC64LE-NEXT: # %bb.2: 5607; PPC64LE-NEXT: lwsync 5608; PPC64LE-NEXT: blr 5609 %ret = atomicrmw xchg ptr %ptr, i8 %val syncscope("singlethread") acquire 5610 ret i8 %ret 5611} 5612 5613define i8 @test342(ptr %ptr, i8 %val) { 5614; PPC64LE-LABEL: test342: 5615; PPC64LE: # %bb.0: 5616; PPC64LE-NEXT: lwsync 5617; PPC64LE-NEXT: .LBB342_1: 5618; PPC64LE-NEXT: lbarx 5, 0, 3 5619; PPC64LE-NEXT: stbcx. 4, 0, 3 5620; PPC64LE-NEXT: bne 0, .LBB342_1 5621; PPC64LE-NEXT: # %bb.2: 5622; PPC64LE-NEXT: mr 3, 5 5623; PPC64LE-NEXT: blr 5624 %ret = atomicrmw xchg ptr %ptr, i8 %val syncscope("singlethread") release 5625 ret i8 %ret 5626} 5627 5628define i8 @test343(ptr %ptr, i8 %val) { 5629; PPC64LE-LABEL: test343: 5630; PPC64LE: # %bb.0: 5631; PPC64LE-NEXT: lwsync 5632; PPC64LE-NEXT: .LBB343_1: 5633; PPC64LE-NEXT: lbarx 5, 0, 3 5634; PPC64LE-NEXT: stbcx. 4, 0, 3 5635; PPC64LE-NEXT: bne 0, .LBB343_1 5636; PPC64LE-NEXT: # %bb.2: 5637; PPC64LE-NEXT: lwsync 5638; PPC64LE-NEXT: mr 3, 5 5639; PPC64LE-NEXT: blr 5640 %ret = atomicrmw xchg ptr %ptr, i8 %val syncscope("singlethread") acq_rel 5641 ret i8 %ret 5642} 5643 5644define i8 @test344(ptr %ptr, i8 %val) { 5645; PPC64LE-LABEL: test344: 5646; PPC64LE: # %bb.0: 5647; PPC64LE-NEXT: sync 5648; PPC64LE-NEXT: .LBB344_1: 5649; PPC64LE-NEXT: lbarx 5, 0, 3 5650; PPC64LE-NEXT: stbcx. 4, 0, 3 5651; PPC64LE-NEXT: bne 0, .LBB344_1 5652; PPC64LE-NEXT: # %bb.2: 5653; PPC64LE-NEXT: lwsync 5654; PPC64LE-NEXT: mr 3, 5 5655; PPC64LE-NEXT: blr 5656 %ret = atomicrmw xchg ptr %ptr, i8 %val syncscope("singlethread") seq_cst 5657 ret i8 %ret 5658} 5659 5660define i16 @test345(ptr %ptr, i16 %val) { 5661; PPC64LE-LABEL: test345: 5662; PPC64LE: # %bb.0: 5663; PPC64LE-NEXT: .LBB345_1: 5664; PPC64LE-NEXT: lharx 5, 0, 3 5665; PPC64LE-NEXT: sthcx. 4, 0, 3 5666; PPC64LE-NEXT: bne 0, .LBB345_1 5667; PPC64LE-NEXT: # %bb.2: 5668; PPC64LE-NEXT: mr 3, 5 5669; PPC64LE-NEXT: blr 5670 %ret = atomicrmw xchg ptr %ptr, i16 %val syncscope("singlethread") monotonic 5671 ret i16 %ret 5672} 5673 5674define i16 @test346(ptr %ptr, i16 %val) { 5675; PPC64LE-LABEL: test346: 5676; PPC64LE: # %bb.0: 5677; PPC64LE-NEXT: mr 5, 3 5678; PPC64LE-NEXT: .LBB346_1: 5679; PPC64LE-NEXT: lharx 3, 0, 5 5680; PPC64LE-NEXT: sthcx. 4, 0, 5 5681; PPC64LE-NEXT: bne 0, .LBB346_1 5682; PPC64LE-NEXT: # %bb.2: 5683; PPC64LE-NEXT: lwsync 5684; PPC64LE-NEXT: blr 5685 %ret = atomicrmw xchg ptr %ptr, i16 %val syncscope("singlethread") acquire 5686 ret i16 %ret 5687} 5688 5689define i16 @test347(ptr %ptr, i16 %val) { 5690; PPC64LE-LABEL: test347: 5691; PPC64LE: # %bb.0: 5692; PPC64LE-NEXT: lwsync 5693; PPC64LE-NEXT: .LBB347_1: 5694; PPC64LE-NEXT: lharx 5, 0, 3 5695; PPC64LE-NEXT: sthcx. 4, 0, 3 5696; PPC64LE-NEXT: bne 0, .LBB347_1 5697; PPC64LE-NEXT: # %bb.2: 5698; PPC64LE-NEXT: mr 3, 5 5699; PPC64LE-NEXT: blr 5700 %ret = atomicrmw xchg ptr %ptr, i16 %val syncscope("singlethread") release 5701 ret i16 %ret 5702} 5703 5704define i16 @test348(ptr %ptr, i16 %val) { 5705; PPC64LE-LABEL: test348: 5706; PPC64LE: # %bb.0: 5707; PPC64LE-NEXT: lwsync 5708; PPC64LE-NEXT: .LBB348_1: 5709; PPC64LE-NEXT: lharx 5, 0, 3 5710; PPC64LE-NEXT: sthcx. 4, 0, 3 5711; PPC64LE-NEXT: bne 0, .LBB348_1 5712; PPC64LE-NEXT: # %bb.2: 5713; PPC64LE-NEXT: lwsync 5714; PPC64LE-NEXT: mr 3, 5 5715; PPC64LE-NEXT: blr 5716 %ret = atomicrmw xchg ptr %ptr, i16 %val syncscope("singlethread") acq_rel 5717 ret i16 %ret 5718} 5719 5720define i16 @test349(ptr %ptr, i16 %val) { 5721; PPC64LE-LABEL: test349: 5722; PPC64LE: # %bb.0: 5723; PPC64LE-NEXT: sync 5724; PPC64LE-NEXT: .LBB349_1: 5725; PPC64LE-NEXT: lharx 5, 0, 3 5726; PPC64LE-NEXT: sthcx. 4, 0, 3 5727; PPC64LE-NEXT: bne 0, .LBB349_1 5728; PPC64LE-NEXT: # %bb.2: 5729; PPC64LE-NEXT: lwsync 5730; PPC64LE-NEXT: mr 3, 5 5731; PPC64LE-NEXT: blr 5732 %ret = atomicrmw xchg ptr %ptr, i16 %val syncscope("singlethread") seq_cst 5733 ret i16 %ret 5734} 5735 5736define i32 @test350(ptr %ptr, i32 %val) { 5737; PPC64LE-LABEL: test350: 5738; PPC64LE: # %bb.0: 5739; PPC64LE-NEXT: .LBB350_1: 5740; PPC64LE-NEXT: lwarx 5, 0, 3 5741; PPC64LE-NEXT: stwcx. 4, 0, 3 5742; PPC64LE-NEXT: bne 0, .LBB350_1 5743; PPC64LE-NEXT: # %bb.2: 5744; PPC64LE-NEXT: mr 3, 5 5745; PPC64LE-NEXT: blr 5746 %ret = atomicrmw xchg ptr %ptr, i32 %val syncscope("singlethread") monotonic 5747 ret i32 %ret 5748} 5749 5750define i32 @test351(ptr %ptr, i32 %val) { 5751; PPC64LE-LABEL: test351: 5752; PPC64LE: # %bb.0: 5753; PPC64LE-NEXT: mr 5, 3 5754; PPC64LE-NEXT: .LBB351_1: 5755; PPC64LE-NEXT: lwarx 3, 0, 5 5756; PPC64LE-NEXT: stwcx. 4, 0, 5 5757; PPC64LE-NEXT: bne 0, .LBB351_1 5758; PPC64LE-NEXT: # %bb.2: 5759; PPC64LE-NEXT: lwsync 5760; PPC64LE-NEXT: blr 5761 %ret = atomicrmw xchg ptr %ptr, i32 %val syncscope("singlethread") acquire 5762 ret i32 %ret 5763} 5764 5765define i32 @test352(ptr %ptr, i32 %val) { 5766; PPC64LE-LABEL: test352: 5767; PPC64LE: # %bb.0: 5768; PPC64LE-NEXT: lwsync 5769; PPC64LE-NEXT: .LBB352_1: 5770; PPC64LE-NEXT: lwarx 5, 0, 3 5771; PPC64LE-NEXT: stwcx. 4, 0, 3 5772; PPC64LE-NEXT: bne 0, .LBB352_1 5773; PPC64LE-NEXT: # %bb.2: 5774; PPC64LE-NEXT: mr 3, 5 5775; PPC64LE-NEXT: blr 5776 %ret = atomicrmw xchg ptr %ptr, i32 %val syncscope("singlethread") release 5777 ret i32 %ret 5778} 5779 5780define i32 @test353(ptr %ptr, i32 %val) { 5781; PPC64LE-LABEL: test353: 5782; PPC64LE: # %bb.0: 5783; PPC64LE-NEXT: lwsync 5784; PPC64LE-NEXT: .LBB353_1: 5785; PPC64LE-NEXT: lwarx 5, 0, 3 5786; PPC64LE-NEXT: stwcx. 4, 0, 3 5787; PPC64LE-NEXT: bne 0, .LBB353_1 5788; PPC64LE-NEXT: # %bb.2: 5789; PPC64LE-NEXT: lwsync 5790; PPC64LE-NEXT: mr 3, 5 5791; PPC64LE-NEXT: blr 5792 %ret = atomicrmw xchg ptr %ptr, i32 %val syncscope("singlethread") acq_rel 5793 ret i32 %ret 5794} 5795 5796define i32 @test354(ptr %ptr, i32 %val) { 5797; PPC64LE-LABEL: test354: 5798; PPC64LE: # %bb.0: 5799; PPC64LE-NEXT: sync 5800; PPC64LE-NEXT: .LBB354_1: 5801; PPC64LE-NEXT: lwarx 5, 0, 3 5802; PPC64LE-NEXT: stwcx. 4, 0, 3 5803; PPC64LE-NEXT: bne 0, .LBB354_1 5804; PPC64LE-NEXT: # %bb.2: 5805; PPC64LE-NEXT: lwsync 5806; PPC64LE-NEXT: mr 3, 5 5807; PPC64LE-NEXT: blr 5808 %ret = atomicrmw xchg ptr %ptr, i32 %val syncscope("singlethread") seq_cst 5809 ret i32 %ret 5810} 5811 5812define i64 @test355(ptr %ptr, i64 %val) { 5813; PPC64LE-LABEL: test355: 5814; PPC64LE: # %bb.0: 5815; PPC64LE-NEXT: .LBB355_1: 5816; PPC64LE-NEXT: ldarx 5, 0, 3 5817; PPC64LE-NEXT: stdcx. 4, 0, 3 5818; PPC64LE-NEXT: bne 0, .LBB355_1 5819; PPC64LE-NEXT: # %bb.2: 5820; PPC64LE-NEXT: mr 3, 5 5821; PPC64LE-NEXT: blr 5822 %ret = atomicrmw xchg ptr %ptr, i64 %val syncscope("singlethread") monotonic 5823 ret i64 %ret 5824} 5825 5826define i64 @test356(ptr %ptr, i64 %val) { 5827; PPC64LE-LABEL: test356: 5828; PPC64LE: # %bb.0: 5829; PPC64LE-NEXT: mr 5, 3 5830; PPC64LE-NEXT: .LBB356_1: 5831; PPC64LE-NEXT: ldarx 3, 0, 5 5832; PPC64LE-NEXT: stdcx. 4, 0, 5 5833; PPC64LE-NEXT: bne 0, .LBB356_1 5834; PPC64LE-NEXT: # %bb.2: 5835; PPC64LE-NEXT: lwsync 5836; PPC64LE-NEXT: blr 5837 %ret = atomicrmw xchg ptr %ptr, i64 %val syncscope("singlethread") acquire 5838 ret i64 %ret 5839} 5840 5841define i64 @test357(ptr %ptr, i64 %val) { 5842; PPC64LE-LABEL: test357: 5843; PPC64LE: # %bb.0: 5844; PPC64LE-NEXT: lwsync 5845; PPC64LE-NEXT: .LBB357_1: 5846; PPC64LE-NEXT: ldarx 5, 0, 3 5847; PPC64LE-NEXT: stdcx. 4, 0, 3 5848; PPC64LE-NEXT: bne 0, .LBB357_1 5849; PPC64LE-NEXT: # %bb.2: 5850; PPC64LE-NEXT: mr 3, 5 5851; PPC64LE-NEXT: blr 5852 %ret = atomicrmw xchg ptr %ptr, i64 %val syncscope("singlethread") release 5853 ret i64 %ret 5854} 5855 5856define i64 @test358(ptr %ptr, i64 %val) { 5857; PPC64LE-LABEL: test358: 5858; PPC64LE: # %bb.0: 5859; PPC64LE-NEXT: lwsync 5860; PPC64LE-NEXT: .LBB358_1: 5861; PPC64LE-NEXT: ldarx 5, 0, 3 5862; PPC64LE-NEXT: stdcx. 4, 0, 3 5863; PPC64LE-NEXT: bne 0, .LBB358_1 5864; PPC64LE-NEXT: # %bb.2: 5865; PPC64LE-NEXT: lwsync 5866; PPC64LE-NEXT: mr 3, 5 5867; PPC64LE-NEXT: blr 5868 %ret = atomicrmw xchg ptr %ptr, i64 %val syncscope("singlethread") acq_rel 5869 ret i64 %ret 5870} 5871 5872define i64 @test359(ptr %ptr, i64 %val) { 5873; PPC64LE-LABEL: test359: 5874; PPC64LE: # %bb.0: 5875; PPC64LE-NEXT: sync 5876; PPC64LE-NEXT: .LBB359_1: 5877; PPC64LE-NEXT: ldarx 5, 0, 3 5878; PPC64LE-NEXT: stdcx. 4, 0, 3 5879; PPC64LE-NEXT: bne 0, .LBB359_1 5880; PPC64LE-NEXT: # %bb.2: 5881; PPC64LE-NEXT: lwsync 5882; PPC64LE-NEXT: mr 3, 5 5883; PPC64LE-NEXT: blr 5884 %ret = atomicrmw xchg ptr %ptr, i64 %val syncscope("singlethread") seq_cst 5885 ret i64 %ret 5886} 5887 5888define i8 @test360(ptr %ptr, i8 %val) { 5889; PPC64LE-LABEL: test360: 5890; PPC64LE: # %bb.0: 5891; PPC64LE-NEXT: .LBB360_1: 5892; PPC64LE-NEXT: lbarx 5, 0, 3 5893; PPC64LE-NEXT: add 6, 4, 5 5894; PPC64LE-NEXT: stbcx. 6, 0, 3 5895; PPC64LE-NEXT: bne 0, .LBB360_1 5896; PPC64LE-NEXT: # %bb.2: 5897; PPC64LE-NEXT: mr 3, 5 5898; PPC64LE-NEXT: blr 5899 %ret = atomicrmw add ptr %ptr, i8 %val syncscope("singlethread") monotonic 5900 ret i8 %ret 5901} 5902 5903define i8 @test361(ptr %ptr, i8 %val) { 5904; PPC64LE-LABEL: test361: 5905; PPC64LE: # %bb.0: 5906; PPC64LE-NEXT: mr 5, 3 5907; PPC64LE-NEXT: .LBB361_1: 5908; PPC64LE-NEXT: lbarx 3, 0, 5 5909; PPC64LE-NEXT: add 6, 4, 3 5910; PPC64LE-NEXT: stbcx. 6, 0, 5 5911; PPC64LE-NEXT: bne 0, .LBB361_1 5912; PPC64LE-NEXT: # %bb.2: 5913; PPC64LE-NEXT: lwsync 5914; PPC64LE-NEXT: blr 5915 %ret = atomicrmw add ptr %ptr, i8 %val syncscope("singlethread") acquire 5916 ret i8 %ret 5917} 5918 5919define i8 @test362(ptr %ptr, i8 %val) { 5920; PPC64LE-LABEL: test362: 5921; PPC64LE: # %bb.0: 5922; PPC64LE-NEXT: lwsync 5923; PPC64LE-NEXT: .LBB362_1: 5924; PPC64LE-NEXT: lbarx 5, 0, 3 5925; PPC64LE-NEXT: add 6, 4, 5 5926; PPC64LE-NEXT: stbcx. 6, 0, 3 5927; PPC64LE-NEXT: bne 0, .LBB362_1 5928; PPC64LE-NEXT: # %bb.2: 5929; PPC64LE-NEXT: mr 3, 5 5930; PPC64LE-NEXT: blr 5931 %ret = atomicrmw add ptr %ptr, i8 %val syncscope("singlethread") release 5932 ret i8 %ret 5933} 5934 5935define i8 @test363(ptr %ptr, i8 %val) { 5936; PPC64LE-LABEL: test363: 5937; PPC64LE: # %bb.0: 5938; PPC64LE-NEXT: lwsync 5939; PPC64LE-NEXT: .LBB363_1: 5940; PPC64LE-NEXT: lbarx 5, 0, 3 5941; PPC64LE-NEXT: add 6, 4, 5 5942; PPC64LE-NEXT: stbcx. 6, 0, 3 5943; PPC64LE-NEXT: bne 0, .LBB363_1 5944; PPC64LE-NEXT: # %bb.2: 5945; PPC64LE-NEXT: lwsync 5946; PPC64LE-NEXT: mr 3, 5 5947; PPC64LE-NEXT: blr 5948 %ret = atomicrmw add ptr %ptr, i8 %val syncscope("singlethread") acq_rel 5949 ret i8 %ret 5950} 5951 5952define i8 @test364(ptr %ptr, i8 %val) { 5953; PPC64LE-LABEL: test364: 5954; PPC64LE: # %bb.0: 5955; PPC64LE-NEXT: sync 5956; PPC64LE-NEXT: .LBB364_1: 5957; PPC64LE-NEXT: lbarx 5, 0, 3 5958; PPC64LE-NEXT: add 6, 4, 5 5959; PPC64LE-NEXT: stbcx. 6, 0, 3 5960; PPC64LE-NEXT: bne 0, .LBB364_1 5961; PPC64LE-NEXT: # %bb.2: 5962; PPC64LE-NEXT: lwsync 5963; PPC64LE-NEXT: mr 3, 5 5964; PPC64LE-NEXT: blr 5965 %ret = atomicrmw add ptr %ptr, i8 %val syncscope("singlethread") seq_cst 5966 ret i8 %ret 5967} 5968 5969define i16 @test365(ptr %ptr, i16 %val) { 5970; PPC64LE-LABEL: test365: 5971; PPC64LE: # %bb.0: 5972; PPC64LE-NEXT: .LBB365_1: 5973; PPC64LE-NEXT: lharx 5, 0, 3 5974; PPC64LE-NEXT: add 6, 4, 5 5975; PPC64LE-NEXT: sthcx. 6, 0, 3 5976; PPC64LE-NEXT: bne 0, .LBB365_1 5977; PPC64LE-NEXT: # %bb.2: 5978; PPC64LE-NEXT: mr 3, 5 5979; PPC64LE-NEXT: blr 5980 %ret = atomicrmw add ptr %ptr, i16 %val syncscope("singlethread") monotonic 5981 ret i16 %ret 5982} 5983 5984define i16 @test366(ptr %ptr, i16 %val) { 5985; PPC64LE-LABEL: test366: 5986; PPC64LE: # %bb.0: 5987; PPC64LE-NEXT: mr 5, 3 5988; PPC64LE-NEXT: .LBB366_1: 5989; PPC64LE-NEXT: lharx 3, 0, 5 5990; PPC64LE-NEXT: add 6, 4, 3 5991; PPC64LE-NEXT: sthcx. 6, 0, 5 5992; PPC64LE-NEXT: bne 0, .LBB366_1 5993; PPC64LE-NEXT: # %bb.2: 5994; PPC64LE-NEXT: lwsync 5995; PPC64LE-NEXT: blr 5996 %ret = atomicrmw add ptr %ptr, i16 %val syncscope("singlethread") acquire 5997 ret i16 %ret 5998} 5999 6000define i16 @test367(ptr %ptr, i16 %val) { 6001; PPC64LE-LABEL: test367: 6002; PPC64LE: # %bb.0: 6003; PPC64LE-NEXT: lwsync 6004; PPC64LE-NEXT: .LBB367_1: 6005; PPC64LE-NEXT: lharx 5, 0, 3 6006; PPC64LE-NEXT: add 6, 4, 5 6007; PPC64LE-NEXT: sthcx. 6, 0, 3 6008; PPC64LE-NEXT: bne 0, .LBB367_1 6009; PPC64LE-NEXT: # %bb.2: 6010; PPC64LE-NEXT: mr 3, 5 6011; PPC64LE-NEXT: blr 6012 %ret = atomicrmw add ptr %ptr, i16 %val syncscope("singlethread") release 6013 ret i16 %ret 6014} 6015 6016define i16 @test368(ptr %ptr, i16 %val) { 6017; PPC64LE-LABEL: test368: 6018; PPC64LE: # %bb.0: 6019; PPC64LE-NEXT: lwsync 6020; PPC64LE-NEXT: .LBB368_1: 6021; PPC64LE-NEXT: lharx 5, 0, 3 6022; PPC64LE-NEXT: add 6, 4, 5 6023; PPC64LE-NEXT: sthcx. 6, 0, 3 6024; PPC64LE-NEXT: bne 0, .LBB368_1 6025; PPC64LE-NEXT: # %bb.2: 6026; PPC64LE-NEXT: lwsync 6027; PPC64LE-NEXT: mr 3, 5 6028; PPC64LE-NEXT: blr 6029 %ret = atomicrmw add ptr %ptr, i16 %val syncscope("singlethread") acq_rel 6030 ret i16 %ret 6031} 6032 6033define i16 @test369(ptr %ptr, i16 %val) { 6034; PPC64LE-LABEL: test369: 6035; PPC64LE: # %bb.0: 6036; PPC64LE-NEXT: sync 6037; PPC64LE-NEXT: .LBB369_1: 6038; PPC64LE-NEXT: lharx 5, 0, 3 6039; PPC64LE-NEXT: add 6, 4, 5 6040; PPC64LE-NEXT: sthcx. 6, 0, 3 6041; PPC64LE-NEXT: bne 0, .LBB369_1 6042; PPC64LE-NEXT: # %bb.2: 6043; PPC64LE-NEXT: lwsync 6044; PPC64LE-NEXT: mr 3, 5 6045; PPC64LE-NEXT: blr 6046 %ret = atomicrmw add ptr %ptr, i16 %val syncscope("singlethread") seq_cst 6047 ret i16 %ret 6048} 6049 6050define i32 @test370(ptr %ptr, i32 %val) { 6051; PPC64LE-LABEL: test370: 6052; PPC64LE: # %bb.0: 6053; PPC64LE-NEXT: .LBB370_1: 6054; PPC64LE-NEXT: lwarx 5, 0, 3 6055; PPC64LE-NEXT: add 6, 4, 5 6056; PPC64LE-NEXT: stwcx. 6, 0, 3 6057; PPC64LE-NEXT: bne 0, .LBB370_1 6058; PPC64LE-NEXT: # %bb.2: 6059; PPC64LE-NEXT: mr 3, 5 6060; PPC64LE-NEXT: blr 6061 %ret = atomicrmw add ptr %ptr, i32 %val syncscope("singlethread") monotonic 6062 ret i32 %ret 6063} 6064 6065define i32 @test371(ptr %ptr, i32 %val) { 6066; PPC64LE-LABEL: test371: 6067; PPC64LE: # %bb.0: 6068; PPC64LE-NEXT: mr 5, 3 6069; PPC64LE-NEXT: .LBB371_1: 6070; PPC64LE-NEXT: lwarx 3, 0, 5 6071; PPC64LE-NEXT: add 6, 4, 3 6072; PPC64LE-NEXT: stwcx. 6, 0, 5 6073; PPC64LE-NEXT: bne 0, .LBB371_1 6074; PPC64LE-NEXT: # %bb.2: 6075; PPC64LE-NEXT: lwsync 6076; PPC64LE-NEXT: blr 6077 %ret = atomicrmw add ptr %ptr, i32 %val syncscope("singlethread") acquire 6078 ret i32 %ret 6079} 6080 6081define i32 @test372(ptr %ptr, i32 %val) { 6082; PPC64LE-LABEL: test372: 6083; PPC64LE: # %bb.0: 6084; PPC64LE-NEXT: lwsync 6085; PPC64LE-NEXT: .LBB372_1: 6086; PPC64LE-NEXT: lwarx 5, 0, 3 6087; PPC64LE-NEXT: add 6, 4, 5 6088; PPC64LE-NEXT: stwcx. 6, 0, 3 6089; PPC64LE-NEXT: bne 0, .LBB372_1 6090; PPC64LE-NEXT: # %bb.2: 6091; PPC64LE-NEXT: mr 3, 5 6092; PPC64LE-NEXT: blr 6093 %ret = atomicrmw add ptr %ptr, i32 %val syncscope("singlethread") release 6094 ret i32 %ret 6095} 6096 6097define i32 @test373(ptr %ptr, i32 %val) { 6098; PPC64LE-LABEL: test373: 6099; PPC64LE: # %bb.0: 6100; PPC64LE-NEXT: lwsync 6101; PPC64LE-NEXT: .LBB373_1: 6102; PPC64LE-NEXT: lwarx 5, 0, 3 6103; PPC64LE-NEXT: add 6, 4, 5 6104; PPC64LE-NEXT: stwcx. 6, 0, 3 6105; PPC64LE-NEXT: bne 0, .LBB373_1 6106; PPC64LE-NEXT: # %bb.2: 6107; PPC64LE-NEXT: lwsync 6108; PPC64LE-NEXT: mr 3, 5 6109; PPC64LE-NEXT: blr 6110 %ret = atomicrmw add ptr %ptr, i32 %val syncscope("singlethread") acq_rel 6111 ret i32 %ret 6112} 6113 6114define i32 @test374(ptr %ptr, i32 %val) { 6115; PPC64LE-LABEL: test374: 6116; PPC64LE: # %bb.0: 6117; PPC64LE-NEXT: sync 6118; PPC64LE-NEXT: .LBB374_1: 6119; PPC64LE-NEXT: lwarx 5, 0, 3 6120; PPC64LE-NEXT: add 6, 4, 5 6121; PPC64LE-NEXT: stwcx. 6, 0, 3 6122; PPC64LE-NEXT: bne 0, .LBB374_1 6123; PPC64LE-NEXT: # %bb.2: 6124; PPC64LE-NEXT: lwsync 6125; PPC64LE-NEXT: mr 3, 5 6126; PPC64LE-NEXT: blr 6127 %ret = atomicrmw add ptr %ptr, i32 %val syncscope("singlethread") seq_cst 6128 ret i32 %ret 6129} 6130 6131define i64 @test375(ptr %ptr, i64 %val) { 6132; PPC64LE-LABEL: test375: 6133; PPC64LE: # %bb.0: 6134; PPC64LE-NEXT: .LBB375_1: 6135; PPC64LE-NEXT: ldarx 5, 0, 3 6136; PPC64LE-NEXT: add 6, 4, 5 6137; PPC64LE-NEXT: stdcx. 6, 0, 3 6138; PPC64LE-NEXT: bne 0, .LBB375_1 6139; PPC64LE-NEXT: # %bb.2: 6140; PPC64LE-NEXT: mr 3, 5 6141; PPC64LE-NEXT: blr 6142 %ret = atomicrmw add ptr %ptr, i64 %val syncscope("singlethread") monotonic 6143 ret i64 %ret 6144} 6145 6146define i64 @test376(ptr %ptr, i64 %val) { 6147; PPC64LE-LABEL: test376: 6148; PPC64LE: # %bb.0: 6149; PPC64LE-NEXT: mr 5, 3 6150; PPC64LE-NEXT: .LBB376_1: 6151; PPC64LE-NEXT: ldarx 3, 0, 5 6152; PPC64LE-NEXT: add 6, 4, 3 6153; PPC64LE-NEXT: stdcx. 6, 0, 5 6154; PPC64LE-NEXT: bne 0, .LBB376_1 6155; PPC64LE-NEXT: # %bb.2: 6156; PPC64LE-NEXT: lwsync 6157; PPC64LE-NEXT: blr 6158 %ret = atomicrmw add ptr %ptr, i64 %val syncscope("singlethread") acquire 6159 ret i64 %ret 6160} 6161 6162define i64 @test377(ptr %ptr, i64 %val) { 6163; PPC64LE-LABEL: test377: 6164; PPC64LE: # %bb.0: 6165; PPC64LE-NEXT: lwsync 6166; PPC64LE-NEXT: .LBB377_1: 6167; PPC64LE-NEXT: ldarx 5, 0, 3 6168; PPC64LE-NEXT: add 6, 4, 5 6169; PPC64LE-NEXT: stdcx. 6, 0, 3 6170; PPC64LE-NEXT: bne 0, .LBB377_1 6171; PPC64LE-NEXT: # %bb.2: 6172; PPC64LE-NEXT: mr 3, 5 6173; PPC64LE-NEXT: blr 6174 %ret = atomicrmw add ptr %ptr, i64 %val syncscope("singlethread") release 6175 ret i64 %ret 6176} 6177 6178define i64 @test378(ptr %ptr, i64 %val) { 6179; PPC64LE-LABEL: test378: 6180; PPC64LE: # %bb.0: 6181; PPC64LE-NEXT: lwsync 6182; PPC64LE-NEXT: .LBB378_1: 6183; PPC64LE-NEXT: ldarx 5, 0, 3 6184; PPC64LE-NEXT: add 6, 4, 5 6185; PPC64LE-NEXT: stdcx. 6, 0, 3 6186; PPC64LE-NEXT: bne 0, .LBB378_1 6187; PPC64LE-NEXT: # %bb.2: 6188; PPC64LE-NEXT: lwsync 6189; PPC64LE-NEXT: mr 3, 5 6190; PPC64LE-NEXT: blr 6191 %ret = atomicrmw add ptr %ptr, i64 %val syncscope("singlethread") acq_rel 6192 ret i64 %ret 6193} 6194 6195define i64 @test379(ptr %ptr, i64 %val) { 6196; PPC64LE-LABEL: test379: 6197; PPC64LE: # %bb.0: 6198; PPC64LE-NEXT: sync 6199; PPC64LE-NEXT: .LBB379_1: 6200; PPC64LE-NEXT: ldarx 5, 0, 3 6201; PPC64LE-NEXT: add 6, 4, 5 6202; PPC64LE-NEXT: stdcx. 6, 0, 3 6203; PPC64LE-NEXT: bne 0, .LBB379_1 6204; PPC64LE-NEXT: # %bb.2: 6205; PPC64LE-NEXT: lwsync 6206; PPC64LE-NEXT: mr 3, 5 6207; PPC64LE-NEXT: blr 6208 %ret = atomicrmw add ptr %ptr, i64 %val syncscope("singlethread") seq_cst 6209 ret i64 %ret 6210} 6211 6212define i8 @test380(ptr %ptr, i8 %val) { 6213; PPC64LE-LABEL: test380: 6214; PPC64LE: # %bb.0: 6215; PPC64LE-NEXT: .LBB380_1: 6216; PPC64LE-NEXT: lbarx 5, 0, 3 6217; PPC64LE-NEXT: sub 6, 5, 4 6218; PPC64LE-NEXT: stbcx. 6, 0, 3 6219; PPC64LE-NEXT: bne 0, .LBB380_1 6220; PPC64LE-NEXT: # %bb.2: 6221; PPC64LE-NEXT: mr 3, 5 6222; PPC64LE-NEXT: blr 6223 %ret = atomicrmw sub ptr %ptr, i8 %val syncscope("singlethread") monotonic 6224 ret i8 %ret 6225} 6226 6227define i8 @test381(ptr %ptr, i8 %val) { 6228; PPC64LE-LABEL: test381: 6229; PPC64LE: # %bb.0: 6230; PPC64LE-NEXT: mr 5, 3 6231; PPC64LE-NEXT: .LBB381_1: 6232; PPC64LE-NEXT: lbarx 3, 0, 5 6233; PPC64LE-NEXT: sub 6, 3, 4 6234; PPC64LE-NEXT: stbcx. 6, 0, 5 6235; PPC64LE-NEXT: bne 0, .LBB381_1 6236; PPC64LE-NEXT: # %bb.2: 6237; PPC64LE-NEXT: lwsync 6238; PPC64LE-NEXT: blr 6239 %ret = atomicrmw sub ptr %ptr, i8 %val syncscope("singlethread") acquire 6240 ret i8 %ret 6241} 6242 6243define i8 @test382(ptr %ptr, i8 %val) { 6244; PPC64LE-LABEL: test382: 6245; PPC64LE: # %bb.0: 6246; PPC64LE-NEXT: lwsync 6247; PPC64LE-NEXT: .LBB382_1: 6248; PPC64LE-NEXT: lbarx 5, 0, 3 6249; PPC64LE-NEXT: sub 6, 5, 4 6250; PPC64LE-NEXT: stbcx. 6, 0, 3 6251; PPC64LE-NEXT: bne 0, .LBB382_1 6252; PPC64LE-NEXT: # %bb.2: 6253; PPC64LE-NEXT: mr 3, 5 6254; PPC64LE-NEXT: blr 6255 %ret = atomicrmw sub ptr %ptr, i8 %val syncscope("singlethread") release 6256 ret i8 %ret 6257} 6258 6259define i8 @test383(ptr %ptr, i8 %val) { 6260; PPC64LE-LABEL: test383: 6261; PPC64LE: # %bb.0: 6262; PPC64LE-NEXT: lwsync 6263; PPC64LE-NEXT: .LBB383_1: 6264; PPC64LE-NEXT: lbarx 5, 0, 3 6265; PPC64LE-NEXT: sub 6, 5, 4 6266; PPC64LE-NEXT: stbcx. 6, 0, 3 6267; PPC64LE-NEXT: bne 0, .LBB383_1 6268; PPC64LE-NEXT: # %bb.2: 6269; PPC64LE-NEXT: lwsync 6270; PPC64LE-NEXT: mr 3, 5 6271; PPC64LE-NEXT: blr 6272 %ret = atomicrmw sub ptr %ptr, i8 %val syncscope("singlethread") acq_rel 6273 ret i8 %ret 6274} 6275 6276define i8 @test384(ptr %ptr, i8 %val) { 6277; PPC64LE-LABEL: test384: 6278; PPC64LE: # %bb.0: 6279; PPC64LE-NEXT: sync 6280; PPC64LE-NEXT: .LBB384_1: 6281; PPC64LE-NEXT: lbarx 5, 0, 3 6282; PPC64LE-NEXT: sub 6, 5, 4 6283; PPC64LE-NEXT: stbcx. 6, 0, 3 6284; PPC64LE-NEXT: bne 0, .LBB384_1 6285; PPC64LE-NEXT: # %bb.2: 6286; PPC64LE-NEXT: lwsync 6287; PPC64LE-NEXT: mr 3, 5 6288; PPC64LE-NEXT: blr 6289 %ret = atomicrmw sub ptr %ptr, i8 %val syncscope("singlethread") seq_cst 6290 ret i8 %ret 6291} 6292 6293define i16 @test385(ptr %ptr, i16 %val) { 6294; PPC64LE-LABEL: test385: 6295; PPC64LE: # %bb.0: 6296; PPC64LE-NEXT: .LBB385_1: 6297; PPC64LE-NEXT: lharx 5, 0, 3 6298; PPC64LE-NEXT: sub 6, 5, 4 6299; PPC64LE-NEXT: sthcx. 6, 0, 3 6300; PPC64LE-NEXT: bne 0, .LBB385_1 6301; PPC64LE-NEXT: # %bb.2: 6302; PPC64LE-NEXT: mr 3, 5 6303; PPC64LE-NEXT: blr 6304 %ret = atomicrmw sub ptr %ptr, i16 %val syncscope("singlethread") monotonic 6305 ret i16 %ret 6306} 6307 6308define i16 @test386(ptr %ptr, i16 %val) { 6309; PPC64LE-LABEL: test386: 6310; PPC64LE: # %bb.0: 6311; PPC64LE-NEXT: mr 5, 3 6312; PPC64LE-NEXT: .LBB386_1: 6313; PPC64LE-NEXT: lharx 3, 0, 5 6314; PPC64LE-NEXT: sub 6, 3, 4 6315; PPC64LE-NEXT: sthcx. 6, 0, 5 6316; PPC64LE-NEXT: bne 0, .LBB386_1 6317; PPC64LE-NEXT: # %bb.2: 6318; PPC64LE-NEXT: lwsync 6319; PPC64LE-NEXT: blr 6320 %ret = atomicrmw sub ptr %ptr, i16 %val syncscope("singlethread") acquire 6321 ret i16 %ret 6322} 6323 6324define i16 @test387(ptr %ptr, i16 %val) { 6325; PPC64LE-LABEL: test387: 6326; PPC64LE: # %bb.0: 6327; PPC64LE-NEXT: lwsync 6328; PPC64LE-NEXT: .LBB387_1: 6329; PPC64LE-NEXT: lharx 5, 0, 3 6330; PPC64LE-NEXT: sub 6, 5, 4 6331; PPC64LE-NEXT: sthcx. 6, 0, 3 6332; PPC64LE-NEXT: bne 0, .LBB387_1 6333; PPC64LE-NEXT: # %bb.2: 6334; PPC64LE-NEXT: mr 3, 5 6335; PPC64LE-NEXT: blr 6336 %ret = atomicrmw sub ptr %ptr, i16 %val syncscope("singlethread") release 6337 ret i16 %ret 6338} 6339 6340define i16 @test388(ptr %ptr, i16 %val) { 6341; PPC64LE-LABEL: test388: 6342; PPC64LE: # %bb.0: 6343; PPC64LE-NEXT: lwsync 6344; PPC64LE-NEXT: .LBB388_1: 6345; PPC64LE-NEXT: lharx 5, 0, 3 6346; PPC64LE-NEXT: sub 6, 5, 4 6347; PPC64LE-NEXT: sthcx. 6, 0, 3 6348; PPC64LE-NEXT: bne 0, .LBB388_1 6349; PPC64LE-NEXT: # %bb.2: 6350; PPC64LE-NEXT: lwsync 6351; PPC64LE-NEXT: mr 3, 5 6352; PPC64LE-NEXT: blr 6353 %ret = atomicrmw sub ptr %ptr, i16 %val syncscope("singlethread") acq_rel 6354 ret i16 %ret 6355} 6356 6357define i16 @test389(ptr %ptr, i16 %val) { 6358; PPC64LE-LABEL: test389: 6359; PPC64LE: # %bb.0: 6360; PPC64LE-NEXT: sync 6361; PPC64LE-NEXT: .LBB389_1: 6362; PPC64LE-NEXT: lharx 5, 0, 3 6363; PPC64LE-NEXT: sub 6, 5, 4 6364; PPC64LE-NEXT: sthcx. 6, 0, 3 6365; PPC64LE-NEXT: bne 0, .LBB389_1 6366; PPC64LE-NEXT: # %bb.2: 6367; PPC64LE-NEXT: lwsync 6368; PPC64LE-NEXT: mr 3, 5 6369; PPC64LE-NEXT: blr 6370 %ret = atomicrmw sub ptr %ptr, i16 %val syncscope("singlethread") seq_cst 6371 ret i16 %ret 6372} 6373 6374define i32 @test390(ptr %ptr, i32 %val) { 6375; PPC64LE-LABEL: test390: 6376; PPC64LE: # %bb.0: 6377; PPC64LE-NEXT: .LBB390_1: 6378; PPC64LE-NEXT: lwarx 5, 0, 3 6379; PPC64LE-NEXT: sub 6, 5, 4 6380; PPC64LE-NEXT: stwcx. 6, 0, 3 6381; PPC64LE-NEXT: bne 0, .LBB390_1 6382; PPC64LE-NEXT: # %bb.2: 6383; PPC64LE-NEXT: mr 3, 5 6384; PPC64LE-NEXT: blr 6385 %ret = atomicrmw sub ptr %ptr, i32 %val syncscope("singlethread") monotonic 6386 ret i32 %ret 6387} 6388 6389define i32 @test391(ptr %ptr, i32 %val) { 6390; PPC64LE-LABEL: test391: 6391; PPC64LE: # %bb.0: 6392; PPC64LE-NEXT: mr 5, 3 6393; PPC64LE-NEXT: .LBB391_1: 6394; PPC64LE-NEXT: lwarx 3, 0, 5 6395; PPC64LE-NEXT: sub 6, 3, 4 6396; PPC64LE-NEXT: stwcx. 6, 0, 5 6397; PPC64LE-NEXT: bne 0, .LBB391_1 6398; PPC64LE-NEXT: # %bb.2: 6399; PPC64LE-NEXT: lwsync 6400; PPC64LE-NEXT: blr 6401 %ret = atomicrmw sub ptr %ptr, i32 %val syncscope("singlethread") acquire 6402 ret i32 %ret 6403} 6404 6405define i32 @test392(ptr %ptr, i32 %val) { 6406; PPC64LE-LABEL: test392: 6407; PPC64LE: # %bb.0: 6408; PPC64LE-NEXT: lwsync 6409; PPC64LE-NEXT: .LBB392_1: 6410; PPC64LE-NEXT: lwarx 5, 0, 3 6411; PPC64LE-NEXT: sub 6, 5, 4 6412; PPC64LE-NEXT: stwcx. 6, 0, 3 6413; PPC64LE-NEXT: bne 0, .LBB392_1 6414; PPC64LE-NEXT: # %bb.2: 6415; PPC64LE-NEXT: mr 3, 5 6416; PPC64LE-NEXT: blr 6417 %ret = atomicrmw sub ptr %ptr, i32 %val syncscope("singlethread") release 6418 ret i32 %ret 6419} 6420 6421define i32 @test393(ptr %ptr, i32 %val) { 6422; PPC64LE-LABEL: test393: 6423; PPC64LE: # %bb.0: 6424; PPC64LE-NEXT: lwsync 6425; PPC64LE-NEXT: .LBB393_1: 6426; PPC64LE-NEXT: lwarx 5, 0, 3 6427; PPC64LE-NEXT: sub 6, 5, 4 6428; PPC64LE-NEXT: stwcx. 6, 0, 3 6429; PPC64LE-NEXT: bne 0, .LBB393_1 6430; PPC64LE-NEXT: # %bb.2: 6431; PPC64LE-NEXT: lwsync 6432; PPC64LE-NEXT: mr 3, 5 6433; PPC64LE-NEXT: blr 6434 %ret = atomicrmw sub ptr %ptr, i32 %val syncscope("singlethread") acq_rel 6435 ret i32 %ret 6436} 6437 6438define i32 @test394(ptr %ptr, i32 %val) { 6439; PPC64LE-LABEL: test394: 6440; PPC64LE: # %bb.0: 6441; PPC64LE-NEXT: sync 6442; PPC64LE-NEXT: .LBB394_1: 6443; PPC64LE-NEXT: lwarx 5, 0, 3 6444; PPC64LE-NEXT: sub 6, 5, 4 6445; PPC64LE-NEXT: stwcx. 6, 0, 3 6446; PPC64LE-NEXT: bne 0, .LBB394_1 6447; PPC64LE-NEXT: # %bb.2: 6448; PPC64LE-NEXT: lwsync 6449; PPC64LE-NEXT: mr 3, 5 6450; PPC64LE-NEXT: blr 6451 %ret = atomicrmw sub ptr %ptr, i32 %val syncscope("singlethread") seq_cst 6452 ret i32 %ret 6453} 6454 6455define i64 @test395(ptr %ptr, i64 %val) { 6456; PPC64LE-LABEL: test395: 6457; PPC64LE: # %bb.0: 6458; PPC64LE-NEXT: .LBB395_1: 6459; PPC64LE-NEXT: ldarx 5, 0, 3 6460; PPC64LE-NEXT: sub 6, 5, 4 6461; PPC64LE-NEXT: stdcx. 6, 0, 3 6462; PPC64LE-NEXT: bne 0, .LBB395_1 6463; PPC64LE-NEXT: # %bb.2: 6464; PPC64LE-NEXT: mr 3, 5 6465; PPC64LE-NEXT: blr 6466 %ret = atomicrmw sub ptr %ptr, i64 %val syncscope("singlethread") monotonic 6467 ret i64 %ret 6468} 6469 6470define i64 @test396(ptr %ptr, i64 %val) { 6471; PPC64LE-LABEL: test396: 6472; PPC64LE: # %bb.0: 6473; PPC64LE-NEXT: mr 5, 3 6474; PPC64LE-NEXT: .LBB396_1: 6475; PPC64LE-NEXT: ldarx 3, 0, 5 6476; PPC64LE-NEXT: sub 6, 3, 4 6477; PPC64LE-NEXT: stdcx. 6, 0, 5 6478; PPC64LE-NEXT: bne 0, .LBB396_1 6479; PPC64LE-NEXT: # %bb.2: 6480; PPC64LE-NEXT: lwsync 6481; PPC64LE-NEXT: blr 6482 %ret = atomicrmw sub ptr %ptr, i64 %val syncscope("singlethread") acquire 6483 ret i64 %ret 6484} 6485 6486define i64 @test397(ptr %ptr, i64 %val) { 6487; PPC64LE-LABEL: test397: 6488; PPC64LE: # %bb.0: 6489; PPC64LE-NEXT: lwsync 6490; PPC64LE-NEXT: .LBB397_1: 6491; PPC64LE-NEXT: ldarx 5, 0, 3 6492; PPC64LE-NEXT: sub 6, 5, 4 6493; PPC64LE-NEXT: stdcx. 6, 0, 3 6494; PPC64LE-NEXT: bne 0, .LBB397_1 6495; PPC64LE-NEXT: # %bb.2: 6496; PPC64LE-NEXT: mr 3, 5 6497; PPC64LE-NEXT: blr 6498 %ret = atomicrmw sub ptr %ptr, i64 %val syncscope("singlethread") release 6499 ret i64 %ret 6500} 6501 6502define i64 @test398(ptr %ptr, i64 %val) { 6503; PPC64LE-LABEL: test398: 6504; PPC64LE: # %bb.0: 6505; PPC64LE-NEXT: lwsync 6506; PPC64LE-NEXT: .LBB398_1: 6507; PPC64LE-NEXT: ldarx 5, 0, 3 6508; PPC64LE-NEXT: sub 6, 5, 4 6509; PPC64LE-NEXT: stdcx. 6, 0, 3 6510; PPC64LE-NEXT: bne 0, .LBB398_1 6511; PPC64LE-NEXT: # %bb.2: 6512; PPC64LE-NEXT: lwsync 6513; PPC64LE-NEXT: mr 3, 5 6514; PPC64LE-NEXT: blr 6515 %ret = atomicrmw sub ptr %ptr, i64 %val syncscope("singlethread") acq_rel 6516 ret i64 %ret 6517} 6518 6519define i64 @test399(ptr %ptr, i64 %val) { 6520; PPC64LE-LABEL: test399: 6521; PPC64LE: # %bb.0: 6522; PPC64LE-NEXT: sync 6523; PPC64LE-NEXT: .LBB399_1: 6524; PPC64LE-NEXT: ldarx 5, 0, 3 6525; PPC64LE-NEXT: sub 6, 5, 4 6526; PPC64LE-NEXT: stdcx. 6, 0, 3 6527; PPC64LE-NEXT: bne 0, .LBB399_1 6528; PPC64LE-NEXT: # %bb.2: 6529; PPC64LE-NEXT: lwsync 6530; PPC64LE-NEXT: mr 3, 5 6531; PPC64LE-NEXT: blr 6532 %ret = atomicrmw sub ptr %ptr, i64 %val syncscope("singlethread") seq_cst 6533 ret i64 %ret 6534} 6535 6536define i8 @test400(ptr %ptr, i8 %val) { 6537; PPC64LE-LABEL: test400: 6538; PPC64LE: # %bb.0: 6539; PPC64LE-NEXT: .LBB400_1: 6540; PPC64LE-NEXT: lbarx 5, 0, 3 6541; PPC64LE-NEXT: and 6, 4, 5 6542; PPC64LE-NEXT: stbcx. 6, 0, 3 6543; PPC64LE-NEXT: bne 0, .LBB400_1 6544; PPC64LE-NEXT: # %bb.2: 6545; PPC64LE-NEXT: mr 3, 5 6546; PPC64LE-NEXT: blr 6547 %ret = atomicrmw and ptr %ptr, i8 %val syncscope("singlethread") monotonic 6548 ret i8 %ret 6549} 6550 6551define i8 @test401(ptr %ptr, i8 %val) { 6552; PPC64LE-LABEL: test401: 6553; PPC64LE: # %bb.0: 6554; PPC64LE-NEXT: mr 5, 3 6555; PPC64LE-NEXT: .LBB401_1: 6556; PPC64LE-NEXT: lbarx 3, 0, 5 6557; PPC64LE-NEXT: and 6, 4, 3 6558; PPC64LE-NEXT: stbcx. 6, 0, 5 6559; PPC64LE-NEXT: bne 0, .LBB401_1 6560; PPC64LE-NEXT: # %bb.2: 6561; PPC64LE-NEXT: lwsync 6562; PPC64LE-NEXT: blr 6563 %ret = atomicrmw and ptr %ptr, i8 %val syncscope("singlethread") acquire 6564 ret i8 %ret 6565} 6566 6567define i8 @test402(ptr %ptr, i8 %val) { 6568; PPC64LE-LABEL: test402: 6569; PPC64LE: # %bb.0: 6570; PPC64LE-NEXT: lwsync 6571; PPC64LE-NEXT: .LBB402_1: 6572; PPC64LE-NEXT: lbarx 5, 0, 3 6573; PPC64LE-NEXT: and 6, 4, 5 6574; PPC64LE-NEXT: stbcx. 6, 0, 3 6575; PPC64LE-NEXT: bne 0, .LBB402_1 6576; PPC64LE-NEXT: # %bb.2: 6577; PPC64LE-NEXT: mr 3, 5 6578; PPC64LE-NEXT: blr 6579 %ret = atomicrmw and ptr %ptr, i8 %val syncscope("singlethread") release 6580 ret i8 %ret 6581} 6582 6583define i8 @test403(ptr %ptr, i8 %val) { 6584; PPC64LE-LABEL: test403: 6585; PPC64LE: # %bb.0: 6586; PPC64LE-NEXT: lwsync 6587; PPC64LE-NEXT: .LBB403_1: 6588; PPC64LE-NEXT: lbarx 5, 0, 3 6589; PPC64LE-NEXT: and 6, 4, 5 6590; PPC64LE-NEXT: stbcx. 6, 0, 3 6591; PPC64LE-NEXT: bne 0, .LBB403_1 6592; PPC64LE-NEXT: # %bb.2: 6593; PPC64LE-NEXT: lwsync 6594; PPC64LE-NEXT: mr 3, 5 6595; PPC64LE-NEXT: blr 6596 %ret = atomicrmw and ptr %ptr, i8 %val syncscope("singlethread") acq_rel 6597 ret i8 %ret 6598} 6599 6600define i8 @test404(ptr %ptr, i8 %val) { 6601; PPC64LE-LABEL: test404: 6602; PPC64LE: # %bb.0: 6603; PPC64LE-NEXT: sync 6604; PPC64LE-NEXT: .LBB404_1: 6605; PPC64LE-NEXT: lbarx 5, 0, 3 6606; PPC64LE-NEXT: and 6, 4, 5 6607; PPC64LE-NEXT: stbcx. 6, 0, 3 6608; PPC64LE-NEXT: bne 0, .LBB404_1 6609; PPC64LE-NEXT: # %bb.2: 6610; PPC64LE-NEXT: lwsync 6611; PPC64LE-NEXT: mr 3, 5 6612; PPC64LE-NEXT: blr 6613 %ret = atomicrmw and ptr %ptr, i8 %val syncscope("singlethread") seq_cst 6614 ret i8 %ret 6615} 6616 6617define i16 @test405(ptr %ptr, i16 %val) { 6618; PPC64LE-LABEL: test405: 6619; PPC64LE: # %bb.0: 6620; PPC64LE-NEXT: .LBB405_1: 6621; PPC64LE-NEXT: lharx 5, 0, 3 6622; PPC64LE-NEXT: and 6, 4, 5 6623; PPC64LE-NEXT: sthcx. 6, 0, 3 6624; PPC64LE-NEXT: bne 0, .LBB405_1 6625; PPC64LE-NEXT: # %bb.2: 6626; PPC64LE-NEXT: mr 3, 5 6627; PPC64LE-NEXT: blr 6628 %ret = atomicrmw and ptr %ptr, i16 %val syncscope("singlethread") monotonic 6629 ret i16 %ret 6630} 6631 6632define i16 @test406(ptr %ptr, i16 %val) { 6633; PPC64LE-LABEL: test406: 6634; PPC64LE: # %bb.0: 6635; PPC64LE-NEXT: mr 5, 3 6636; PPC64LE-NEXT: .LBB406_1: 6637; PPC64LE-NEXT: lharx 3, 0, 5 6638; PPC64LE-NEXT: and 6, 4, 3 6639; PPC64LE-NEXT: sthcx. 6, 0, 5 6640; PPC64LE-NEXT: bne 0, .LBB406_1 6641; PPC64LE-NEXT: # %bb.2: 6642; PPC64LE-NEXT: lwsync 6643; PPC64LE-NEXT: blr 6644 %ret = atomicrmw and ptr %ptr, i16 %val syncscope("singlethread") acquire 6645 ret i16 %ret 6646} 6647 6648define i16 @test407(ptr %ptr, i16 %val) { 6649; PPC64LE-LABEL: test407: 6650; PPC64LE: # %bb.0: 6651; PPC64LE-NEXT: lwsync 6652; PPC64LE-NEXT: .LBB407_1: 6653; PPC64LE-NEXT: lharx 5, 0, 3 6654; PPC64LE-NEXT: and 6, 4, 5 6655; PPC64LE-NEXT: sthcx. 6, 0, 3 6656; PPC64LE-NEXT: bne 0, .LBB407_1 6657; PPC64LE-NEXT: # %bb.2: 6658; PPC64LE-NEXT: mr 3, 5 6659; PPC64LE-NEXT: blr 6660 %ret = atomicrmw and ptr %ptr, i16 %val syncscope("singlethread") release 6661 ret i16 %ret 6662} 6663 6664define i16 @test408(ptr %ptr, i16 %val) { 6665; PPC64LE-LABEL: test408: 6666; PPC64LE: # %bb.0: 6667; PPC64LE-NEXT: lwsync 6668; PPC64LE-NEXT: .LBB408_1: 6669; PPC64LE-NEXT: lharx 5, 0, 3 6670; PPC64LE-NEXT: and 6, 4, 5 6671; PPC64LE-NEXT: sthcx. 6, 0, 3 6672; PPC64LE-NEXT: bne 0, .LBB408_1 6673; PPC64LE-NEXT: # %bb.2: 6674; PPC64LE-NEXT: lwsync 6675; PPC64LE-NEXT: mr 3, 5 6676; PPC64LE-NEXT: blr 6677 %ret = atomicrmw and ptr %ptr, i16 %val syncscope("singlethread") acq_rel 6678 ret i16 %ret 6679} 6680 6681define i16 @test409(ptr %ptr, i16 %val) { 6682; PPC64LE-LABEL: test409: 6683; PPC64LE: # %bb.0: 6684; PPC64LE-NEXT: sync 6685; PPC64LE-NEXT: .LBB409_1: 6686; PPC64LE-NEXT: lharx 5, 0, 3 6687; PPC64LE-NEXT: and 6, 4, 5 6688; PPC64LE-NEXT: sthcx. 6, 0, 3 6689; PPC64LE-NEXT: bne 0, .LBB409_1 6690; PPC64LE-NEXT: # %bb.2: 6691; PPC64LE-NEXT: lwsync 6692; PPC64LE-NEXT: mr 3, 5 6693; PPC64LE-NEXT: blr 6694 %ret = atomicrmw and ptr %ptr, i16 %val syncscope("singlethread") seq_cst 6695 ret i16 %ret 6696} 6697 6698define i32 @test410(ptr %ptr, i32 %val) { 6699; PPC64LE-LABEL: test410: 6700; PPC64LE: # %bb.0: 6701; PPC64LE-NEXT: .LBB410_1: 6702; PPC64LE-NEXT: lwarx 5, 0, 3 6703; PPC64LE-NEXT: and 6, 4, 5 6704; PPC64LE-NEXT: stwcx. 6, 0, 3 6705; PPC64LE-NEXT: bne 0, .LBB410_1 6706; PPC64LE-NEXT: # %bb.2: 6707; PPC64LE-NEXT: mr 3, 5 6708; PPC64LE-NEXT: blr 6709 %ret = atomicrmw and ptr %ptr, i32 %val syncscope("singlethread") monotonic 6710 ret i32 %ret 6711} 6712 6713define i32 @test411(ptr %ptr, i32 %val) { 6714; PPC64LE-LABEL: test411: 6715; PPC64LE: # %bb.0: 6716; PPC64LE-NEXT: mr 5, 3 6717; PPC64LE-NEXT: .LBB411_1: 6718; PPC64LE-NEXT: lwarx 3, 0, 5 6719; PPC64LE-NEXT: and 6, 4, 3 6720; PPC64LE-NEXT: stwcx. 6, 0, 5 6721; PPC64LE-NEXT: bne 0, .LBB411_1 6722; PPC64LE-NEXT: # %bb.2: 6723; PPC64LE-NEXT: lwsync 6724; PPC64LE-NEXT: blr 6725 %ret = atomicrmw and ptr %ptr, i32 %val syncscope("singlethread") acquire 6726 ret i32 %ret 6727} 6728 6729define i32 @test412(ptr %ptr, i32 %val) { 6730; PPC64LE-LABEL: test412: 6731; PPC64LE: # %bb.0: 6732; PPC64LE-NEXT: lwsync 6733; PPC64LE-NEXT: .LBB412_1: 6734; PPC64LE-NEXT: lwarx 5, 0, 3 6735; PPC64LE-NEXT: and 6, 4, 5 6736; PPC64LE-NEXT: stwcx. 6, 0, 3 6737; PPC64LE-NEXT: bne 0, .LBB412_1 6738; PPC64LE-NEXT: # %bb.2: 6739; PPC64LE-NEXT: mr 3, 5 6740; PPC64LE-NEXT: blr 6741 %ret = atomicrmw and ptr %ptr, i32 %val syncscope("singlethread") release 6742 ret i32 %ret 6743} 6744 6745define i32 @test413(ptr %ptr, i32 %val) { 6746; PPC64LE-LABEL: test413: 6747; PPC64LE: # %bb.0: 6748; PPC64LE-NEXT: lwsync 6749; PPC64LE-NEXT: .LBB413_1: 6750; PPC64LE-NEXT: lwarx 5, 0, 3 6751; PPC64LE-NEXT: and 6, 4, 5 6752; PPC64LE-NEXT: stwcx. 6, 0, 3 6753; PPC64LE-NEXT: bne 0, .LBB413_1 6754; PPC64LE-NEXT: # %bb.2: 6755; PPC64LE-NEXT: lwsync 6756; PPC64LE-NEXT: mr 3, 5 6757; PPC64LE-NEXT: blr 6758 %ret = atomicrmw and ptr %ptr, i32 %val syncscope("singlethread") acq_rel 6759 ret i32 %ret 6760} 6761 6762define i32 @test414(ptr %ptr, i32 %val) { 6763; PPC64LE-LABEL: test414: 6764; PPC64LE: # %bb.0: 6765; PPC64LE-NEXT: sync 6766; PPC64LE-NEXT: .LBB414_1: 6767; PPC64LE-NEXT: lwarx 5, 0, 3 6768; PPC64LE-NEXT: and 6, 4, 5 6769; PPC64LE-NEXT: stwcx. 6, 0, 3 6770; PPC64LE-NEXT: bne 0, .LBB414_1 6771; PPC64LE-NEXT: # %bb.2: 6772; PPC64LE-NEXT: lwsync 6773; PPC64LE-NEXT: mr 3, 5 6774; PPC64LE-NEXT: blr 6775 %ret = atomicrmw and ptr %ptr, i32 %val syncscope("singlethread") seq_cst 6776 ret i32 %ret 6777} 6778 6779define i64 @test415(ptr %ptr, i64 %val) { 6780; PPC64LE-LABEL: test415: 6781; PPC64LE: # %bb.0: 6782; PPC64LE-NEXT: .LBB415_1: 6783; PPC64LE-NEXT: ldarx 5, 0, 3 6784; PPC64LE-NEXT: and 6, 4, 5 6785; PPC64LE-NEXT: stdcx. 6, 0, 3 6786; PPC64LE-NEXT: bne 0, .LBB415_1 6787; PPC64LE-NEXT: # %bb.2: 6788; PPC64LE-NEXT: mr 3, 5 6789; PPC64LE-NEXT: blr 6790 %ret = atomicrmw and ptr %ptr, i64 %val syncscope("singlethread") monotonic 6791 ret i64 %ret 6792} 6793 6794define i64 @test416(ptr %ptr, i64 %val) { 6795; PPC64LE-LABEL: test416: 6796; PPC64LE: # %bb.0: 6797; PPC64LE-NEXT: mr 5, 3 6798; PPC64LE-NEXT: .LBB416_1: 6799; PPC64LE-NEXT: ldarx 3, 0, 5 6800; PPC64LE-NEXT: and 6, 4, 3 6801; PPC64LE-NEXT: stdcx. 6, 0, 5 6802; PPC64LE-NEXT: bne 0, .LBB416_1 6803; PPC64LE-NEXT: # %bb.2: 6804; PPC64LE-NEXT: lwsync 6805; PPC64LE-NEXT: blr 6806 %ret = atomicrmw and ptr %ptr, i64 %val syncscope("singlethread") acquire 6807 ret i64 %ret 6808} 6809 6810define i64 @test417(ptr %ptr, i64 %val) { 6811; PPC64LE-LABEL: test417: 6812; PPC64LE: # %bb.0: 6813; PPC64LE-NEXT: lwsync 6814; PPC64LE-NEXT: .LBB417_1: 6815; PPC64LE-NEXT: ldarx 5, 0, 3 6816; PPC64LE-NEXT: and 6, 4, 5 6817; PPC64LE-NEXT: stdcx. 6, 0, 3 6818; PPC64LE-NEXT: bne 0, .LBB417_1 6819; PPC64LE-NEXT: # %bb.2: 6820; PPC64LE-NEXT: mr 3, 5 6821; PPC64LE-NEXT: blr 6822 %ret = atomicrmw and ptr %ptr, i64 %val syncscope("singlethread") release 6823 ret i64 %ret 6824} 6825 6826define i64 @test418(ptr %ptr, i64 %val) { 6827; PPC64LE-LABEL: test418: 6828; PPC64LE: # %bb.0: 6829; PPC64LE-NEXT: lwsync 6830; PPC64LE-NEXT: .LBB418_1: 6831; PPC64LE-NEXT: ldarx 5, 0, 3 6832; PPC64LE-NEXT: and 6, 4, 5 6833; PPC64LE-NEXT: stdcx. 6, 0, 3 6834; PPC64LE-NEXT: bne 0, .LBB418_1 6835; PPC64LE-NEXT: # %bb.2: 6836; PPC64LE-NEXT: lwsync 6837; PPC64LE-NEXT: mr 3, 5 6838; PPC64LE-NEXT: blr 6839 %ret = atomicrmw and ptr %ptr, i64 %val syncscope("singlethread") acq_rel 6840 ret i64 %ret 6841} 6842 6843define i64 @test419(ptr %ptr, i64 %val) { 6844; PPC64LE-LABEL: test419: 6845; PPC64LE: # %bb.0: 6846; PPC64LE-NEXT: sync 6847; PPC64LE-NEXT: .LBB419_1: 6848; PPC64LE-NEXT: ldarx 5, 0, 3 6849; PPC64LE-NEXT: and 6, 4, 5 6850; PPC64LE-NEXT: stdcx. 6, 0, 3 6851; PPC64LE-NEXT: bne 0, .LBB419_1 6852; PPC64LE-NEXT: # %bb.2: 6853; PPC64LE-NEXT: lwsync 6854; PPC64LE-NEXT: mr 3, 5 6855; PPC64LE-NEXT: blr 6856 %ret = atomicrmw and ptr %ptr, i64 %val syncscope("singlethread") seq_cst 6857 ret i64 %ret 6858} 6859 6860define i8 @test420(ptr %ptr, i8 %val) { 6861; PPC64LE-LABEL: test420: 6862; PPC64LE: # %bb.0: 6863; PPC64LE-NEXT: .LBB420_1: 6864; PPC64LE-NEXT: lbarx 5, 0, 3 6865; PPC64LE-NEXT: nand 6, 4, 5 6866; PPC64LE-NEXT: stbcx. 6, 0, 3 6867; PPC64LE-NEXT: bne 0, .LBB420_1 6868; PPC64LE-NEXT: # %bb.2: 6869; PPC64LE-NEXT: mr 3, 5 6870; PPC64LE-NEXT: blr 6871 %ret = atomicrmw nand ptr %ptr, i8 %val syncscope("singlethread") monotonic 6872 ret i8 %ret 6873} 6874 6875define i8 @test421(ptr %ptr, i8 %val) { 6876; PPC64LE-LABEL: test421: 6877; PPC64LE: # %bb.0: 6878; PPC64LE-NEXT: mr 5, 3 6879; PPC64LE-NEXT: .LBB421_1: 6880; PPC64LE-NEXT: lbarx 3, 0, 5 6881; PPC64LE-NEXT: nand 6, 4, 3 6882; PPC64LE-NEXT: stbcx. 6, 0, 5 6883; PPC64LE-NEXT: bne 0, .LBB421_1 6884; PPC64LE-NEXT: # %bb.2: 6885; PPC64LE-NEXT: lwsync 6886; PPC64LE-NEXT: blr 6887 %ret = atomicrmw nand ptr %ptr, i8 %val syncscope("singlethread") acquire 6888 ret i8 %ret 6889} 6890 6891define i8 @test422(ptr %ptr, i8 %val) { 6892; PPC64LE-LABEL: test422: 6893; PPC64LE: # %bb.0: 6894; PPC64LE-NEXT: lwsync 6895; PPC64LE-NEXT: .LBB422_1: 6896; PPC64LE-NEXT: lbarx 5, 0, 3 6897; PPC64LE-NEXT: nand 6, 4, 5 6898; PPC64LE-NEXT: stbcx. 6, 0, 3 6899; PPC64LE-NEXT: bne 0, .LBB422_1 6900; PPC64LE-NEXT: # %bb.2: 6901; PPC64LE-NEXT: mr 3, 5 6902; PPC64LE-NEXT: blr 6903 %ret = atomicrmw nand ptr %ptr, i8 %val syncscope("singlethread") release 6904 ret i8 %ret 6905} 6906 6907define i8 @test423(ptr %ptr, i8 %val) { 6908; PPC64LE-LABEL: test423: 6909; PPC64LE: # %bb.0: 6910; PPC64LE-NEXT: lwsync 6911; PPC64LE-NEXT: .LBB423_1: 6912; PPC64LE-NEXT: lbarx 5, 0, 3 6913; PPC64LE-NEXT: nand 6, 4, 5 6914; PPC64LE-NEXT: stbcx. 6, 0, 3 6915; PPC64LE-NEXT: bne 0, .LBB423_1 6916; PPC64LE-NEXT: # %bb.2: 6917; PPC64LE-NEXT: lwsync 6918; PPC64LE-NEXT: mr 3, 5 6919; PPC64LE-NEXT: blr 6920 %ret = atomicrmw nand ptr %ptr, i8 %val syncscope("singlethread") acq_rel 6921 ret i8 %ret 6922} 6923 6924define i8 @test424(ptr %ptr, i8 %val) { 6925; PPC64LE-LABEL: test424: 6926; PPC64LE: # %bb.0: 6927; PPC64LE-NEXT: sync 6928; PPC64LE-NEXT: .LBB424_1: 6929; PPC64LE-NEXT: lbarx 5, 0, 3 6930; PPC64LE-NEXT: nand 6, 4, 5 6931; PPC64LE-NEXT: stbcx. 6, 0, 3 6932; PPC64LE-NEXT: bne 0, .LBB424_1 6933; PPC64LE-NEXT: # %bb.2: 6934; PPC64LE-NEXT: lwsync 6935; PPC64LE-NEXT: mr 3, 5 6936; PPC64LE-NEXT: blr 6937 %ret = atomicrmw nand ptr %ptr, i8 %val syncscope("singlethread") seq_cst 6938 ret i8 %ret 6939} 6940 6941define i16 @test425(ptr %ptr, i16 %val) { 6942; PPC64LE-LABEL: test425: 6943; PPC64LE: # %bb.0: 6944; PPC64LE-NEXT: .LBB425_1: 6945; PPC64LE-NEXT: lharx 5, 0, 3 6946; PPC64LE-NEXT: nand 6, 4, 5 6947; PPC64LE-NEXT: sthcx. 6, 0, 3 6948; PPC64LE-NEXT: bne 0, .LBB425_1 6949; PPC64LE-NEXT: # %bb.2: 6950; PPC64LE-NEXT: mr 3, 5 6951; PPC64LE-NEXT: blr 6952 %ret = atomicrmw nand ptr %ptr, i16 %val syncscope("singlethread") monotonic 6953 ret i16 %ret 6954} 6955 6956define i16 @test426(ptr %ptr, i16 %val) { 6957; PPC64LE-LABEL: test426: 6958; PPC64LE: # %bb.0: 6959; PPC64LE-NEXT: mr 5, 3 6960; PPC64LE-NEXT: .LBB426_1: 6961; PPC64LE-NEXT: lharx 3, 0, 5 6962; PPC64LE-NEXT: nand 6, 4, 3 6963; PPC64LE-NEXT: sthcx. 6, 0, 5 6964; PPC64LE-NEXT: bne 0, .LBB426_1 6965; PPC64LE-NEXT: # %bb.2: 6966; PPC64LE-NEXT: lwsync 6967; PPC64LE-NEXT: blr 6968 %ret = atomicrmw nand ptr %ptr, i16 %val syncscope("singlethread") acquire 6969 ret i16 %ret 6970} 6971 6972define i16 @test427(ptr %ptr, i16 %val) { 6973; PPC64LE-LABEL: test427: 6974; PPC64LE: # %bb.0: 6975; PPC64LE-NEXT: lwsync 6976; PPC64LE-NEXT: .LBB427_1: 6977; PPC64LE-NEXT: lharx 5, 0, 3 6978; PPC64LE-NEXT: nand 6, 4, 5 6979; PPC64LE-NEXT: sthcx. 6, 0, 3 6980; PPC64LE-NEXT: bne 0, .LBB427_1 6981; PPC64LE-NEXT: # %bb.2: 6982; PPC64LE-NEXT: mr 3, 5 6983; PPC64LE-NEXT: blr 6984 %ret = atomicrmw nand ptr %ptr, i16 %val syncscope("singlethread") release 6985 ret i16 %ret 6986} 6987 6988define i16 @test428(ptr %ptr, i16 %val) { 6989; PPC64LE-LABEL: test428: 6990; PPC64LE: # %bb.0: 6991; PPC64LE-NEXT: lwsync 6992; PPC64LE-NEXT: .LBB428_1: 6993; PPC64LE-NEXT: lharx 5, 0, 3 6994; PPC64LE-NEXT: nand 6, 4, 5 6995; PPC64LE-NEXT: sthcx. 6, 0, 3 6996; PPC64LE-NEXT: bne 0, .LBB428_1 6997; PPC64LE-NEXT: # %bb.2: 6998; PPC64LE-NEXT: lwsync 6999; PPC64LE-NEXT: mr 3, 5 7000; PPC64LE-NEXT: blr 7001 %ret = atomicrmw nand ptr %ptr, i16 %val syncscope("singlethread") acq_rel 7002 ret i16 %ret 7003} 7004 7005define i16 @test429(ptr %ptr, i16 %val) { 7006; PPC64LE-LABEL: test429: 7007; PPC64LE: # %bb.0: 7008; PPC64LE-NEXT: sync 7009; PPC64LE-NEXT: .LBB429_1: 7010; PPC64LE-NEXT: lharx 5, 0, 3 7011; PPC64LE-NEXT: nand 6, 4, 5 7012; PPC64LE-NEXT: sthcx. 6, 0, 3 7013; PPC64LE-NEXT: bne 0, .LBB429_1 7014; PPC64LE-NEXT: # %bb.2: 7015; PPC64LE-NEXT: lwsync 7016; PPC64LE-NEXT: mr 3, 5 7017; PPC64LE-NEXT: blr 7018 %ret = atomicrmw nand ptr %ptr, i16 %val syncscope("singlethread") seq_cst 7019 ret i16 %ret 7020} 7021 7022define i32 @test430(ptr %ptr, i32 %val) { 7023; PPC64LE-LABEL: test430: 7024; PPC64LE: # %bb.0: 7025; PPC64LE-NEXT: .LBB430_1: 7026; PPC64LE-NEXT: lwarx 5, 0, 3 7027; PPC64LE-NEXT: nand 6, 4, 5 7028; PPC64LE-NEXT: stwcx. 6, 0, 3 7029; PPC64LE-NEXT: bne 0, .LBB430_1 7030; PPC64LE-NEXT: # %bb.2: 7031; PPC64LE-NEXT: mr 3, 5 7032; PPC64LE-NEXT: blr 7033 %ret = atomicrmw nand ptr %ptr, i32 %val syncscope("singlethread") monotonic 7034 ret i32 %ret 7035} 7036 7037define i32 @test431(ptr %ptr, i32 %val) { 7038; PPC64LE-LABEL: test431: 7039; PPC64LE: # %bb.0: 7040; PPC64LE-NEXT: mr 5, 3 7041; PPC64LE-NEXT: .LBB431_1: 7042; PPC64LE-NEXT: lwarx 3, 0, 5 7043; PPC64LE-NEXT: nand 6, 4, 3 7044; PPC64LE-NEXT: stwcx. 6, 0, 5 7045; PPC64LE-NEXT: bne 0, .LBB431_1 7046; PPC64LE-NEXT: # %bb.2: 7047; PPC64LE-NEXT: lwsync 7048; PPC64LE-NEXT: blr 7049 %ret = atomicrmw nand ptr %ptr, i32 %val syncscope("singlethread") acquire 7050 ret i32 %ret 7051} 7052 7053define i32 @test432(ptr %ptr, i32 %val) { 7054; PPC64LE-LABEL: test432: 7055; PPC64LE: # %bb.0: 7056; PPC64LE-NEXT: lwsync 7057; PPC64LE-NEXT: .LBB432_1: 7058; PPC64LE-NEXT: lwarx 5, 0, 3 7059; PPC64LE-NEXT: nand 6, 4, 5 7060; PPC64LE-NEXT: stwcx. 6, 0, 3 7061; PPC64LE-NEXT: bne 0, .LBB432_1 7062; PPC64LE-NEXT: # %bb.2: 7063; PPC64LE-NEXT: mr 3, 5 7064; PPC64LE-NEXT: blr 7065 %ret = atomicrmw nand ptr %ptr, i32 %val syncscope("singlethread") release 7066 ret i32 %ret 7067} 7068 7069define i32 @test433(ptr %ptr, i32 %val) { 7070; PPC64LE-LABEL: test433: 7071; PPC64LE: # %bb.0: 7072; PPC64LE-NEXT: lwsync 7073; PPC64LE-NEXT: .LBB433_1: 7074; PPC64LE-NEXT: lwarx 5, 0, 3 7075; PPC64LE-NEXT: nand 6, 4, 5 7076; PPC64LE-NEXT: stwcx. 6, 0, 3 7077; PPC64LE-NEXT: bne 0, .LBB433_1 7078; PPC64LE-NEXT: # %bb.2: 7079; PPC64LE-NEXT: lwsync 7080; PPC64LE-NEXT: mr 3, 5 7081; PPC64LE-NEXT: blr 7082 %ret = atomicrmw nand ptr %ptr, i32 %val syncscope("singlethread") acq_rel 7083 ret i32 %ret 7084} 7085 7086define i32 @test434(ptr %ptr, i32 %val) { 7087; PPC64LE-LABEL: test434: 7088; PPC64LE: # %bb.0: 7089; PPC64LE-NEXT: sync 7090; PPC64LE-NEXT: .LBB434_1: 7091; PPC64LE-NEXT: lwarx 5, 0, 3 7092; PPC64LE-NEXT: nand 6, 4, 5 7093; PPC64LE-NEXT: stwcx. 6, 0, 3 7094; PPC64LE-NEXT: bne 0, .LBB434_1 7095; PPC64LE-NEXT: # %bb.2: 7096; PPC64LE-NEXT: lwsync 7097; PPC64LE-NEXT: mr 3, 5 7098; PPC64LE-NEXT: blr 7099 %ret = atomicrmw nand ptr %ptr, i32 %val syncscope("singlethread") seq_cst 7100 ret i32 %ret 7101} 7102 7103define i64 @test435(ptr %ptr, i64 %val) { 7104; PPC64LE-LABEL: test435: 7105; PPC64LE: # %bb.0: 7106; PPC64LE-NEXT: .LBB435_1: 7107; PPC64LE-NEXT: ldarx 5, 0, 3 7108; PPC64LE-NEXT: nand 6, 4, 5 7109; PPC64LE-NEXT: stdcx. 6, 0, 3 7110; PPC64LE-NEXT: bne 0, .LBB435_1 7111; PPC64LE-NEXT: # %bb.2: 7112; PPC64LE-NEXT: mr 3, 5 7113; PPC64LE-NEXT: blr 7114 %ret = atomicrmw nand ptr %ptr, i64 %val syncscope("singlethread") monotonic 7115 ret i64 %ret 7116} 7117 7118define i64 @test436(ptr %ptr, i64 %val) { 7119; PPC64LE-LABEL: test436: 7120; PPC64LE: # %bb.0: 7121; PPC64LE-NEXT: mr 5, 3 7122; PPC64LE-NEXT: .LBB436_1: 7123; PPC64LE-NEXT: ldarx 3, 0, 5 7124; PPC64LE-NEXT: nand 6, 4, 3 7125; PPC64LE-NEXT: stdcx. 6, 0, 5 7126; PPC64LE-NEXT: bne 0, .LBB436_1 7127; PPC64LE-NEXT: # %bb.2: 7128; PPC64LE-NEXT: lwsync 7129; PPC64LE-NEXT: blr 7130 %ret = atomicrmw nand ptr %ptr, i64 %val syncscope("singlethread") acquire 7131 ret i64 %ret 7132} 7133 7134define i64 @test437(ptr %ptr, i64 %val) { 7135; PPC64LE-LABEL: test437: 7136; PPC64LE: # %bb.0: 7137; PPC64LE-NEXT: lwsync 7138; PPC64LE-NEXT: .LBB437_1: 7139; PPC64LE-NEXT: ldarx 5, 0, 3 7140; PPC64LE-NEXT: nand 6, 4, 5 7141; PPC64LE-NEXT: stdcx. 6, 0, 3 7142; PPC64LE-NEXT: bne 0, .LBB437_1 7143; PPC64LE-NEXT: # %bb.2: 7144; PPC64LE-NEXT: mr 3, 5 7145; PPC64LE-NEXT: blr 7146 %ret = atomicrmw nand ptr %ptr, i64 %val syncscope("singlethread") release 7147 ret i64 %ret 7148} 7149 7150define i64 @test438(ptr %ptr, i64 %val) { 7151; PPC64LE-LABEL: test438: 7152; PPC64LE: # %bb.0: 7153; PPC64LE-NEXT: lwsync 7154; PPC64LE-NEXT: .LBB438_1: 7155; PPC64LE-NEXT: ldarx 5, 0, 3 7156; PPC64LE-NEXT: nand 6, 4, 5 7157; PPC64LE-NEXT: stdcx. 6, 0, 3 7158; PPC64LE-NEXT: bne 0, .LBB438_1 7159; PPC64LE-NEXT: # %bb.2: 7160; PPC64LE-NEXT: lwsync 7161; PPC64LE-NEXT: mr 3, 5 7162; PPC64LE-NEXT: blr 7163 %ret = atomicrmw nand ptr %ptr, i64 %val syncscope("singlethread") acq_rel 7164 ret i64 %ret 7165} 7166 7167define i64 @test439(ptr %ptr, i64 %val) { 7168; PPC64LE-LABEL: test439: 7169; PPC64LE: # %bb.0: 7170; PPC64LE-NEXT: sync 7171; PPC64LE-NEXT: .LBB439_1: 7172; PPC64LE-NEXT: ldarx 5, 0, 3 7173; PPC64LE-NEXT: nand 6, 4, 5 7174; PPC64LE-NEXT: stdcx. 6, 0, 3 7175; PPC64LE-NEXT: bne 0, .LBB439_1 7176; PPC64LE-NEXT: # %bb.2: 7177; PPC64LE-NEXT: lwsync 7178; PPC64LE-NEXT: mr 3, 5 7179; PPC64LE-NEXT: blr 7180 %ret = atomicrmw nand ptr %ptr, i64 %val syncscope("singlethread") seq_cst 7181 ret i64 %ret 7182} 7183 7184define i8 @test440(ptr %ptr, i8 %val) { 7185; PPC64LE-LABEL: test440: 7186; PPC64LE: # %bb.0: 7187; PPC64LE-NEXT: .LBB440_1: 7188; PPC64LE-NEXT: lbarx 5, 0, 3 7189; PPC64LE-NEXT: or 6, 4, 5 7190; PPC64LE-NEXT: stbcx. 6, 0, 3 7191; PPC64LE-NEXT: bne 0, .LBB440_1 7192; PPC64LE-NEXT: # %bb.2: 7193; PPC64LE-NEXT: mr 3, 5 7194; PPC64LE-NEXT: blr 7195 %ret = atomicrmw or ptr %ptr, i8 %val syncscope("singlethread") monotonic 7196 ret i8 %ret 7197} 7198 7199define i8 @test441(ptr %ptr, i8 %val) { 7200; PPC64LE-LABEL: test441: 7201; PPC64LE: # %bb.0: 7202; PPC64LE-NEXT: mr 5, 3 7203; PPC64LE-NEXT: .LBB441_1: 7204; PPC64LE-NEXT: lbarx 3, 0, 5 7205; PPC64LE-NEXT: or 6, 4, 3 7206; PPC64LE-NEXT: stbcx. 6, 0, 5 7207; PPC64LE-NEXT: bne 0, .LBB441_1 7208; PPC64LE-NEXT: # %bb.2: 7209; PPC64LE-NEXT: lwsync 7210; PPC64LE-NEXT: blr 7211 %ret = atomicrmw or ptr %ptr, i8 %val syncscope("singlethread") acquire 7212 ret i8 %ret 7213} 7214 7215define i8 @test442(ptr %ptr, i8 %val) { 7216; PPC64LE-LABEL: test442: 7217; PPC64LE: # %bb.0: 7218; PPC64LE-NEXT: lwsync 7219; PPC64LE-NEXT: .LBB442_1: 7220; PPC64LE-NEXT: lbarx 5, 0, 3 7221; PPC64LE-NEXT: or 6, 4, 5 7222; PPC64LE-NEXT: stbcx. 6, 0, 3 7223; PPC64LE-NEXT: bne 0, .LBB442_1 7224; PPC64LE-NEXT: # %bb.2: 7225; PPC64LE-NEXT: mr 3, 5 7226; PPC64LE-NEXT: blr 7227 %ret = atomicrmw or ptr %ptr, i8 %val syncscope("singlethread") release 7228 ret i8 %ret 7229} 7230 7231define i8 @test443(ptr %ptr, i8 %val) { 7232; PPC64LE-LABEL: test443: 7233; PPC64LE: # %bb.0: 7234; PPC64LE-NEXT: lwsync 7235; PPC64LE-NEXT: .LBB443_1: 7236; PPC64LE-NEXT: lbarx 5, 0, 3 7237; PPC64LE-NEXT: or 6, 4, 5 7238; PPC64LE-NEXT: stbcx. 6, 0, 3 7239; PPC64LE-NEXT: bne 0, .LBB443_1 7240; PPC64LE-NEXT: # %bb.2: 7241; PPC64LE-NEXT: lwsync 7242; PPC64LE-NEXT: mr 3, 5 7243; PPC64LE-NEXT: blr 7244 %ret = atomicrmw or ptr %ptr, i8 %val syncscope("singlethread") acq_rel 7245 ret i8 %ret 7246} 7247 7248define i8 @test444(ptr %ptr, i8 %val) { 7249; PPC64LE-LABEL: test444: 7250; PPC64LE: # %bb.0: 7251; PPC64LE-NEXT: sync 7252; PPC64LE-NEXT: .LBB444_1: 7253; PPC64LE-NEXT: lbarx 5, 0, 3 7254; PPC64LE-NEXT: or 6, 4, 5 7255; PPC64LE-NEXT: stbcx. 6, 0, 3 7256; PPC64LE-NEXT: bne 0, .LBB444_1 7257; PPC64LE-NEXT: # %bb.2: 7258; PPC64LE-NEXT: lwsync 7259; PPC64LE-NEXT: mr 3, 5 7260; PPC64LE-NEXT: blr 7261 %ret = atomicrmw or ptr %ptr, i8 %val syncscope("singlethread") seq_cst 7262 ret i8 %ret 7263} 7264 7265define i16 @test445(ptr %ptr, i16 %val) { 7266; PPC64LE-LABEL: test445: 7267; PPC64LE: # %bb.0: 7268; PPC64LE-NEXT: .LBB445_1: 7269; PPC64LE-NEXT: lharx 5, 0, 3 7270; PPC64LE-NEXT: or 6, 4, 5 7271; PPC64LE-NEXT: sthcx. 6, 0, 3 7272; PPC64LE-NEXT: bne 0, .LBB445_1 7273; PPC64LE-NEXT: # %bb.2: 7274; PPC64LE-NEXT: mr 3, 5 7275; PPC64LE-NEXT: blr 7276 %ret = atomicrmw or ptr %ptr, i16 %val syncscope("singlethread") monotonic 7277 ret i16 %ret 7278} 7279 7280define i16 @test446(ptr %ptr, i16 %val) { 7281; PPC64LE-LABEL: test446: 7282; PPC64LE: # %bb.0: 7283; PPC64LE-NEXT: mr 5, 3 7284; PPC64LE-NEXT: .LBB446_1: 7285; PPC64LE-NEXT: lharx 3, 0, 5 7286; PPC64LE-NEXT: or 6, 4, 3 7287; PPC64LE-NEXT: sthcx. 6, 0, 5 7288; PPC64LE-NEXT: bne 0, .LBB446_1 7289; PPC64LE-NEXT: # %bb.2: 7290; PPC64LE-NEXT: lwsync 7291; PPC64LE-NEXT: blr 7292 %ret = atomicrmw or ptr %ptr, i16 %val syncscope("singlethread") acquire 7293 ret i16 %ret 7294} 7295 7296define i16 @test447(ptr %ptr, i16 %val) { 7297; PPC64LE-LABEL: test447: 7298; PPC64LE: # %bb.0: 7299; PPC64LE-NEXT: lwsync 7300; PPC64LE-NEXT: .LBB447_1: 7301; PPC64LE-NEXT: lharx 5, 0, 3 7302; PPC64LE-NEXT: or 6, 4, 5 7303; PPC64LE-NEXT: sthcx. 6, 0, 3 7304; PPC64LE-NEXT: bne 0, .LBB447_1 7305; PPC64LE-NEXT: # %bb.2: 7306; PPC64LE-NEXT: mr 3, 5 7307; PPC64LE-NEXT: blr 7308 %ret = atomicrmw or ptr %ptr, i16 %val syncscope("singlethread") release 7309 ret i16 %ret 7310} 7311 7312define i16 @test448(ptr %ptr, i16 %val) { 7313; PPC64LE-LABEL: test448: 7314; PPC64LE: # %bb.0: 7315; PPC64LE-NEXT: lwsync 7316; PPC64LE-NEXT: .LBB448_1: 7317; PPC64LE-NEXT: lharx 5, 0, 3 7318; PPC64LE-NEXT: or 6, 4, 5 7319; PPC64LE-NEXT: sthcx. 6, 0, 3 7320; PPC64LE-NEXT: bne 0, .LBB448_1 7321; PPC64LE-NEXT: # %bb.2: 7322; PPC64LE-NEXT: lwsync 7323; PPC64LE-NEXT: mr 3, 5 7324; PPC64LE-NEXT: blr 7325 %ret = atomicrmw or ptr %ptr, i16 %val syncscope("singlethread") acq_rel 7326 ret i16 %ret 7327} 7328 7329define i16 @test449(ptr %ptr, i16 %val) { 7330; PPC64LE-LABEL: test449: 7331; PPC64LE: # %bb.0: 7332; PPC64LE-NEXT: sync 7333; PPC64LE-NEXT: .LBB449_1: 7334; PPC64LE-NEXT: lharx 5, 0, 3 7335; PPC64LE-NEXT: or 6, 4, 5 7336; PPC64LE-NEXT: sthcx. 6, 0, 3 7337; PPC64LE-NEXT: bne 0, .LBB449_1 7338; PPC64LE-NEXT: # %bb.2: 7339; PPC64LE-NEXT: lwsync 7340; PPC64LE-NEXT: mr 3, 5 7341; PPC64LE-NEXT: blr 7342 %ret = atomicrmw or ptr %ptr, i16 %val syncscope("singlethread") seq_cst 7343 ret i16 %ret 7344} 7345 7346define i32 @test450(ptr %ptr, i32 %val) { 7347; PPC64LE-LABEL: test450: 7348; PPC64LE: # %bb.0: 7349; PPC64LE-NEXT: .LBB450_1: 7350; PPC64LE-NEXT: lwarx 5, 0, 3 7351; PPC64LE-NEXT: or 6, 4, 5 7352; PPC64LE-NEXT: stwcx. 6, 0, 3 7353; PPC64LE-NEXT: bne 0, .LBB450_1 7354; PPC64LE-NEXT: # %bb.2: 7355; PPC64LE-NEXT: mr 3, 5 7356; PPC64LE-NEXT: blr 7357 %ret = atomicrmw or ptr %ptr, i32 %val syncscope("singlethread") monotonic 7358 ret i32 %ret 7359} 7360 7361define i32 @test451(ptr %ptr, i32 %val) { 7362; PPC64LE-LABEL: test451: 7363; PPC64LE: # %bb.0: 7364; PPC64LE-NEXT: mr 5, 3 7365; PPC64LE-NEXT: .LBB451_1: 7366; PPC64LE-NEXT: lwarx 3, 0, 5 7367; PPC64LE-NEXT: or 6, 4, 3 7368; PPC64LE-NEXT: stwcx. 6, 0, 5 7369; PPC64LE-NEXT: bne 0, .LBB451_1 7370; PPC64LE-NEXT: # %bb.2: 7371; PPC64LE-NEXT: lwsync 7372; PPC64LE-NEXT: blr 7373 %ret = atomicrmw or ptr %ptr, i32 %val syncscope("singlethread") acquire 7374 ret i32 %ret 7375} 7376 7377define i32 @test452(ptr %ptr, i32 %val) { 7378; PPC64LE-LABEL: test452: 7379; PPC64LE: # %bb.0: 7380; PPC64LE-NEXT: lwsync 7381; PPC64LE-NEXT: .LBB452_1: 7382; PPC64LE-NEXT: lwarx 5, 0, 3 7383; PPC64LE-NEXT: or 6, 4, 5 7384; PPC64LE-NEXT: stwcx. 6, 0, 3 7385; PPC64LE-NEXT: bne 0, .LBB452_1 7386; PPC64LE-NEXT: # %bb.2: 7387; PPC64LE-NEXT: mr 3, 5 7388; PPC64LE-NEXT: blr 7389 %ret = atomicrmw or ptr %ptr, i32 %val syncscope("singlethread") release 7390 ret i32 %ret 7391} 7392 7393define i32 @test453(ptr %ptr, i32 %val) { 7394; PPC64LE-LABEL: test453: 7395; PPC64LE: # %bb.0: 7396; PPC64LE-NEXT: lwsync 7397; PPC64LE-NEXT: .LBB453_1: 7398; PPC64LE-NEXT: lwarx 5, 0, 3 7399; PPC64LE-NEXT: or 6, 4, 5 7400; PPC64LE-NEXT: stwcx. 6, 0, 3 7401; PPC64LE-NEXT: bne 0, .LBB453_1 7402; PPC64LE-NEXT: # %bb.2: 7403; PPC64LE-NEXT: lwsync 7404; PPC64LE-NEXT: mr 3, 5 7405; PPC64LE-NEXT: blr 7406 %ret = atomicrmw or ptr %ptr, i32 %val syncscope("singlethread") acq_rel 7407 ret i32 %ret 7408} 7409 7410define i32 @test454(ptr %ptr, i32 %val) { 7411; PPC64LE-LABEL: test454: 7412; PPC64LE: # %bb.0: 7413; PPC64LE-NEXT: sync 7414; PPC64LE-NEXT: .LBB454_1: 7415; PPC64LE-NEXT: lwarx 5, 0, 3 7416; PPC64LE-NEXT: or 6, 4, 5 7417; PPC64LE-NEXT: stwcx. 6, 0, 3 7418; PPC64LE-NEXT: bne 0, .LBB454_1 7419; PPC64LE-NEXT: # %bb.2: 7420; PPC64LE-NEXT: lwsync 7421; PPC64LE-NEXT: mr 3, 5 7422; PPC64LE-NEXT: blr 7423 %ret = atomicrmw or ptr %ptr, i32 %val syncscope("singlethread") seq_cst 7424 ret i32 %ret 7425} 7426 7427define i64 @test455(ptr %ptr, i64 %val) { 7428; PPC64LE-LABEL: test455: 7429; PPC64LE: # %bb.0: 7430; PPC64LE-NEXT: .LBB455_1: 7431; PPC64LE-NEXT: ldarx 5, 0, 3 7432; PPC64LE-NEXT: or 6, 4, 5 7433; PPC64LE-NEXT: stdcx. 6, 0, 3 7434; PPC64LE-NEXT: bne 0, .LBB455_1 7435; PPC64LE-NEXT: # %bb.2: 7436; PPC64LE-NEXT: mr 3, 5 7437; PPC64LE-NEXT: blr 7438 %ret = atomicrmw or ptr %ptr, i64 %val syncscope("singlethread") monotonic 7439 ret i64 %ret 7440} 7441 7442define i64 @test456(ptr %ptr, i64 %val) { 7443; PPC64LE-LABEL: test456: 7444; PPC64LE: # %bb.0: 7445; PPC64LE-NEXT: mr 5, 3 7446; PPC64LE-NEXT: .LBB456_1: 7447; PPC64LE-NEXT: ldarx 3, 0, 5 7448; PPC64LE-NEXT: or 6, 4, 3 7449; PPC64LE-NEXT: stdcx. 6, 0, 5 7450; PPC64LE-NEXT: bne 0, .LBB456_1 7451; PPC64LE-NEXT: # %bb.2: 7452; PPC64LE-NEXT: lwsync 7453; PPC64LE-NEXT: blr 7454 %ret = atomicrmw or ptr %ptr, i64 %val syncscope("singlethread") acquire 7455 ret i64 %ret 7456} 7457 7458define i64 @test457(ptr %ptr, i64 %val) { 7459; PPC64LE-LABEL: test457: 7460; PPC64LE: # %bb.0: 7461; PPC64LE-NEXT: lwsync 7462; PPC64LE-NEXT: .LBB457_1: 7463; PPC64LE-NEXT: ldarx 5, 0, 3 7464; PPC64LE-NEXT: or 6, 4, 5 7465; PPC64LE-NEXT: stdcx. 6, 0, 3 7466; PPC64LE-NEXT: bne 0, .LBB457_1 7467; PPC64LE-NEXT: # %bb.2: 7468; PPC64LE-NEXT: mr 3, 5 7469; PPC64LE-NEXT: blr 7470 %ret = atomicrmw or ptr %ptr, i64 %val syncscope("singlethread") release 7471 ret i64 %ret 7472} 7473 7474define i64 @test458(ptr %ptr, i64 %val) { 7475; PPC64LE-LABEL: test458: 7476; PPC64LE: # %bb.0: 7477; PPC64LE-NEXT: lwsync 7478; PPC64LE-NEXT: .LBB458_1: 7479; PPC64LE-NEXT: ldarx 5, 0, 3 7480; PPC64LE-NEXT: or 6, 4, 5 7481; PPC64LE-NEXT: stdcx. 6, 0, 3 7482; PPC64LE-NEXT: bne 0, .LBB458_1 7483; PPC64LE-NEXT: # %bb.2: 7484; PPC64LE-NEXT: lwsync 7485; PPC64LE-NEXT: mr 3, 5 7486; PPC64LE-NEXT: blr 7487 %ret = atomicrmw or ptr %ptr, i64 %val syncscope("singlethread") acq_rel 7488 ret i64 %ret 7489} 7490 7491define i64 @test459(ptr %ptr, i64 %val) { 7492; PPC64LE-LABEL: test459: 7493; PPC64LE: # %bb.0: 7494; PPC64LE-NEXT: sync 7495; PPC64LE-NEXT: .LBB459_1: 7496; PPC64LE-NEXT: ldarx 5, 0, 3 7497; PPC64LE-NEXT: or 6, 4, 5 7498; PPC64LE-NEXT: stdcx. 6, 0, 3 7499; PPC64LE-NEXT: bne 0, .LBB459_1 7500; PPC64LE-NEXT: # %bb.2: 7501; PPC64LE-NEXT: lwsync 7502; PPC64LE-NEXT: mr 3, 5 7503; PPC64LE-NEXT: blr 7504 %ret = atomicrmw or ptr %ptr, i64 %val syncscope("singlethread") seq_cst 7505 ret i64 %ret 7506} 7507 7508define i8 @test460(ptr %ptr, i8 %val) { 7509; PPC64LE-LABEL: test460: 7510; PPC64LE: # %bb.0: 7511; PPC64LE-NEXT: .LBB460_1: 7512; PPC64LE-NEXT: lbarx 5, 0, 3 7513; PPC64LE-NEXT: xor 6, 4, 5 7514; PPC64LE-NEXT: stbcx. 6, 0, 3 7515; PPC64LE-NEXT: bne 0, .LBB460_1 7516; PPC64LE-NEXT: # %bb.2: 7517; PPC64LE-NEXT: mr 3, 5 7518; PPC64LE-NEXT: blr 7519 %ret = atomicrmw xor ptr %ptr, i8 %val syncscope("singlethread") monotonic 7520 ret i8 %ret 7521} 7522 7523define i8 @test461(ptr %ptr, i8 %val) { 7524; PPC64LE-LABEL: test461: 7525; PPC64LE: # %bb.0: 7526; PPC64LE-NEXT: mr 5, 3 7527; PPC64LE-NEXT: .LBB461_1: 7528; PPC64LE-NEXT: lbarx 3, 0, 5 7529; PPC64LE-NEXT: xor 6, 4, 3 7530; PPC64LE-NEXT: stbcx. 6, 0, 5 7531; PPC64LE-NEXT: bne 0, .LBB461_1 7532; PPC64LE-NEXT: # %bb.2: 7533; PPC64LE-NEXT: lwsync 7534; PPC64LE-NEXT: blr 7535 %ret = atomicrmw xor ptr %ptr, i8 %val syncscope("singlethread") acquire 7536 ret i8 %ret 7537} 7538 7539define i8 @test462(ptr %ptr, i8 %val) { 7540; PPC64LE-LABEL: test462: 7541; PPC64LE: # %bb.0: 7542; PPC64LE-NEXT: lwsync 7543; PPC64LE-NEXT: .LBB462_1: 7544; PPC64LE-NEXT: lbarx 5, 0, 3 7545; PPC64LE-NEXT: xor 6, 4, 5 7546; PPC64LE-NEXT: stbcx. 6, 0, 3 7547; PPC64LE-NEXT: bne 0, .LBB462_1 7548; PPC64LE-NEXT: # %bb.2: 7549; PPC64LE-NEXT: mr 3, 5 7550; PPC64LE-NEXT: blr 7551 %ret = atomicrmw xor ptr %ptr, i8 %val syncscope("singlethread") release 7552 ret i8 %ret 7553} 7554 7555define i8 @test463(ptr %ptr, i8 %val) { 7556; PPC64LE-LABEL: test463: 7557; PPC64LE: # %bb.0: 7558; PPC64LE-NEXT: lwsync 7559; PPC64LE-NEXT: .LBB463_1: 7560; PPC64LE-NEXT: lbarx 5, 0, 3 7561; PPC64LE-NEXT: xor 6, 4, 5 7562; PPC64LE-NEXT: stbcx. 6, 0, 3 7563; PPC64LE-NEXT: bne 0, .LBB463_1 7564; PPC64LE-NEXT: # %bb.2: 7565; PPC64LE-NEXT: lwsync 7566; PPC64LE-NEXT: mr 3, 5 7567; PPC64LE-NEXT: blr 7568 %ret = atomicrmw xor ptr %ptr, i8 %val syncscope("singlethread") acq_rel 7569 ret i8 %ret 7570} 7571 7572define i8 @test464(ptr %ptr, i8 %val) { 7573; PPC64LE-LABEL: test464: 7574; PPC64LE: # %bb.0: 7575; PPC64LE-NEXT: sync 7576; PPC64LE-NEXT: .LBB464_1: 7577; PPC64LE-NEXT: lbarx 5, 0, 3 7578; PPC64LE-NEXT: xor 6, 4, 5 7579; PPC64LE-NEXT: stbcx. 6, 0, 3 7580; PPC64LE-NEXT: bne 0, .LBB464_1 7581; PPC64LE-NEXT: # %bb.2: 7582; PPC64LE-NEXT: lwsync 7583; PPC64LE-NEXT: mr 3, 5 7584; PPC64LE-NEXT: blr 7585 %ret = atomicrmw xor ptr %ptr, i8 %val syncscope("singlethread") seq_cst 7586 ret i8 %ret 7587} 7588 7589define i16 @test465(ptr %ptr, i16 %val) { 7590; PPC64LE-LABEL: test465: 7591; PPC64LE: # %bb.0: 7592; PPC64LE-NEXT: .LBB465_1: 7593; PPC64LE-NEXT: lharx 5, 0, 3 7594; PPC64LE-NEXT: xor 6, 4, 5 7595; PPC64LE-NEXT: sthcx. 6, 0, 3 7596; PPC64LE-NEXT: bne 0, .LBB465_1 7597; PPC64LE-NEXT: # %bb.2: 7598; PPC64LE-NEXT: mr 3, 5 7599; PPC64LE-NEXT: blr 7600 %ret = atomicrmw xor ptr %ptr, i16 %val syncscope("singlethread") monotonic 7601 ret i16 %ret 7602} 7603 7604define i16 @test466(ptr %ptr, i16 %val) { 7605; PPC64LE-LABEL: test466: 7606; PPC64LE: # %bb.0: 7607; PPC64LE-NEXT: mr 5, 3 7608; PPC64LE-NEXT: .LBB466_1: 7609; PPC64LE-NEXT: lharx 3, 0, 5 7610; PPC64LE-NEXT: xor 6, 4, 3 7611; PPC64LE-NEXT: sthcx. 6, 0, 5 7612; PPC64LE-NEXT: bne 0, .LBB466_1 7613; PPC64LE-NEXT: # %bb.2: 7614; PPC64LE-NEXT: lwsync 7615; PPC64LE-NEXT: blr 7616 %ret = atomicrmw xor ptr %ptr, i16 %val syncscope("singlethread") acquire 7617 ret i16 %ret 7618} 7619 7620define i16 @test467(ptr %ptr, i16 %val) { 7621; PPC64LE-LABEL: test467: 7622; PPC64LE: # %bb.0: 7623; PPC64LE-NEXT: lwsync 7624; PPC64LE-NEXT: .LBB467_1: 7625; PPC64LE-NEXT: lharx 5, 0, 3 7626; PPC64LE-NEXT: xor 6, 4, 5 7627; PPC64LE-NEXT: sthcx. 6, 0, 3 7628; PPC64LE-NEXT: bne 0, .LBB467_1 7629; PPC64LE-NEXT: # %bb.2: 7630; PPC64LE-NEXT: mr 3, 5 7631; PPC64LE-NEXT: blr 7632 %ret = atomicrmw xor ptr %ptr, i16 %val syncscope("singlethread") release 7633 ret i16 %ret 7634} 7635 7636define i16 @test468(ptr %ptr, i16 %val) { 7637; PPC64LE-LABEL: test468: 7638; PPC64LE: # %bb.0: 7639; PPC64LE-NEXT: lwsync 7640; PPC64LE-NEXT: .LBB468_1: 7641; PPC64LE-NEXT: lharx 5, 0, 3 7642; PPC64LE-NEXT: xor 6, 4, 5 7643; PPC64LE-NEXT: sthcx. 6, 0, 3 7644; PPC64LE-NEXT: bne 0, .LBB468_1 7645; PPC64LE-NEXT: # %bb.2: 7646; PPC64LE-NEXT: lwsync 7647; PPC64LE-NEXT: mr 3, 5 7648; PPC64LE-NEXT: blr 7649 %ret = atomicrmw xor ptr %ptr, i16 %val syncscope("singlethread") acq_rel 7650 ret i16 %ret 7651} 7652 7653define i16 @test469(ptr %ptr, i16 %val) { 7654; PPC64LE-LABEL: test469: 7655; PPC64LE: # %bb.0: 7656; PPC64LE-NEXT: sync 7657; PPC64LE-NEXT: .LBB469_1: 7658; PPC64LE-NEXT: lharx 5, 0, 3 7659; PPC64LE-NEXT: xor 6, 4, 5 7660; PPC64LE-NEXT: sthcx. 6, 0, 3 7661; PPC64LE-NEXT: bne 0, .LBB469_1 7662; PPC64LE-NEXT: # %bb.2: 7663; PPC64LE-NEXT: lwsync 7664; PPC64LE-NEXT: mr 3, 5 7665; PPC64LE-NEXT: blr 7666 %ret = atomicrmw xor ptr %ptr, i16 %val syncscope("singlethread") seq_cst 7667 ret i16 %ret 7668} 7669 7670define i32 @test470(ptr %ptr, i32 %val) { 7671; PPC64LE-LABEL: test470: 7672; PPC64LE: # %bb.0: 7673; PPC64LE-NEXT: .LBB470_1: 7674; PPC64LE-NEXT: lwarx 5, 0, 3 7675; PPC64LE-NEXT: xor 6, 4, 5 7676; PPC64LE-NEXT: stwcx. 6, 0, 3 7677; PPC64LE-NEXT: bne 0, .LBB470_1 7678; PPC64LE-NEXT: # %bb.2: 7679; PPC64LE-NEXT: mr 3, 5 7680; PPC64LE-NEXT: blr 7681 %ret = atomicrmw xor ptr %ptr, i32 %val syncscope("singlethread") monotonic 7682 ret i32 %ret 7683} 7684 7685define i32 @test471(ptr %ptr, i32 %val) { 7686; PPC64LE-LABEL: test471: 7687; PPC64LE: # %bb.0: 7688; PPC64LE-NEXT: mr 5, 3 7689; PPC64LE-NEXT: .LBB471_1: 7690; PPC64LE-NEXT: lwarx 3, 0, 5 7691; PPC64LE-NEXT: xor 6, 4, 3 7692; PPC64LE-NEXT: stwcx. 6, 0, 5 7693; PPC64LE-NEXT: bne 0, .LBB471_1 7694; PPC64LE-NEXT: # %bb.2: 7695; PPC64LE-NEXT: lwsync 7696; PPC64LE-NEXT: blr 7697 %ret = atomicrmw xor ptr %ptr, i32 %val syncscope("singlethread") acquire 7698 ret i32 %ret 7699} 7700 7701define i32 @test472(ptr %ptr, i32 %val) { 7702; PPC64LE-LABEL: test472: 7703; PPC64LE: # %bb.0: 7704; PPC64LE-NEXT: lwsync 7705; PPC64LE-NEXT: .LBB472_1: 7706; PPC64LE-NEXT: lwarx 5, 0, 3 7707; PPC64LE-NEXT: xor 6, 4, 5 7708; PPC64LE-NEXT: stwcx. 6, 0, 3 7709; PPC64LE-NEXT: bne 0, .LBB472_1 7710; PPC64LE-NEXT: # %bb.2: 7711; PPC64LE-NEXT: mr 3, 5 7712; PPC64LE-NEXT: blr 7713 %ret = atomicrmw xor ptr %ptr, i32 %val syncscope("singlethread") release 7714 ret i32 %ret 7715} 7716 7717define i32 @test473(ptr %ptr, i32 %val) { 7718; PPC64LE-LABEL: test473: 7719; PPC64LE: # %bb.0: 7720; PPC64LE-NEXT: lwsync 7721; PPC64LE-NEXT: .LBB473_1: 7722; PPC64LE-NEXT: lwarx 5, 0, 3 7723; PPC64LE-NEXT: xor 6, 4, 5 7724; PPC64LE-NEXT: stwcx. 6, 0, 3 7725; PPC64LE-NEXT: bne 0, .LBB473_1 7726; PPC64LE-NEXT: # %bb.2: 7727; PPC64LE-NEXT: lwsync 7728; PPC64LE-NEXT: mr 3, 5 7729; PPC64LE-NEXT: blr 7730 %ret = atomicrmw xor ptr %ptr, i32 %val syncscope("singlethread") acq_rel 7731 ret i32 %ret 7732} 7733 7734define i32 @test474(ptr %ptr, i32 %val) { 7735; PPC64LE-LABEL: test474: 7736; PPC64LE: # %bb.0: 7737; PPC64LE-NEXT: sync 7738; PPC64LE-NEXT: .LBB474_1: 7739; PPC64LE-NEXT: lwarx 5, 0, 3 7740; PPC64LE-NEXT: xor 6, 4, 5 7741; PPC64LE-NEXT: stwcx. 6, 0, 3 7742; PPC64LE-NEXT: bne 0, .LBB474_1 7743; PPC64LE-NEXT: # %bb.2: 7744; PPC64LE-NEXT: lwsync 7745; PPC64LE-NEXT: mr 3, 5 7746; PPC64LE-NEXT: blr 7747 %ret = atomicrmw xor ptr %ptr, i32 %val syncscope("singlethread") seq_cst 7748 ret i32 %ret 7749} 7750 7751define i64 @test475(ptr %ptr, i64 %val) { 7752; PPC64LE-LABEL: test475: 7753; PPC64LE: # %bb.0: 7754; PPC64LE-NEXT: .LBB475_1: 7755; PPC64LE-NEXT: ldarx 5, 0, 3 7756; PPC64LE-NEXT: xor 6, 4, 5 7757; PPC64LE-NEXT: stdcx. 6, 0, 3 7758; PPC64LE-NEXT: bne 0, .LBB475_1 7759; PPC64LE-NEXT: # %bb.2: 7760; PPC64LE-NEXT: mr 3, 5 7761; PPC64LE-NEXT: blr 7762 %ret = atomicrmw xor ptr %ptr, i64 %val syncscope("singlethread") monotonic 7763 ret i64 %ret 7764} 7765 7766define i64 @test476(ptr %ptr, i64 %val) { 7767; PPC64LE-LABEL: test476: 7768; PPC64LE: # %bb.0: 7769; PPC64LE-NEXT: mr 5, 3 7770; PPC64LE-NEXT: .LBB476_1: 7771; PPC64LE-NEXT: ldarx 3, 0, 5 7772; PPC64LE-NEXT: xor 6, 4, 3 7773; PPC64LE-NEXT: stdcx. 6, 0, 5 7774; PPC64LE-NEXT: bne 0, .LBB476_1 7775; PPC64LE-NEXT: # %bb.2: 7776; PPC64LE-NEXT: lwsync 7777; PPC64LE-NEXT: blr 7778 %ret = atomicrmw xor ptr %ptr, i64 %val syncscope("singlethread") acquire 7779 ret i64 %ret 7780} 7781 7782define i64 @test477(ptr %ptr, i64 %val) { 7783; PPC64LE-LABEL: test477: 7784; PPC64LE: # %bb.0: 7785; PPC64LE-NEXT: lwsync 7786; PPC64LE-NEXT: .LBB477_1: 7787; PPC64LE-NEXT: ldarx 5, 0, 3 7788; PPC64LE-NEXT: xor 6, 4, 5 7789; PPC64LE-NEXT: stdcx. 6, 0, 3 7790; PPC64LE-NEXT: bne 0, .LBB477_1 7791; PPC64LE-NEXT: # %bb.2: 7792; PPC64LE-NEXT: mr 3, 5 7793; PPC64LE-NEXT: blr 7794 %ret = atomicrmw xor ptr %ptr, i64 %val syncscope("singlethread") release 7795 ret i64 %ret 7796} 7797 7798define i64 @test478(ptr %ptr, i64 %val) { 7799; PPC64LE-LABEL: test478: 7800; PPC64LE: # %bb.0: 7801; PPC64LE-NEXT: lwsync 7802; PPC64LE-NEXT: .LBB478_1: 7803; PPC64LE-NEXT: ldarx 5, 0, 3 7804; PPC64LE-NEXT: xor 6, 4, 5 7805; PPC64LE-NEXT: stdcx. 6, 0, 3 7806; PPC64LE-NEXT: bne 0, .LBB478_1 7807; PPC64LE-NEXT: # %bb.2: 7808; PPC64LE-NEXT: lwsync 7809; PPC64LE-NEXT: mr 3, 5 7810; PPC64LE-NEXT: blr 7811 %ret = atomicrmw xor ptr %ptr, i64 %val syncscope("singlethread") acq_rel 7812 ret i64 %ret 7813} 7814 7815define i64 @test479(ptr %ptr, i64 %val) { 7816; PPC64LE-LABEL: test479: 7817; PPC64LE: # %bb.0: 7818; PPC64LE-NEXT: sync 7819; PPC64LE-NEXT: .LBB479_1: 7820; PPC64LE-NEXT: ldarx 5, 0, 3 7821; PPC64LE-NEXT: xor 6, 4, 5 7822; PPC64LE-NEXT: stdcx. 6, 0, 3 7823; PPC64LE-NEXT: bne 0, .LBB479_1 7824; PPC64LE-NEXT: # %bb.2: 7825; PPC64LE-NEXT: lwsync 7826; PPC64LE-NEXT: mr 3, 5 7827; PPC64LE-NEXT: blr 7828 %ret = atomicrmw xor ptr %ptr, i64 %val syncscope("singlethread") seq_cst 7829 ret i64 %ret 7830} 7831 7832define i8 @test480(ptr %ptr, i8 %val) { 7833; PPC64LE-LABEL: test480: 7834; PPC64LE: # %bb.0: 7835; PPC64LE-NEXT: extsb 5, 4 7836; PPC64LE-NEXT: .LBB480_1: 7837; PPC64LE-NEXT: lbarx 4, 0, 3 7838; PPC64LE-NEXT: extsb 6, 4 7839; PPC64LE-NEXT: cmpw 6, 5 7840; PPC64LE-NEXT: bgt 0, .LBB480_3 7841; PPC64LE-NEXT: # %bb.2: 7842; PPC64LE-NEXT: stbcx. 5, 0, 3 7843; PPC64LE-NEXT: bne 0, .LBB480_1 7844; PPC64LE-NEXT: .LBB480_3: 7845; PPC64LE-NEXT: mr 3, 4 7846; PPC64LE-NEXT: blr 7847 %ret = atomicrmw max ptr %ptr, i8 %val syncscope("singlethread") monotonic 7848 ret i8 %ret 7849} 7850 7851define i8 @test481(ptr %ptr, i8 %val) { 7852; PPC64LE-LABEL: test481: 7853; PPC64LE: # %bb.0: 7854; PPC64LE-NEXT: extsb 5, 4 7855; PPC64LE-NEXT: .LBB481_1: 7856; PPC64LE-NEXT: lbarx 4, 0, 3 7857; PPC64LE-NEXT: extsb 6, 4 7858; PPC64LE-NEXT: cmpw 6, 5 7859; PPC64LE-NEXT: bgt 0, .LBB481_3 7860; PPC64LE-NEXT: # %bb.2: 7861; PPC64LE-NEXT: stbcx. 5, 0, 3 7862; PPC64LE-NEXT: bne 0, .LBB481_1 7863; PPC64LE-NEXT: .LBB481_3: 7864; PPC64LE-NEXT: lwsync 7865; PPC64LE-NEXT: mr 3, 4 7866; PPC64LE-NEXT: blr 7867 %ret = atomicrmw max ptr %ptr, i8 %val syncscope("singlethread") acquire 7868 ret i8 %ret 7869} 7870 7871define i8 @test482(ptr %ptr, i8 %val) { 7872; PPC64LE-LABEL: test482: 7873; PPC64LE: # %bb.0: 7874; PPC64LE-NEXT: lwsync 7875; PPC64LE-NEXT: extsb 5, 4 7876; PPC64LE-NEXT: .LBB482_1: 7877; PPC64LE-NEXT: lbarx 4, 0, 3 7878; PPC64LE-NEXT: extsb 6, 4 7879; PPC64LE-NEXT: cmpw 6, 5 7880; PPC64LE-NEXT: bgt 0, .LBB482_3 7881; PPC64LE-NEXT: # %bb.2: 7882; PPC64LE-NEXT: stbcx. 5, 0, 3 7883; PPC64LE-NEXT: bne 0, .LBB482_1 7884; PPC64LE-NEXT: .LBB482_3: 7885; PPC64LE-NEXT: mr 3, 4 7886; PPC64LE-NEXT: blr 7887 %ret = atomicrmw max ptr %ptr, i8 %val syncscope("singlethread") release 7888 ret i8 %ret 7889} 7890 7891define i8 @test483(ptr %ptr, i8 %val) { 7892; PPC64LE-LABEL: test483: 7893; PPC64LE: # %bb.0: 7894; PPC64LE-NEXT: lwsync 7895; PPC64LE-NEXT: extsb 5, 4 7896; PPC64LE-NEXT: .LBB483_1: 7897; PPC64LE-NEXT: lbarx 4, 0, 3 7898; PPC64LE-NEXT: extsb 6, 4 7899; PPC64LE-NEXT: cmpw 6, 5 7900; PPC64LE-NEXT: bgt 0, .LBB483_3 7901; PPC64LE-NEXT: # %bb.2: 7902; PPC64LE-NEXT: stbcx. 5, 0, 3 7903; PPC64LE-NEXT: bne 0, .LBB483_1 7904; PPC64LE-NEXT: .LBB483_3: 7905; PPC64LE-NEXT: lwsync 7906; PPC64LE-NEXT: mr 3, 4 7907; PPC64LE-NEXT: blr 7908 %ret = atomicrmw max ptr %ptr, i8 %val syncscope("singlethread") acq_rel 7909 ret i8 %ret 7910} 7911 7912define i8 @test484(ptr %ptr, i8 %val) { 7913; PPC64LE-LABEL: test484: 7914; PPC64LE: # %bb.0: 7915; PPC64LE-NEXT: sync 7916; PPC64LE-NEXT: extsb 5, 4 7917; PPC64LE-NEXT: .LBB484_1: 7918; PPC64LE-NEXT: lbarx 4, 0, 3 7919; PPC64LE-NEXT: extsb 6, 4 7920; PPC64LE-NEXT: cmpw 6, 5 7921; PPC64LE-NEXT: bgt 0, .LBB484_3 7922; PPC64LE-NEXT: # %bb.2: 7923; PPC64LE-NEXT: stbcx. 5, 0, 3 7924; PPC64LE-NEXT: bne 0, .LBB484_1 7925; PPC64LE-NEXT: .LBB484_3: 7926; PPC64LE-NEXT: lwsync 7927; PPC64LE-NEXT: mr 3, 4 7928; PPC64LE-NEXT: blr 7929 %ret = atomicrmw max ptr %ptr, i8 %val syncscope("singlethread") seq_cst 7930 ret i8 %ret 7931} 7932 7933define i16 @test485(ptr %ptr, i16 %val) { 7934; PPC64LE-LABEL: test485: 7935; PPC64LE: # %bb.0: 7936; PPC64LE-NEXT: extsh 5, 4 7937; PPC64LE-NEXT: .LBB485_1: 7938; PPC64LE-NEXT: lharx 4, 0, 3 7939; PPC64LE-NEXT: extsh 6, 4 7940; PPC64LE-NEXT: cmpw 6, 5 7941; PPC64LE-NEXT: bgt 0, .LBB485_3 7942; PPC64LE-NEXT: # %bb.2: 7943; PPC64LE-NEXT: sthcx. 5, 0, 3 7944; PPC64LE-NEXT: bne 0, .LBB485_1 7945; PPC64LE-NEXT: .LBB485_3: 7946; PPC64LE-NEXT: mr 3, 4 7947; PPC64LE-NEXT: blr 7948 %ret = atomicrmw max ptr %ptr, i16 %val syncscope("singlethread") monotonic 7949 ret i16 %ret 7950} 7951 7952define i16 @test486(ptr %ptr, i16 %val) { 7953; PPC64LE-LABEL: test486: 7954; PPC64LE: # %bb.0: 7955; PPC64LE-NEXT: extsh 5, 4 7956; PPC64LE-NEXT: .LBB486_1: 7957; PPC64LE-NEXT: lharx 4, 0, 3 7958; PPC64LE-NEXT: extsh 6, 4 7959; PPC64LE-NEXT: cmpw 6, 5 7960; PPC64LE-NEXT: bgt 0, .LBB486_3 7961; PPC64LE-NEXT: # %bb.2: 7962; PPC64LE-NEXT: sthcx. 5, 0, 3 7963; PPC64LE-NEXT: bne 0, .LBB486_1 7964; PPC64LE-NEXT: .LBB486_3: 7965; PPC64LE-NEXT: lwsync 7966; PPC64LE-NEXT: mr 3, 4 7967; PPC64LE-NEXT: blr 7968 %ret = atomicrmw max ptr %ptr, i16 %val syncscope("singlethread") acquire 7969 ret i16 %ret 7970} 7971 7972define i16 @test487(ptr %ptr, i16 %val) { 7973; PPC64LE-LABEL: test487: 7974; PPC64LE: # %bb.0: 7975; PPC64LE-NEXT: lwsync 7976; PPC64LE-NEXT: extsh 5, 4 7977; PPC64LE-NEXT: .LBB487_1: 7978; PPC64LE-NEXT: lharx 4, 0, 3 7979; PPC64LE-NEXT: extsh 6, 4 7980; PPC64LE-NEXT: cmpw 6, 5 7981; PPC64LE-NEXT: bgt 0, .LBB487_3 7982; PPC64LE-NEXT: # %bb.2: 7983; PPC64LE-NEXT: sthcx. 5, 0, 3 7984; PPC64LE-NEXT: bne 0, .LBB487_1 7985; PPC64LE-NEXT: .LBB487_3: 7986; PPC64LE-NEXT: mr 3, 4 7987; PPC64LE-NEXT: blr 7988 %ret = atomicrmw max ptr %ptr, i16 %val syncscope("singlethread") release 7989 ret i16 %ret 7990} 7991 7992define i16 @test488(ptr %ptr, i16 %val) { 7993; PPC64LE-LABEL: test488: 7994; PPC64LE: # %bb.0: 7995; PPC64LE-NEXT: lwsync 7996; PPC64LE-NEXT: extsh 5, 4 7997; PPC64LE-NEXT: .LBB488_1: 7998; PPC64LE-NEXT: lharx 4, 0, 3 7999; PPC64LE-NEXT: extsh 6, 4 8000; PPC64LE-NEXT: cmpw 6, 5 8001; PPC64LE-NEXT: bgt 0, .LBB488_3 8002; PPC64LE-NEXT: # %bb.2: 8003; PPC64LE-NEXT: sthcx. 5, 0, 3 8004; PPC64LE-NEXT: bne 0, .LBB488_1 8005; PPC64LE-NEXT: .LBB488_3: 8006; PPC64LE-NEXT: lwsync 8007; PPC64LE-NEXT: mr 3, 4 8008; PPC64LE-NEXT: blr 8009 %ret = atomicrmw max ptr %ptr, i16 %val syncscope("singlethread") acq_rel 8010 ret i16 %ret 8011} 8012 8013define i16 @test489(ptr %ptr, i16 %val) { 8014; PPC64LE-LABEL: test489: 8015; PPC64LE: # %bb.0: 8016; PPC64LE-NEXT: sync 8017; PPC64LE-NEXT: extsh 5, 4 8018; PPC64LE-NEXT: .LBB489_1: 8019; PPC64LE-NEXT: lharx 4, 0, 3 8020; PPC64LE-NEXT: extsh 6, 4 8021; PPC64LE-NEXT: cmpw 6, 5 8022; PPC64LE-NEXT: bgt 0, .LBB489_3 8023; PPC64LE-NEXT: # %bb.2: 8024; PPC64LE-NEXT: sthcx. 5, 0, 3 8025; PPC64LE-NEXT: bne 0, .LBB489_1 8026; PPC64LE-NEXT: .LBB489_3: 8027; PPC64LE-NEXT: lwsync 8028; PPC64LE-NEXT: mr 3, 4 8029; PPC64LE-NEXT: blr 8030 %ret = atomicrmw max ptr %ptr, i16 %val syncscope("singlethread") seq_cst 8031 ret i16 %ret 8032} 8033 8034define i32 @test490(ptr %ptr, i32 %val) { 8035; PPC64LE-LABEL: test490: 8036; PPC64LE: # %bb.0: 8037; PPC64LE-NEXT: .LBB490_1: 8038; PPC64LE-NEXT: lwarx 5, 0, 3 8039; PPC64LE-NEXT: cmpw 5, 4 8040; PPC64LE-NEXT: bgt 0, .LBB490_3 8041; PPC64LE-NEXT: # %bb.2: 8042; PPC64LE-NEXT: stwcx. 4, 0, 3 8043; PPC64LE-NEXT: bne 0, .LBB490_1 8044; PPC64LE-NEXT: .LBB490_3: 8045; PPC64LE-NEXT: mr 3, 5 8046; PPC64LE-NEXT: blr 8047 %ret = atomicrmw max ptr %ptr, i32 %val syncscope("singlethread") monotonic 8048 ret i32 %ret 8049} 8050 8051define i32 @test491(ptr %ptr, i32 %val) { 8052; PPC64LE-LABEL: test491: 8053; PPC64LE: # %bb.0: 8054; PPC64LE-NEXT: mr 5, 3 8055; PPC64LE-NEXT: .LBB491_1: 8056; PPC64LE-NEXT: lwarx 3, 0, 5 8057; PPC64LE-NEXT: cmpw 3, 4 8058; PPC64LE-NEXT: bgt 0, .LBB491_3 8059; PPC64LE-NEXT: # %bb.2: 8060; PPC64LE-NEXT: stwcx. 4, 0, 5 8061; PPC64LE-NEXT: bne 0, .LBB491_1 8062; PPC64LE-NEXT: .LBB491_3: 8063; PPC64LE-NEXT: lwsync 8064; PPC64LE-NEXT: blr 8065 %ret = atomicrmw max ptr %ptr, i32 %val syncscope("singlethread") acquire 8066 ret i32 %ret 8067} 8068 8069define i32 @test492(ptr %ptr, i32 %val) { 8070; PPC64LE-LABEL: test492: 8071; PPC64LE: # %bb.0: 8072; PPC64LE-NEXT: lwsync 8073; PPC64LE-NEXT: .LBB492_1: 8074; PPC64LE-NEXT: lwarx 5, 0, 3 8075; PPC64LE-NEXT: cmpw 5, 4 8076; PPC64LE-NEXT: bgt 0, .LBB492_3 8077; PPC64LE-NEXT: # %bb.2: 8078; PPC64LE-NEXT: stwcx. 4, 0, 3 8079; PPC64LE-NEXT: bne 0, .LBB492_1 8080; PPC64LE-NEXT: .LBB492_3: 8081; PPC64LE-NEXT: mr 3, 5 8082; PPC64LE-NEXT: blr 8083 %ret = atomicrmw max ptr %ptr, i32 %val syncscope("singlethread") release 8084 ret i32 %ret 8085} 8086 8087define i32 @test493(ptr %ptr, i32 %val) { 8088; PPC64LE-LABEL: test493: 8089; PPC64LE: # %bb.0: 8090; PPC64LE-NEXT: lwsync 8091; PPC64LE-NEXT: .LBB493_1: 8092; PPC64LE-NEXT: lwarx 5, 0, 3 8093; PPC64LE-NEXT: cmpw 5, 4 8094; PPC64LE-NEXT: bgt 0, .LBB493_3 8095; PPC64LE-NEXT: # %bb.2: 8096; PPC64LE-NEXT: stwcx. 4, 0, 3 8097; PPC64LE-NEXT: bne 0, .LBB493_1 8098; PPC64LE-NEXT: .LBB493_3: 8099; PPC64LE-NEXT: lwsync 8100; PPC64LE-NEXT: mr 3, 5 8101; PPC64LE-NEXT: blr 8102 %ret = atomicrmw max ptr %ptr, i32 %val syncscope("singlethread") acq_rel 8103 ret i32 %ret 8104} 8105 8106define i32 @test494(ptr %ptr, i32 %val) { 8107; PPC64LE-LABEL: test494: 8108; PPC64LE: # %bb.0: 8109; PPC64LE-NEXT: sync 8110; PPC64LE-NEXT: .LBB494_1: 8111; PPC64LE-NEXT: lwarx 5, 0, 3 8112; PPC64LE-NEXT: cmpw 5, 4 8113; PPC64LE-NEXT: bgt 0, .LBB494_3 8114; PPC64LE-NEXT: # %bb.2: 8115; PPC64LE-NEXT: stwcx. 4, 0, 3 8116; PPC64LE-NEXT: bne 0, .LBB494_1 8117; PPC64LE-NEXT: .LBB494_3: 8118; PPC64LE-NEXT: lwsync 8119; PPC64LE-NEXT: mr 3, 5 8120; PPC64LE-NEXT: blr 8121 %ret = atomicrmw max ptr %ptr, i32 %val syncscope("singlethread") seq_cst 8122 ret i32 %ret 8123} 8124 8125define i64 @test495(ptr %ptr, i64 %val) { 8126; PPC64LE-LABEL: test495: 8127; PPC64LE: # %bb.0: 8128; PPC64LE-NEXT: .LBB495_1: 8129; PPC64LE-NEXT: ldarx 5, 0, 3 8130; PPC64LE-NEXT: cmpd 5, 4 8131; PPC64LE-NEXT: bgt 0, .LBB495_3 8132; PPC64LE-NEXT: # %bb.2: 8133; PPC64LE-NEXT: stdcx. 4, 0, 3 8134; PPC64LE-NEXT: bne 0, .LBB495_1 8135; PPC64LE-NEXT: .LBB495_3: 8136; PPC64LE-NEXT: mr 3, 5 8137; PPC64LE-NEXT: blr 8138 %ret = atomicrmw max ptr %ptr, i64 %val syncscope("singlethread") monotonic 8139 ret i64 %ret 8140} 8141 8142define i64 @test496(ptr %ptr, i64 %val) { 8143; PPC64LE-LABEL: test496: 8144; PPC64LE: # %bb.0: 8145; PPC64LE-NEXT: mr 5, 3 8146; PPC64LE-NEXT: .LBB496_1: 8147; PPC64LE-NEXT: ldarx 3, 0, 5 8148; PPC64LE-NEXT: cmpd 3, 4 8149; PPC64LE-NEXT: bgt 0, .LBB496_3 8150; PPC64LE-NEXT: # %bb.2: 8151; PPC64LE-NEXT: stdcx. 4, 0, 5 8152; PPC64LE-NEXT: bne 0, .LBB496_1 8153; PPC64LE-NEXT: .LBB496_3: 8154; PPC64LE-NEXT: lwsync 8155; PPC64LE-NEXT: blr 8156 %ret = atomicrmw max ptr %ptr, i64 %val syncscope("singlethread") acquire 8157 ret i64 %ret 8158} 8159 8160define i64 @test497(ptr %ptr, i64 %val) { 8161; PPC64LE-LABEL: test497: 8162; PPC64LE: # %bb.0: 8163; PPC64LE-NEXT: lwsync 8164; PPC64LE-NEXT: .LBB497_1: 8165; PPC64LE-NEXT: ldarx 5, 0, 3 8166; PPC64LE-NEXT: cmpd 5, 4 8167; PPC64LE-NEXT: bgt 0, .LBB497_3 8168; PPC64LE-NEXT: # %bb.2: 8169; PPC64LE-NEXT: stdcx. 4, 0, 3 8170; PPC64LE-NEXT: bne 0, .LBB497_1 8171; PPC64LE-NEXT: .LBB497_3: 8172; PPC64LE-NEXT: mr 3, 5 8173; PPC64LE-NEXT: blr 8174 %ret = atomicrmw max ptr %ptr, i64 %val syncscope("singlethread") release 8175 ret i64 %ret 8176} 8177 8178define i64 @test498(ptr %ptr, i64 %val) { 8179; PPC64LE-LABEL: test498: 8180; PPC64LE: # %bb.0: 8181; PPC64LE-NEXT: lwsync 8182; PPC64LE-NEXT: .LBB498_1: 8183; PPC64LE-NEXT: ldarx 5, 0, 3 8184; PPC64LE-NEXT: cmpd 5, 4 8185; PPC64LE-NEXT: bgt 0, .LBB498_3 8186; PPC64LE-NEXT: # %bb.2: 8187; PPC64LE-NEXT: stdcx. 4, 0, 3 8188; PPC64LE-NEXT: bne 0, .LBB498_1 8189; PPC64LE-NEXT: .LBB498_3: 8190; PPC64LE-NEXT: lwsync 8191; PPC64LE-NEXT: mr 3, 5 8192; PPC64LE-NEXT: blr 8193 %ret = atomicrmw max ptr %ptr, i64 %val syncscope("singlethread") acq_rel 8194 ret i64 %ret 8195} 8196 8197define i64 @test499(ptr %ptr, i64 %val) { 8198; PPC64LE-LABEL: test499: 8199; PPC64LE: # %bb.0: 8200; PPC64LE-NEXT: sync 8201; PPC64LE-NEXT: .LBB499_1: 8202; PPC64LE-NEXT: ldarx 5, 0, 3 8203; PPC64LE-NEXT: cmpd 5, 4 8204; PPC64LE-NEXT: bgt 0, .LBB499_3 8205; PPC64LE-NEXT: # %bb.2: 8206; PPC64LE-NEXT: stdcx. 4, 0, 3 8207; PPC64LE-NEXT: bne 0, .LBB499_1 8208; PPC64LE-NEXT: .LBB499_3: 8209; PPC64LE-NEXT: lwsync 8210; PPC64LE-NEXT: mr 3, 5 8211; PPC64LE-NEXT: blr 8212 %ret = atomicrmw max ptr %ptr, i64 %val syncscope("singlethread") seq_cst 8213 ret i64 %ret 8214} 8215 8216define i8 @test500(ptr %ptr, i8 %val) { 8217; PPC64LE-LABEL: test500: 8218; PPC64LE: # %bb.0: 8219; PPC64LE-NEXT: extsb 5, 4 8220; PPC64LE-NEXT: .LBB500_1: 8221; PPC64LE-NEXT: lbarx 4, 0, 3 8222; PPC64LE-NEXT: extsb 6, 4 8223; PPC64LE-NEXT: cmpw 6, 5 8224; PPC64LE-NEXT: blt 0, .LBB500_3 8225; PPC64LE-NEXT: # %bb.2: 8226; PPC64LE-NEXT: stbcx. 5, 0, 3 8227; PPC64LE-NEXT: bne 0, .LBB500_1 8228; PPC64LE-NEXT: .LBB500_3: 8229; PPC64LE-NEXT: mr 3, 4 8230; PPC64LE-NEXT: blr 8231 %ret = atomicrmw min ptr %ptr, i8 %val syncscope("singlethread") monotonic 8232 ret i8 %ret 8233} 8234 8235define i8 @test501(ptr %ptr, i8 %val) { 8236; PPC64LE-LABEL: test501: 8237; PPC64LE: # %bb.0: 8238; PPC64LE-NEXT: extsb 5, 4 8239; PPC64LE-NEXT: .LBB501_1: 8240; PPC64LE-NEXT: lbarx 4, 0, 3 8241; PPC64LE-NEXT: extsb 6, 4 8242; PPC64LE-NEXT: cmpw 6, 5 8243; PPC64LE-NEXT: blt 0, .LBB501_3 8244; PPC64LE-NEXT: # %bb.2: 8245; PPC64LE-NEXT: stbcx. 5, 0, 3 8246; PPC64LE-NEXT: bne 0, .LBB501_1 8247; PPC64LE-NEXT: .LBB501_3: 8248; PPC64LE-NEXT: lwsync 8249; PPC64LE-NEXT: mr 3, 4 8250; PPC64LE-NEXT: blr 8251 %ret = atomicrmw min ptr %ptr, i8 %val syncscope("singlethread") acquire 8252 ret i8 %ret 8253} 8254 8255define i8 @test502(ptr %ptr, i8 %val) { 8256; PPC64LE-LABEL: test502: 8257; PPC64LE: # %bb.0: 8258; PPC64LE-NEXT: lwsync 8259; PPC64LE-NEXT: extsb 5, 4 8260; PPC64LE-NEXT: .LBB502_1: 8261; PPC64LE-NEXT: lbarx 4, 0, 3 8262; PPC64LE-NEXT: extsb 6, 4 8263; PPC64LE-NEXT: cmpw 6, 5 8264; PPC64LE-NEXT: blt 0, .LBB502_3 8265; PPC64LE-NEXT: # %bb.2: 8266; PPC64LE-NEXT: stbcx. 5, 0, 3 8267; PPC64LE-NEXT: bne 0, .LBB502_1 8268; PPC64LE-NEXT: .LBB502_3: 8269; PPC64LE-NEXT: mr 3, 4 8270; PPC64LE-NEXT: blr 8271 %ret = atomicrmw min ptr %ptr, i8 %val syncscope("singlethread") release 8272 ret i8 %ret 8273} 8274 8275define i8 @test503(ptr %ptr, i8 %val) { 8276; PPC64LE-LABEL: test503: 8277; PPC64LE: # %bb.0: 8278; PPC64LE-NEXT: lwsync 8279; PPC64LE-NEXT: extsb 5, 4 8280; PPC64LE-NEXT: .LBB503_1: 8281; PPC64LE-NEXT: lbarx 4, 0, 3 8282; PPC64LE-NEXT: extsb 6, 4 8283; PPC64LE-NEXT: cmpw 6, 5 8284; PPC64LE-NEXT: blt 0, .LBB503_3 8285; PPC64LE-NEXT: # %bb.2: 8286; PPC64LE-NEXT: stbcx. 5, 0, 3 8287; PPC64LE-NEXT: bne 0, .LBB503_1 8288; PPC64LE-NEXT: .LBB503_3: 8289; PPC64LE-NEXT: lwsync 8290; PPC64LE-NEXT: mr 3, 4 8291; PPC64LE-NEXT: blr 8292 %ret = atomicrmw min ptr %ptr, i8 %val syncscope("singlethread") acq_rel 8293 ret i8 %ret 8294} 8295 8296define i8 @test504(ptr %ptr, i8 %val) { 8297; PPC64LE-LABEL: test504: 8298; PPC64LE: # %bb.0: 8299; PPC64LE-NEXT: sync 8300; PPC64LE-NEXT: extsb 5, 4 8301; PPC64LE-NEXT: .LBB504_1: 8302; PPC64LE-NEXT: lbarx 4, 0, 3 8303; PPC64LE-NEXT: extsb 6, 4 8304; PPC64LE-NEXT: cmpw 6, 5 8305; PPC64LE-NEXT: blt 0, .LBB504_3 8306; PPC64LE-NEXT: # %bb.2: 8307; PPC64LE-NEXT: stbcx. 5, 0, 3 8308; PPC64LE-NEXT: bne 0, .LBB504_1 8309; PPC64LE-NEXT: .LBB504_3: 8310; PPC64LE-NEXT: lwsync 8311; PPC64LE-NEXT: mr 3, 4 8312; PPC64LE-NEXT: blr 8313 %ret = atomicrmw min ptr %ptr, i8 %val syncscope("singlethread") seq_cst 8314 ret i8 %ret 8315} 8316 8317define i16 @test505(ptr %ptr, i16 %val) { 8318; PPC64LE-LABEL: test505: 8319; PPC64LE: # %bb.0: 8320; PPC64LE-NEXT: extsh 5, 4 8321; PPC64LE-NEXT: .LBB505_1: 8322; PPC64LE-NEXT: lharx 4, 0, 3 8323; PPC64LE-NEXT: extsh 6, 4 8324; PPC64LE-NEXT: cmpw 6, 5 8325; PPC64LE-NEXT: blt 0, .LBB505_3 8326; PPC64LE-NEXT: # %bb.2: 8327; PPC64LE-NEXT: sthcx. 5, 0, 3 8328; PPC64LE-NEXT: bne 0, .LBB505_1 8329; PPC64LE-NEXT: .LBB505_3: 8330; PPC64LE-NEXT: mr 3, 4 8331; PPC64LE-NEXT: blr 8332 %ret = atomicrmw min ptr %ptr, i16 %val syncscope("singlethread") monotonic 8333 ret i16 %ret 8334} 8335 8336define i16 @test506(ptr %ptr, i16 %val) { 8337; PPC64LE-LABEL: test506: 8338; PPC64LE: # %bb.0: 8339; PPC64LE-NEXT: extsh 5, 4 8340; PPC64LE-NEXT: .LBB506_1: 8341; PPC64LE-NEXT: lharx 4, 0, 3 8342; PPC64LE-NEXT: extsh 6, 4 8343; PPC64LE-NEXT: cmpw 6, 5 8344; PPC64LE-NEXT: blt 0, .LBB506_3 8345; PPC64LE-NEXT: # %bb.2: 8346; PPC64LE-NEXT: sthcx. 5, 0, 3 8347; PPC64LE-NEXT: bne 0, .LBB506_1 8348; PPC64LE-NEXT: .LBB506_3: 8349; PPC64LE-NEXT: lwsync 8350; PPC64LE-NEXT: mr 3, 4 8351; PPC64LE-NEXT: blr 8352 %ret = atomicrmw min ptr %ptr, i16 %val syncscope("singlethread") acquire 8353 ret i16 %ret 8354} 8355 8356define i16 @test507(ptr %ptr, i16 %val) { 8357; PPC64LE-LABEL: test507: 8358; PPC64LE: # %bb.0: 8359; PPC64LE-NEXT: lwsync 8360; PPC64LE-NEXT: extsh 5, 4 8361; PPC64LE-NEXT: .LBB507_1: 8362; PPC64LE-NEXT: lharx 4, 0, 3 8363; PPC64LE-NEXT: extsh 6, 4 8364; PPC64LE-NEXT: cmpw 6, 5 8365; PPC64LE-NEXT: blt 0, .LBB507_3 8366; PPC64LE-NEXT: # %bb.2: 8367; PPC64LE-NEXT: sthcx. 5, 0, 3 8368; PPC64LE-NEXT: bne 0, .LBB507_1 8369; PPC64LE-NEXT: .LBB507_3: 8370; PPC64LE-NEXT: mr 3, 4 8371; PPC64LE-NEXT: blr 8372 %ret = atomicrmw min ptr %ptr, i16 %val syncscope("singlethread") release 8373 ret i16 %ret 8374} 8375 8376define i16 @test508(ptr %ptr, i16 %val) { 8377; PPC64LE-LABEL: test508: 8378; PPC64LE: # %bb.0: 8379; PPC64LE-NEXT: lwsync 8380; PPC64LE-NEXT: extsh 5, 4 8381; PPC64LE-NEXT: .LBB508_1: 8382; PPC64LE-NEXT: lharx 4, 0, 3 8383; PPC64LE-NEXT: extsh 6, 4 8384; PPC64LE-NEXT: cmpw 6, 5 8385; PPC64LE-NEXT: blt 0, .LBB508_3 8386; PPC64LE-NEXT: # %bb.2: 8387; PPC64LE-NEXT: sthcx. 5, 0, 3 8388; PPC64LE-NEXT: bne 0, .LBB508_1 8389; PPC64LE-NEXT: .LBB508_3: 8390; PPC64LE-NEXT: lwsync 8391; PPC64LE-NEXT: mr 3, 4 8392; PPC64LE-NEXT: blr 8393 %ret = atomicrmw min ptr %ptr, i16 %val syncscope("singlethread") acq_rel 8394 ret i16 %ret 8395} 8396 8397define i16 @test509(ptr %ptr, i16 %val) { 8398; PPC64LE-LABEL: test509: 8399; PPC64LE: # %bb.0: 8400; PPC64LE-NEXT: sync 8401; PPC64LE-NEXT: extsh 5, 4 8402; PPC64LE-NEXT: .LBB509_1: 8403; PPC64LE-NEXT: lharx 4, 0, 3 8404; PPC64LE-NEXT: extsh 6, 4 8405; PPC64LE-NEXT: cmpw 6, 5 8406; PPC64LE-NEXT: blt 0, .LBB509_3 8407; PPC64LE-NEXT: # %bb.2: 8408; PPC64LE-NEXT: sthcx. 5, 0, 3 8409; PPC64LE-NEXT: bne 0, .LBB509_1 8410; PPC64LE-NEXT: .LBB509_3: 8411; PPC64LE-NEXT: lwsync 8412; PPC64LE-NEXT: mr 3, 4 8413; PPC64LE-NEXT: blr 8414 %ret = atomicrmw min ptr %ptr, i16 %val syncscope("singlethread") seq_cst 8415 ret i16 %ret 8416} 8417 8418define i32 @test510(ptr %ptr, i32 %val) { 8419; PPC64LE-LABEL: test510: 8420; PPC64LE: # %bb.0: 8421; PPC64LE-NEXT: .LBB510_1: 8422; PPC64LE-NEXT: lwarx 5, 0, 3 8423; PPC64LE-NEXT: cmpw 5, 4 8424; PPC64LE-NEXT: blt 0, .LBB510_3 8425; PPC64LE-NEXT: # %bb.2: 8426; PPC64LE-NEXT: stwcx. 4, 0, 3 8427; PPC64LE-NEXT: bne 0, .LBB510_1 8428; PPC64LE-NEXT: .LBB510_3: 8429; PPC64LE-NEXT: mr 3, 5 8430; PPC64LE-NEXT: blr 8431 %ret = atomicrmw min ptr %ptr, i32 %val syncscope("singlethread") monotonic 8432 ret i32 %ret 8433} 8434 8435define i32 @test511(ptr %ptr, i32 %val) { 8436; PPC64LE-LABEL: test511: 8437; PPC64LE: # %bb.0: 8438; PPC64LE-NEXT: mr 5, 3 8439; PPC64LE-NEXT: .LBB511_1: 8440; PPC64LE-NEXT: lwarx 3, 0, 5 8441; PPC64LE-NEXT: cmpw 3, 4 8442; PPC64LE-NEXT: blt 0, .LBB511_3 8443; PPC64LE-NEXT: # %bb.2: 8444; PPC64LE-NEXT: stwcx. 4, 0, 5 8445; PPC64LE-NEXT: bne 0, .LBB511_1 8446; PPC64LE-NEXT: .LBB511_3: 8447; PPC64LE-NEXT: lwsync 8448; PPC64LE-NEXT: blr 8449 %ret = atomicrmw min ptr %ptr, i32 %val syncscope("singlethread") acquire 8450 ret i32 %ret 8451} 8452 8453define i32 @test512(ptr %ptr, i32 %val) { 8454; PPC64LE-LABEL: test512: 8455; PPC64LE: # %bb.0: 8456; PPC64LE-NEXT: lwsync 8457; PPC64LE-NEXT: .LBB512_1: 8458; PPC64LE-NEXT: lwarx 5, 0, 3 8459; PPC64LE-NEXT: cmpw 5, 4 8460; PPC64LE-NEXT: blt 0, .LBB512_3 8461; PPC64LE-NEXT: # %bb.2: 8462; PPC64LE-NEXT: stwcx. 4, 0, 3 8463; PPC64LE-NEXT: bne 0, .LBB512_1 8464; PPC64LE-NEXT: .LBB512_3: 8465; PPC64LE-NEXT: mr 3, 5 8466; PPC64LE-NEXT: blr 8467 %ret = atomicrmw min ptr %ptr, i32 %val syncscope("singlethread") release 8468 ret i32 %ret 8469} 8470 8471define i32 @test513(ptr %ptr, i32 %val) { 8472; PPC64LE-LABEL: test513: 8473; PPC64LE: # %bb.0: 8474; PPC64LE-NEXT: lwsync 8475; PPC64LE-NEXT: .LBB513_1: 8476; PPC64LE-NEXT: lwarx 5, 0, 3 8477; PPC64LE-NEXT: cmpw 5, 4 8478; PPC64LE-NEXT: blt 0, .LBB513_3 8479; PPC64LE-NEXT: # %bb.2: 8480; PPC64LE-NEXT: stwcx. 4, 0, 3 8481; PPC64LE-NEXT: bne 0, .LBB513_1 8482; PPC64LE-NEXT: .LBB513_3: 8483; PPC64LE-NEXT: lwsync 8484; PPC64LE-NEXT: mr 3, 5 8485; PPC64LE-NEXT: blr 8486 %ret = atomicrmw min ptr %ptr, i32 %val syncscope("singlethread") acq_rel 8487 ret i32 %ret 8488} 8489 8490define i32 @test514(ptr %ptr, i32 %val) { 8491; PPC64LE-LABEL: test514: 8492; PPC64LE: # %bb.0: 8493; PPC64LE-NEXT: sync 8494; PPC64LE-NEXT: .LBB514_1: 8495; PPC64LE-NEXT: lwarx 5, 0, 3 8496; PPC64LE-NEXT: cmpw 5, 4 8497; PPC64LE-NEXT: blt 0, .LBB514_3 8498; PPC64LE-NEXT: # %bb.2: 8499; PPC64LE-NEXT: stwcx. 4, 0, 3 8500; PPC64LE-NEXT: bne 0, .LBB514_1 8501; PPC64LE-NEXT: .LBB514_3: 8502; PPC64LE-NEXT: lwsync 8503; PPC64LE-NEXT: mr 3, 5 8504; PPC64LE-NEXT: blr 8505 %ret = atomicrmw min ptr %ptr, i32 %val syncscope("singlethread") seq_cst 8506 ret i32 %ret 8507} 8508 8509define i64 @test515(ptr %ptr, i64 %val) { 8510; PPC64LE-LABEL: test515: 8511; PPC64LE: # %bb.0: 8512; PPC64LE-NEXT: .LBB515_1: 8513; PPC64LE-NEXT: ldarx 5, 0, 3 8514; PPC64LE-NEXT: cmpd 5, 4 8515; PPC64LE-NEXT: blt 0, .LBB515_3 8516; PPC64LE-NEXT: # %bb.2: 8517; PPC64LE-NEXT: stdcx. 4, 0, 3 8518; PPC64LE-NEXT: bne 0, .LBB515_1 8519; PPC64LE-NEXT: .LBB515_3: 8520; PPC64LE-NEXT: mr 3, 5 8521; PPC64LE-NEXT: blr 8522 %ret = atomicrmw min ptr %ptr, i64 %val syncscope("singlethread") monotonic 8523 ret i64 %ret 8524} 8525 8526define i64 @test516(ptr %ptr, i64 %val) { 8527; PPC64LE-LABEL: test516: 8528; PPC64LE: # %bb.0: 8529; PPC64LE-NEXT: mr 5, 3 8530; PPC64LE-NEXT: .LBB516_1: 8531; PPC64LE-NEXT: ldarx 3, 0, 5 8532; PPC64LE-NEXT: cmpd 3, 4 8533; PPC64LE-NEXT: blt 0, .LBB516_3 8534; PPC64LE-NEXT: # %bb.2: 8535; PPC64LE-NEXT: stdcx. 4, 0, 5 8536; PPC64LE-NEXT: bne 0, .LBB516_1 8537; PPC64LE-NEXT: .LBB516_3: 8538; PPC64LE-NEXT: lwsync 8539; PPC64LE-NEXT: blr 8540 %ret = atomicrmw min ptr %ptr, i64 %val syncscope("singlethread") acquire 8541 ret i64 %ret 8542} 8543 8544define i64 @test517(ptr %ptr, i64 %val) { 8545; PPC64LE-LABEL: test517: 8546; PPC64LE: # %bb.0: 8547; PPC64LE-NEXT: lwsync 8548; PPC64LE-NEXT: .LBB517_1: 8549; PPC64LE-NEXT: ldarx 5, 0, 3 8550; PPC64LE-NEXT: cmpd 5, 4 8551; PPC64LE-NEXT: blt 0, .LBB517_3 8552; PPC64LE-NEXT: # %bb.2: 8553; PPC64LE-NEXT: stdcx. 4, 0, 3 8554; PPC64LE-NEXT: bne 0, .LBB517_1 8555; PPC64LE-NEXT: .LBB517_3: 8556; PPC64LE-NEXT: mr 3, 5 8557; PPC64LE-NEXT: blr 8558 %ret = atomicrmw min ptr %ptr, i64 %val syncscope("singlethread") release 8559 ret i64 %ret 8560} 8561 8562define i64 @test518(ptr %ptr, i64 %val) { 8563; PPC64LE-LABEL: test518: 8564; PPC64LE: # %bb.0: 8565; PPC64LE-NEXT: lwsync 8566; PPC64LE-NEXT: .LBB518_1: 8567; PPC64LE-NEXT: ldarx 5, 0, 3 8568; PPC64LE-NEXT: cmpd 5, 4 8569; PPC64LE-NEXT: blt 0, .LBB518_3 8570; PPC64LE-NEXT: # %bb.2: 8571; PPC64LE-NEXT: stdcx. 4, 0, 3 8572; PPC64LE-NEXT: bne 0, .LBB518_1 8573; PPC64LE-NEXT: .LBB518_3: 8574; PPC64LE-NEXT: lwsync 8575; PPC64LE-NEXT: mr 3, 5 8576; PPC64LE-NEXT: blr 8577 %ret = atomicrmw min ptr %ptr, i64 %val syncscope("singlethread") acq_rel 8578 ret i64 %ret 8579} 8580 8581define i64 @test519(ptr %ptr, i64 %val) { 8582; PPC64LE-LABEL: test519: 8583; PPC64LE: # %bb.0: 8584; PPC64LE-NEXT: sync 8585; PPC64LE-NEXT: .LBB519_1: 8586; PPC64LE-NEXT: ldarx 5, 0, 3 8587; PPC64LE-NEXT: cmpd 5, 4 8588; PPC64LE-NEXT: blt 0, .LBB519_3 8589; PPC64LE-NEXT: # %bb.2: 8590; PPC64LE-NEXT: stdcx. 4, 0, 3 8591; PPC64LE-NEXT: bne 0, .LBB519_1 8592; PPC64LE-NEXT: .LBB519_3: 8593; PPC64LE-NEXT: lwsync 8594; PPC64LE-NEXT: mr 3, 5 8595; PPC64LE-NEXT: blr 8596 %ret = atomicrmw min ptr %ptr, i64 %val syncscope("singlethread") seq_cst 8597 ret i64 %ret 8598} 8599 8600define i8 @test520(ptr %ptr, i8 %val) { 8601; PPC64LE-LABEL: test520: 8602; PPC64LE: # %bb.0: 8603; PPC64LE-NEXT: .LBB520_1: 8604; PPC64LE-NEXT: lbarx 5, 0, 3 8605; PPC64LE-NEXT: cmplw 5, 4 8606; PPC64LE-NEXT: bgt 0, .LBB520_3 8607; PPC64LE-NEXT: # %bb.2: 8608; PPC64LE-NEXT: stbcx. 4, 0, 3 8609; PPC64LE-NEXT: bne 0, .LBB520_1 8610; PPC64LE-NEXT: .LBB520_3: 8611; PPC64LE-NEXT: mr 3, 5 8612; PPC64LE-NEXT: blr 8613 %ret = atomicrmw umax ptr %ptr, i8 %val syncscope("singlethread") monotonic 8614 ret i8 %ret 8615} 8616 8617define i8 @test521(ptr %ptr, i8 %val) { 8618; PPC64LE-LABEL: test521: 8619; PPC64LE: # %bb.0: 8620; PPC64LE-NEXT: mr 5, 3 8621; PPC64LE-NEXT: .LBB521_1: 8622; PPC64LE-NEXT: lbarx 3, 0, 5 8623; PPC64LE-NEXT: cmplw 3, 4 8624; PPC64LE-NEXT: bgt 0, .LBB521_3 8625; PPC64LE-NEXT: # %bb.2: 8626; PPC64LE-NEXT: stbcx. 4, 0, 5 8627; PPC64LE-NEXT: bne 0, .LBB521_1 8628; PPC64LE-NEXT: .LBB521_3: 8629; PPC64LE-NEXT: lwsync 8630; PPC64LE-NEXT: blr 8631 %ret = atomicrmw umax ptr %ptr, i8 %val syncscope("singlethread") acquire 8632 ret i8 %ret 8633} 8634 8635define i8 @test522(ptr %ptr, i8 %val) { 8636; PPC64LE-LABEL: test522: 8637; PPC64LE: # %bb.0: 8638; PPC64LE-NEXT: lwsync 8639; PPC64LE-NEXT: .LBB522_1: 8640; PPC64LE-NEXT: lbarx 5, 0, 3 8641; PPC64LE-NEXT: cmplw 5, 4 8642; PPC64LE-NEXT: bgt 0, .LBB522_3 8643; PPC64LE-NEXT: # %bb.2: 8644; PPC64LE-NEXT: stbcx. 4, 0, 3 8645; PPC64LE-NEXT: bne 0, .LBB522_1 8646; PPC64LE-NEXT: .LBB522_3: 8647; PPC64LE-NEXT: mr 3, 5 8648; PPC64LE-NEXT: blr 8649 %ret = atomicrmw umax ptr %ptr, i8 %val syncscope("singlethread") release 8650 ret i8 %ret 8651} 8652 8653define i8 @test523(ptr %ptr, i8 %val) { 8654; PPC64LE-LABEL: test523: 8655; PPC64LE: # %bb.0: 8656; PPC64LE-NEXT: lwsync 8657; PPC64LE-NEXT: .LBB523_1: 8658; PPC64LE-NEXT: lbarx 5, 0, 3 8659; PPC64LE-NEXT: cmplw 5, 4 8660; PPC64LE-NEXT: bgt 0, .LBB523_3 8661; PPC64LE-NEXT: # %bb.2: 8662; PPC64LE-NEXT: stbcx. 4, 0, 3 8663; PPC64LE-NEXT: bne 0, .LBB523_1 8664; PPC64LE-NEXT: .LBB523_3: 8665; PPC64LE-NEXT: lwsync 8666; PPC64LE-NEXT: mr 3, 5 8667; PPC64LE-NEXT: blr 8668 %ret = atomicrmw umax ptr %ptr, i8 %val syncscope("singlethread") acq_rel 8669 ret i8 %ret 8670} 8671 8672define i8 @test524(ptr %ptr, i8 %val) { 8673; PPC64LE-LABEL: test524: 8674; PPC64LE: # %bb.0: 8675; PPC64LE-NEXT: sync 8676; PPC64LE-NEXT: .LBB524_1: 8677; PPC64LE-NEXT: lbarx 5, 0, 3 8678; PPC64LE-NEXT: cmplw 5, 4 8679; PPC64LE-NEXT: bgt 0, .LBB524_3 8680; PPC64LE-NEXT: # %bb.2: 8681; PPC64LE-NEXT: stbcx. 4, 0, 3 8682; PPC64LE-NEXT: bne 0, .LBB524_1 8683; PPC64LE-NEXT: .LBB524_3: 8684; PPC64LE-NEXT: lwsync 8685; PPC64LE-NEXT: mr 3, 5 8686; PPC64LE-NEXT: blr 8687 %ret = atomicrmw umax ptr %ptr, i8 %val syncscope("singlethread") seq_cst 8688 ret i8 %ret 8689} 8690 8691define i16 @test525(ptr %ptr, i16 %val) { 8692; PPC64LE-LABEL: test525: 8693; PPC64LE: # %bb.0: 8694; PPC64LE-NEXT: .LBB525_1: 8695; PPC64LE-NEXT: lharx 5, 0, 3 8696; PPC64LE-NEXT: cmplw 5, 4 8697; PPC64LE-NEXT: bgt 0, .LBB525_3 8698; PPC64LE-NEXT: # %bb.2: 8699; PPC64LE-NEXT: sthcx. 4, 0, 3 8700; PPC64LE-NEXT: bne 0, .LBB525_1 8701; PPC64LE-NEXT: .LBB525_3: 8702; PPC64LE-NEXT: mr 3, 5 8703; PPC64LE-NEXT: blr 8704 %ret = atomicrmw umax ptr %ptr, i16 %val syncscope("singlethread") monotonic 8705 ret i16 %ret 8706} 8707 8708define i16 @test526(ptr %ptr, i16 %val) { 8709; PPC64LE-LABEL: test526: 8710; PPC64LE: # %bb.0: 8711; PPC64LE-NEXT: mr 5, 3 8712; PPC64LE-NEXT: .LBB526_1: 8713; PPC64LE-NEXT: lharx 3, 0, 5 8714; PPC64LE-NEXT: cmplw 3, 4 8715; PPC64LE-NEXT: bgt 0, .LBB526_3 8716; PPC64LE-NEXT: # %bb.2: 8717; PPC64LE-NEXT: sthcx. 4, 0, 5 8718; PPC64LE-NEXT: bne 0, .LBB526_1 8719; PPC64LE-NEXT: .LBB526_3: 8720; PPC64LE-NEXT: lwsync 8721; PPC64LE-NEXT: blr 8722 %ret = atomicrmw umax ptr %ptr, i16 %val syncscope("singlethread") acquire 8723 ret i16 %ret 8724} 8725 8726define i16 @test527(ptr %ptr, i16 %val) { 8727; PPC64LE-LABEL: test527: 8728; PPC64LE: # %bb.0: 8729; PPC64LE-NEXT: lwsync 8730; PPC64LE-NEXT: .LBB527_1: 8731; PPC64LE-NEXT: lharx 5, 0, 3 8732; PPC64LE-NEXT: cmplw 5, 4 8733; PPC64LE-NEXT: bgt 0, .LBB527_3 8734; PPC64LE-NEXT: # %bb.2: 8735; PPC64LE-NEXT: sthcx. 4, 0, 3 8736; PPC64LE-NEXT: bne 0, .LBB527_1 8737; PPC64LE-NEXT: .LBB527_3: 8738; PPC64LE-NEXT: mr 3, 5 8739; PPC64LE-NEXT: blr 8740 %ret = atomicrmw umax ptr %ptr, i16 %val syncscope("singlethread") release 8741 ret i16 %ret 8742} 8743 8744define i16 @test528(ptr %ptr, i16 %val) { 8745; PPC64LE-LABEL: test528: 8746; PPC64LE: # %bb.0: 8747; PPC64LE-NEXT: lwsync 8748; PPC64LE-NEXT: .LBB528_1: 8749; PPC64LE-NEXT: lharx 5, 0, 3 8750; PPC64LE-NEXT: cmplw 5, 4 8751; PPC64LE-NEXT: bgt 0, .LBB528_3 8752; PPC64LE-NEXT: # %bb.2: 8753; PPC64LE-NEXT: sthcx. 4, 0, 3 8754; PPC64LE-NEXT: bne 0, .LBB528_1 8755; PPC64LE-NEXT: .LBB528_3: 8756; PPC64LE-NEXT: lwsync 8757; PPC64LE-NEXT: mr 3, 5 8758; PPC64LE-NEXT: blr 8759 %ret = atomicrmw umax ptr %ptr, i16 %val syncscope("singlethread") acq_rel 8760 ret i16 %ret 8761} 8762 8763define i16 @test529(ptr %ptr, i16 %val) { 8764; PPC64LE-LABEL: test529: 8765; PPC64LE: # %bb.0: 8766; PPC64LE-NEXT: sync 8767; PPC64LE-NEXT: .LBB529_1: 8768; PPC64LE-NEXT: lharx 5, 0, 3 8769; PPC64LE-NEXT: cmplw 5, 4 8770; PPC64LE-NEXT: bgt 0, .LBB529_3 8771; PPC64LE-NEXT: # %bb.2: 8772; PPC64LE-NEXT: sthcx. 4, 0, 3 8773; PPC64LE-NEXT: bne 0, .LBB529_1 8774; PPC64LE-NEXT: .LBB529_3: 8775; PPC64LE-NEXT: lwsync 8776; PPC64LE-NEXT: mr 3, 5 8777; PPC64LE-NEXT: blr 8778 %ret = atomicrmw umax ptr %ptr, i16 %val syncscope("singlethread") seq_cst 8779 ret i16 %ret 8780} 8781 8782define i32 @test530(ptr %ptr, i32 %val) { 8783; PPC64LE-LABEL: test530: 8784; PPC64LE: # %bb.0: 8785; PPC64LE-NEXT: .LBB530_1: 8786; PPC64LE-NEXT: lwarx 5, 0, 3 8787; PPC64LE-NEXT: cmplw 5, 4 8788; PPC64LE-NEXT: bgt 0, .LBB530_3 8789; PPC64LE-NEXT: # %bb.2: 8790; PPC64LE-NEXT: stwcx. 4, 0, 3 8791; PPC64LE-NEXT: bne 0, .LBB530_1 8792; PPC64LE-NEXT: .LBB530_3: 8793; PPC64LE-NEXT: mr 3, 5 8794; PPC64LE-NEXT: blr 8795 %ret = atomicrmw umax ptr %ptr, i32 %val syncscope("singlethread") monotonic 8796 ret i32 %ret 8797} 8798 8799define i32 @test531(ptr %ptr, i32 %val) { 8800; PPC64LE-LABEL: test531: 8801; PPC64LE: # %bb.0: 8802; PPC64LE-NEXT: mr 5, 3 8803; PPC64LE-NEXT: .LBB531_1: 8804; PPC64LE-NEXT: lwarx 3, 0, 5 8805; PPC64LE-NEXT: cmplw 3, 4 8806; PPC64LE-NEXT: bgt 0, .LBB531_3 8807; PPC64LE-NEXT: # %bb.2: 8808; PPC64LE-NEXT: stwcx. 4, 0, 5 8809; PPC64LE-NEXT: bne 0, .LBB531_1 8810; PPC64LE-NEXT: .LBB531_3: 8811; PPC64LE-NEXT: lwsync 8812; PPC64LE-NEXT: blr 8813 %ret = atomicrmw umax ptr %ptr, i32 %val syncscope("singlethread") acquire 8814 ret i32 %ret 8815} 8816 8817define i32 @test532(ptr %ptr, i32 %val) { 8818; PPC64LE-LABEL: test532: 8819; PPC64LE: # %bb.0: 8820; PPC64LE-NEXT: lwsync 8821; PPC64LE-NEXT: .LBB532_1: 8822; PPC64LE-NEXT: lwarx 5, 0, 3 8823; PPC64LE-NEXT: cmplw 5, 4 8824; PPC64LE-NEXT: bgt 0, .LBB532_3 8825; PPC64LE-NEXT: # %bb.2: 8826; PPC64LE-NEXT: stwcx. 4, 0, 3 8827; PPC64LE-NEXT: bne 0, .LBB532_1 8828; PPC64LE-NEXT: .LBB532_3: 8829; PPC64LE-NEXT: mr 3, 5 8830; PPC64LE-NEXT: blr 8831 %ret = atomicrmw umax ptr %ptr, i32 %val syncscope("singlethread") release 8832 ret i32 %ret 8833} 8834 8835define i32 @test533(ptr %ptr, i32 %val) { 8836; PPC64LE-LABEL: test533: 8837; PPC64LE: # %bb.0: 8838; PPC64LE-NEXT: lwsync 8839; PPC64LE-NEXT: .LBB533_1: 8840; PPC64LE-NEXT: lwarx 5, 0, 3 8841; PPC64LE-NEXT: cmplw 5, 4 8842; PPC64LE-NEXT: bgt 0, .LBB533_3 8843; PPC64LE-NEXT: # %bb.2: 8844; PPC64LE-NEXT: stwcx. 4, 0, 3 8845; PPC64LE-NEXT: bne 0, .LBB533_1 8846; PPC64LE-NEXT: .LBB533_3: 8847; PPC64LE-NEXT: lwsync 8848; PPC64LE-NEXT: mr 3, 5 8849; PPC64LE-NEXT: blr 8850 %ret = atomicrmw umax ptr %ptr, i32 %val syncscope("singlethread") acq_rel 8851 ret i32 %ret 8852} 8853 8854define i32 @test534(ptr %ptr, i32 %val) { 8855; PPC64LE-LABEL: test534: 8856; PPC64LE: # %bb.0: 8857; PPC64LE-NEXT: sync 8858; PPC64LE-NEXT: .LBB534_1: 8859; PPC64LE-NEXT: lwarx 5, 0, 3 8860; PPC64LE-NEXT: cmplw 5, 4 8861; PPC64LE-NEXT: bgt 0, .LBB534_3 8862; PPC64LE-NEXT: # %bb.2: 8863; PPC64LE-NEXT: stwcx. 4, 0, 3 8864; PPC64LE-NEXT: bne 0, .LBB534_1 8865; PPC64LE-NEXT: .LBB534_3: 8866; PPC64LE-NEXT: lwsync 8867; PPC64LE-NEXT: mr 3, 5 8868; PPC64LE-NEXT: blr 8869 %ret = atomicrmw umax ptr %ptr, i32 %val syncscope("singlethread") seq_cst 8870 ret i32 %ret 8871} 8872 8873define i64 @test535(ptr %ptr, i64 %val) { 8874; PPC64LE-LABEL: test535: 8875; PPC64LE: # %bb.0: 8876; PPC64LE-NEXT: .LBB535_1: 8877; PPC64LE-NEXT: ldarx 5, 0, 3 8878; PPC64LE-NEXT: cmpld 5, 4 8879; PPC64LE-NEXT: bgt 0, .LBB535_3 8880; PPC64LE-NEXT: # %bb.2: 8881; PPC64LE-NEXT: stdcx. 4, 0, 3 8882; PPC64LE-NEXT: bne 0, .LBB535_1 8883; PPC64LE-NEXT: .LBB535_3: 8884; PPC64LE-NEXT: mr 3, 5 8885; PPC64LE-NEXT: blr 8886 %ret = atomicrmw umax ptr %ptr, i64 %val syncscope("singlethread") monotonic 8887 ret i64 %ret 8888} 8889 8890define i64 @test536(ptr %ptr, i64 %val) { 8891; PPC64LE-LABEL: test536: 8892; PPC64LE: # %bb.0: 8893; PPC64LE-NEXT: mr 5, 3 8894; PPC64LE-NEXT: .LBB536_1: 8895; PPC64LE-NEXT: ldarx 3, 0, 5 8896; PPC64LE-NEXT: cmpld 3, 4 8897; PPC64LE-NEXT: bgt 0, .LBB536_3 8898; PPC64LE-NEXT: # %bb.2: 8899; PPC64LE-NEXT: stdcx. 4, 0, 5 8900; PPC64LE-NEXT: bne 0, .LBB536_1 8901; PPC64LE-NEXT: .LBB536_3: 8902; PPC64LE-NEXT: lwsync 8903; PPC64LE-NEXT: blr 8904 %ret = atomicrmw umax ptr %ptr, i64 %val syncscope("singlethread") acquire 8905 ret i64 %ret 8906} 8907 8908define i64 @test537(ptr %ptr, i64 %val) { 8909; PPC64LE-LABEL: test537: 8910; PPC64LE: # %bb.0: 8911; PPC64LE-NEXT: lwsync 8912; PPC64LE-NEXT: .LBB537_1: 8913; PPC64LE-NEXT: ldarx 5, 0, 3 8914; PPC64LE-NEXT: cmpld 5, 4 8915; PPC64LE-NEXT: bgt 0, .LBB537_3 8916; PPC64LE-NEXT: # %bb.2: 8917; PPC64LE-NEXT: stdcx. 4, 0, 3 8918; PPC64LE-NEXT: bne 0, .LBB537_1 8919; PPC64LE-NEXT: .LBB537_3: 8920; PPC64LE-NEXT: mr 3, 5 8921; PPC64LE-NEXT: blr 8922 %ret = atomicrmw umax ptr %ptr, i64 %val syncscope("singlethread") release 8923 ret i64 %ret 8924} 8925 8926define i64 @test538(ptr %ptr, i64 %val) { 8927; PPC64LE-LABEL: test538: 8928; PPC64LE: # %bb.0: 8929; PPC64LE-NEXT: lwsync 8930; PPC64LE-NEXT: .LBB538_1: 8931; PPC64LE-NEXT: ldarx 5, 0, 3 8932; PPC64LE-NEXT: cmpld 5, 4 8933; PPC64LE-NEXT: bgt 0, .LBB538_3 8934; PPC64LE-NEXT: # %bb.2: 8935; PPC64LE-NEXT: stdcx. 4, 0, 3 8936; PPC64LE-NEXT: bne 0, .LBB538_1 8937; PPC64LE-NEXT: .LBB538_3: 8938; PPC64LE-NEXT: lwsync 8939; PPC64LE-NEXT: mr 3, 5 8940; PPC64LE-NEXT: blr 8941 %ret = atomicrmw umax ptr %ptr, i64 %val syncscope("singlethread") acq_rel 8942 ret i64 %ret 8943} 8944 8945define i64 @test539(ptr %ptr, i64 %val) { 8946; PPC64LE-LABEL: test539: 8947; PPC64LE: # %bb.0: 8948; PPC64LE-NEXT: sync 8949; PPC64LE-NEXT: .LBB539_1: 8950; PPC64LE-NEXT: ldarx 5, 0, 3 8951; PPC64LE-NEXT: cmpld 5, 4 8952; PPC64LE-NEXT: bgt 0, .LBB539_3 8953; PPC64LE-NEXT: # %bb.2: 8954; PPC64LE-NEXT: stdcx. 4, 0, 3 8955; PPC64LE-NEXT: bne 0, .LBB539_1 8956; PPC64LE-NEXT: .LBB539_3: 8957; PPC64LE-NEXT: lwsync 8958; PPC64LE-NEXT: mr 3, 5 8959; PPC64LE-NEXT: blr 8960 %ret = atomicrmw umax ptr %ptr, i64 %val syncscope("singlethread") seq_cst 8961 ret i64 %ret 8962} 8963 8964define i8 @test540(ptr %ptr, i8 %val) { 8965; PPC64LE-LABEL: test540: 8966; PPC64LE: # %bb.0: 8967; PPC64LE-NEXT: .LBB540_1: 8968; PPC64LE-NEXT: lbarx 5, 0, 3 8969; PPC64LE-NEXT: cmplw 5, 4 8970; PPC64LE-NEXT: blt 0, .LBB540_3 8971; PPC64LE-NEXT: # %bb.2: 8972; PPC64LE-NEXT: stbcx. 4, 0, 3 8973; PPC64LE-NEXT: bne 0, .LBB540_1 8974; PPC64LE-NEXT: .LBB540_3: 8975; PPC64LE-NEXT: mr 3, 5 8976; PPC64LE-NEXT: blr 8977 %ret = atomicrmw umin ptr %ptr, i8 %val syncscope("singlethread") monotonic 8978 ret i8 %ret 8979} 8980 8981define i8 @test541(ptr %ptr, i8 %val) { 8982; PPC64LE-LABEL: test541: 8983; PPC64LE: # %bb.0: 8984; PPC64LE-NEXT: mr 5, 3 8985; PPC64LE-NEXT: .LBB541_1: 8986; PPC64LE-NEXT: lbarx 3, 0, 5 8987; PPC64LE-NEXT: cmplw 3, 4 8988; PPC64LE-NEXT: blt 0, .LBB541_3 8989; PPC64LE-NEXT: # %bb.2: 8990; PPC64LE-NEXT: stbcx. 4, 0, 5 8991; PPC64LE-NEXT: bne 0, .LBB541_1 8992; PPC64LE-NEXT: .LBB541_3: 8993; PPC64LE-NEXT: lwsync 8994; PPC64LE-NEXT: blr 8995 %ret = atomicrmw umin ptr %ptr, i8 %val syncscope("singlethread") acquire 8996 ret i8 %ret 8997} 8998 8999define i8 @test542(ptr %ptr, i8 %val) { 9000; PPC64LE-LABEL: test542: 9001; PPC64LE: # %bb.0: 9002; PPC64LE-NEXT: lwsync 9003; PPC64LE-NEXT: .LBB542_1: 9004; PPC64LE-NEXT: lbarx 5, 0, 3 9005; PPC64LE-NEXT: cmplw 5, 4 9006; PPC64LE-NEXT: blt 0, .LBB542_3 9007; PPC64LE-NEXT: # %bb.2: 9008; PPC64LE-NEXT: stbcx. 4, 0, 3 9009; PPC64LE-NEXT: bne 0, .LBB542_1 9010; PPC64LE-NEXT: .LBB542_3: 9011; PPC64LE-NEXT: mr 3, 5 9012; PPC64LE-NEXT: blr 9013 %ret = atomicrmw umin ptr %ptr, i8 %val syncscope("singlethread") release 9014 ret i8 %ret 9015} 9016 9017define i8 @test543(ptr %ptr, i8 %val) { 9018; PPC64LE-LABEL: test543: 9019; PPC64LE: # %bb.0: 9020; PPC64LE-NEXT: lwsync 9021; PPC64LE-NEXT: .LBB543_1: 9022; PPC64LE-NEXT: lbarx 5, 0, 3 9023; PPC64LE-NEXT: cmplw 5, 4 9024; PPC64LE-NEXT: blt 0, .LBB543_3 9025; PPC64LE-NEXT: # %bb.2: 9026; PPC64LE-NEXT: stbcx. 4, 0, 3 9027; PPC64LE-NEXT: bne 0, .LBB543_1 9028; PPC64LE-NEXT: .LBB543_3: 9029; PPC64LE-NEXT: lwsync 9030; PPC64LE-NEXT: mr 3, 5 9031; PPC64LE-NEXT: blr 9032 %ret = atomicrmw umin ptr %ptr, i8 %val syncscope("singlethread") acq_rel 9033 ret i8 %ret 9034} 9035 9036define i8 @test544(ptr %ptr, i8 %val) { 9037; PPC64LE-LABEL: test544: 9038; PPC64LE: # %bb.0: 9039; PPC64LE-NEXT: sync 9040; PPC64LE-NEXT: .LBB544_1: 9041; PPC64LE-NEXT: lbarx 5, 0, 3 9042; PPC64LE-NEXT: cmplw 5, 4 9043; PPC64LE-NEXT: blt 0, .LBB544_3 9044; PPC64LE-NEXT: # %bb.2: 9045; PPC64LE-NEXT: stbcx. 4, 0, 3 9046; PPC64LE-NEXT: bne 0, .LBB544_1 9047; PPC64LE-NEXT: .LBB544_3: 9048; PPC64LE-NEXT: lwsync 9049; PPC64LE-NEXT: mr 3, 5 9050; PPC64LE-NEXT: blr 9051 %ret = atomicrmw umin ptr %ptr, i8 %val syncscope("singlethread") seq_cst 9052 ret i8 %ret 9053} 9054 9055define i16 @test545(ptr %ptr, i16 %val) { 9056; PPC64LE-LABEL: test545: 9057; PPC64LE: # %bb.0: 9058; PPC64LE-NEXT: .LBB545_1: 9059; PPC64LE-NEXT: lharx 5, 0, 3 9060; PPC64LE-NEXT: cmplw 5, 4 9061; PPC64LE-NEXT: blt 0, .LBB545_3 9062; PPC64LE-NEXT: # %bb.2: 9063; PPC64LE-NEXT: sthcx. 4, 0, 3 9064; PPC64LE-NEXT: bne 0, .LBB545_1 9065; PPC64LE-NEXT: .LBB545_3: 9066; PPC64LE-NEXT: mr 3, 5 9067; PPC64LE-NEXT: blr 9068 %ret = atomicrmw umin ptr %ptr, i16 %val syncscope("singlethread") monotonic 9069 ret i16 %ret 9070} 9071 9072define i16 @test546(ptr %ptr, i16 %val) { 9073; PPC64LE-LABEL: test546: 9074; PPC64LE: # %bb.0: 9075; PPC64LE-NEXT: mr 5, 3 9076; PPC64LE-NEXT: .LBB546_1: 9077; PPC64LE-NEXT: lharx 3, 0, 5 9078; PPC64LE-NEXT: cmplw 3, 4 9079; PPC64LE-NEXT: blt 0, .LBB546_3 9080; PPC64LE-NEXT: # %bb.2: 9081; PPC64LE-NEXT: sthcx. 4, 0, 5 9082; PPC64LE-NEXT: bne 0, .LBB546_1 9083; PPC64LE-NEXT: .LBB546_3: 9084; PPC64LE-NEXT: lwsync 9085; PPC64LE-NEXT: blr 9086 %ret = atomicrmw umin ptr %ptr, i16 %val syncscope("singlethread") acquire 9087 ret i16 %ret 9088} 9089 9090define i16 @test547(ptr %ptr, i16 %val) { 9091; PPC64LE-LABEL: test547: 9092; PPC64LE: # %bb.0: 9093; PPC64LE-NEXT: lwsync 9094; PPC64LE-NEXT: .LBB547_1: 9095; PPC64LE-NEXT: lharx 5, 0, 3 9096; PPC64LE-NEXT: cmplw 5, 4 9097; PPC64LE-NEXT: blt 0, .LBB547_3 9098; PPC64LE-NEXT: # %bb.2: 9099; PPC64LE-NEXT: sthcx. 4, 0, 3 9100; PPC64LE-NEXT: bne 0, .LBB547_1 9101; PPC64LE-NEXT: .LBB547_3: 9102; PPC64LE-NEXT: mr 3, 5 9103; PPC64LE-NEXT: blr 9104 %ret = atomicrmw umin ptr %ptr, i16 %val syncscope("singlethread") release 9105 ret i16 %ret 9106} 9107 9108define i16 @test548(ptr %ptr, i16 %val) { 9109; PPC64LE-LABEL: test548: 9110; PPC64LE: # %bb.0: 9111; PPC64LE-NEXT: lwsync 9112; PPC64LE-NEXT: .LBB548_1: 9113; PPC64LE-NEXT: lharx 5, 0, 3 9114; PPC64LE-NEXT: cmplw 5, 4 9115; PPC64LE-NEXT: blt 0, .LBB548_3 9116; PPC64LE-NEXT: # %bb.2: 9117; PPC64LE-NEXT: sthcx. 4, 0, 3 9118; PPC64LE-NEXT: bne 0, .LBB548_1 9119; PPC64LE-NEXT: .LBB548_3: 9120; PPC64LE-NEXT: lwsync 9121; PPC64LE-NEXT: mr 3, 5 9122; PPC64LE-NEXT: blr 9123 %ret = atomicrmw umin ptr %ptr, i16 %val syncscope("singlethread") acq_rel 9124 ret i16 %ret 9125} 9126 9127define i16 @test549(ptr %ptr, i16 %val) { 9128; PPC64LE-LABEL: test549: 9129; PPC64LE: # %bb.0: 9130; PPC64LE-NEXT: sync 9131; PPC64LE-NEXT: .LBB549_1: 9132; PPC64LE-NEXT: lharx 5, 0, 3 9133; PPC64LE-NEXT: cmplw 5, 4 9134; PPC64LE-NEXT: blt 0, .LBB549_3 9135; PPC64LE-NEXT: # %bb.2: 9136; PPC64LE-NEXT: sthcx. 4, 0, 3 9137; PPC64LE-NEXT: bne 0, .LBB549_1 9138; PPC64LE-NEXT: .LBB549_3: 9139; PPC64LE-NEXT: lwsync 9140; PPC64LE-NEXT: mr 3, 5 9141; PPC64LE-NEXT: blr 9142 %ret = atomicrmw umin ptr %ptr, i16 %val syncscope("singlethread") seq_cst 9143 ret i16 %ret 9144} 9145 9146define i32 @test550(ptr %ptr, i32 %val) { 9147; PPC64LE-LABEL: test550: 9148; PPC64LE: # %bb.0: 9149; PPC64LE-NEXT: .LBB550_1: 9150; PPC64LE-NEXT: lwarx 5, 0, 3 9151; PPC64LE-NEXT: cmplw 5, 4 9152; PPC64LE-NEXT: blt 0, .LBB550_3 9153; PPC64LE-NEXT: # %bb.2: 9154; PPC64LE-NEXT: stwcx. 4, 0, 3 9155; PPC64LE-NEXT: bne 0, .LBB550_1 9156; PPC64LE-NEXT: .LBB550_3: 9157; PPC64LE-NEXT: mr 3, 5 9158; PPC64LE-NEXT: blr 9159 %ret = atomicrmw umin ptr %ptr, i32 %val syncscope("singlethread") monotonic 9160 ret i32 %ret 9161} 9162 9163define i32 @test551(ptr %ptr, i32 %val) { 9164; PPC64LE-LABEL: test551: 9165; PPC64LE: # %bb.0: 9166; PPC64LE-NEXT: mr 5, 3 9167; PPC64LE-NEXT: .LBB551_1: 9168; PPC64LE-NEXT: lwarx 3, 0, 5 9169; PPC64LE-NEXT: cmplw 3, 4 9170; PPC64LE-NEXT: blt 0, .LBB551_3 9171; PPC64LE-NEXT: # %bb.2: 9172; PPC64LE-NEXT: stwcx. 4, 0, 5 9173; PPC64LE-NEXT: bne 0, .LBB551_1 9174; PPC64LE-NEXT: .LBB551_3: 9175; PPC64LE-NEXT: lwsync 9176; PPC64LE-NEXT: blr 9177 %ret = atomicrmw umin ptr %ptr, i32 %val syncscope("singlethread") acquire 9178 ret i32 %ret 9179} 9180 9181define i32 @test552(ptr %ptr, i32 %val) { 9182; PPC64LE-LABEL: test552: 9183; PPC64LE: # %bb.0: 9184; PPC64LE-NEXT: lwsync 9185; PPC64LE-NEXT: .LBB552_1: 9186; PPC64LE-NEXT: lwarx 5, 0, 3 9187; PPC64LE-NEXT: cmplw 5, 4 9188; PPC64LE-NEXT: blt 0, .LBB552_3 9189; PPC64LE-NEXT: # %bb.2: 9190; PPC64LE-NEXT: stwcx. 4, 0, 3 9191; PPC64LE-NEXT: bne 0, .LBB552_1 9192; PPC64LE-NEXT: .LBB552_3: 9193; PPC64LE-NEXT: mr 3, 5 9194; PPC64LE-NEXT: blr 9195 %ret = atomicrmw umin ptr %ptr, i32 %val syncscope("singlethread") release 9196 ret i32 %ret 9197} 9198 9199define i32 @test553(ptr %ptr, i32 %val) { 9200; PPC64LE-LABEL: test553: 9201; PPC64LE: # %bb.0: 9202; PPC64LE-NEXT: lwsync 9203; PPC64LE-NEXT: .LBB553_1: 9204; PPC64LE-NEXT: lwarx 5, 0, 3 9205; PPC64LE-NEXT: cmplw 5, 4 9206; PPC64LE-NEXT: blt 0, .LBB553_3 9207; PPC64LE-NEXT: # %bb.2: 9208; PPC64LE-NEXT: stwcx. 4, 0, 3 9209; PPC64LE-NEXT: bne 0, .LBB553_1 9210; PPC64LE-NEXT: .LBB553_3: 9211; PPC64LE-NEXT: lwsync 9212; PPC64LE-NEXT: mr 3, 5 9213; PPC64LE-NEXT: blr 9214 %ret = atomicrmw umin ptr %ptr, i32 %val syncscope("singlethread") acq_rel 9215 ret i32 %ret 9216} 9217 9218define i32 @test554(ptr %ptr, i32 %val) { 9219; PPC64LE-LABEL: test554: 9220; PPC64LE: # %bb.0: 9221; PPC64LE-NEXT: sync 9222; PPC64LE-NEXT: .LBB554_1: 9223; PPC64LE-NEXT: lwarx 5, 0, 3 9224; PPC64LE-NEXT: cmplw 5, 4 9225; PPC64LE-NEXT: blt 0, .LBB554_3 9226; PPC64LE-NEXT: # %bb.2: 9227; PPC64LE-NEXT: stwcx. 4, 0, 3 9228; PPC64LE-NEXT: bne 0, .LBB554_1 9229; PPC64LE-NEXT: .LBB554_3: 9230; PPC64LE-NEXT: lwsync 9231; PPC64LE-NEXT: mr 3, 5 9232; PPC64LE-NEXT: blr 9233 %ret = atomicrmw umin ptr %ptr, i32 %val syncscope("singlethread") seq_cst 9234 ret i32 %ret 9235} 9236 9237define i64 @test555(ptr %ptr, i64 %val) { 9238; PPC64LE-LABEL: test555: 9239; PPC64LE: # %bb.0: 9240; PPC64LE-NEXT: .LBB555_1: 9241; PPC64LE-NEXT: ldarx 5, 0, 3 9242; PPC64LE-NEXT: cmpld 5, 4 9243; PPC64LE-NEXT: blt 0, .LBB555_3 9244; PPC64LE-NEXT: # %bb.2: 9245; PPC64LE-NEXT: stdcx. 4, 0, 3 9246; PPC64LE-NEXT: bne 0, .LBB555_1 9247; PPC64LE-NEXT: .LBB555_3: 9248; PPC64LE-NEXT: mr 3, 5 9249; PPC64LE-NEXT: blr 9250 %ret = atomicrmw umin ptr %ptr, i64 %val syncscope("singlethread") monotonic 9251 ret i64 %ret 9252} 9253 9254define i64 @test556(ptr %ptr, i64 %val) { 9255; PPC64LE-LABEL: test556: 9256; PPC64LE: # %bb.0: 9257; PPC64LE-NEXT: mr 5, 3 9258; PPC64LE-NEXT: .LBB556_1: 9259; PPC64LE-NEXT: ldarx 3, 0, 5 9260; PPC64LE-NEXT: cmpld 3, 4 9261; PPC64LE-NEXT: blt 0, .LBB556_3 9262; PPC64LE-NEXT: # %bb.2: 9263; PPC64LE-NEXT: stdcx. 4, 0, 5 9264; PPC64LE-NEXT: bne 0, .LBB556_1 9265; PPC64LE-NEXT: .LBB556_3: 9266; PPC64LE-NEXT: lwsync 9267; PPC64LE-NEXT: blr 9268 %ret = atomicrmw umin ptr %ptr, i64 %val syncscope("singlethread") acquire 9269 ret i64 %ret 9270} 9271 9272define i64 @test557(ptr %ptr, i64 %val) { 9273; PPC64LE-LABEL: test557: 9274; PPC64LE: # %bb.0: 9275; PPC64LE-NEXT: lwsync 9276; PPC64LE-NEXT: .LBB557_1: 9277; PPC64LE-NEXT: ldarx 5, 0, 3 9278; PPC64LE-NEXT: cmpld 5, 4 9279; PPC64LE-NEXT: blt 0, .LBB557_3 9280; PPC64LE-NEXT: # %bb.2: 9281; PPC64LE-NEXT: stdcx. 4, 0, 3 9282; PPC64LE-NEXT: bne 0, .LBB557_1 9283; PPC64LE-NEXT: .LBB557_3: 9284; PPC64LE-NEXT: mr 3, 5 9285; PPC64LE-NEXT: blr 9286 %ret = atomicrmw umin ptr %ptr, i64 %val syncscope("singlethread") release 9287 ret i64 %ret 9288} 9289 9290define i64 @test558(ptr %ptr, i64 %val) { 9291; PPC64LE-LABEL: test558: 9292; PPC64LE: # %bb.0: 9293; PPC64LE-NEXT: lwsync 9294; PPC64LE-NEXT: .LBB558_1: 9295; PPC64LE-NEXT: ldarx 5, 0, 3 9296; PPC64LE-NEXT: cmpld 5, 4 9297; PPC64LE-NEXT: blt 0, .LBB558_3 9298; PPC64LE-NEXT: # %bb.2: 9299; PPC64LE-NEXT: stdcx. 4, 0, 3 9300; PPC64LE-NEXT: bne 0, .LBB558_1 9301; PPC64LE-NEXT: .LBB558_3: 9302; PPC64LE-NEXT: lwsync 9303; PPC64LE-NEXT: mr 3, 5 9304; PPC64LE-NEXT: blr 9305 %ret = atomicrmw umin ptr %ptr, i64 %val syncscope("singlethread") acq_rel 9306 ret i64 %ret 9307} 9308 9309define i64 @test559(ptr %ptr, i64 %val) { 9310; PPC64LE-LABEL: test559: 9311; PPC64LE: # %bb.0: 9312; PPC64LE-NEXT: sync 9313; PPC64LE-NEXT: .LBB559_1: 9314; PPC64LE-NEXT: ldarx 5, 0, 3 9315; PPC64LE-NEXT: cmpld 5, 4 9316; PPC64LE-NEXT: blt 0, .LBB559_3 9317; PPC64LE-NEXT: # %bb.2: 9318; PPC64LE-NEXT: stdcx. 4, 0, 3 9319; PPC64LE-NEXT: bne 0, .LBB559_1 9320; PPC64LE-NEXT: .LBB559_3: 9321; PPC64LE-NEXT: lwsync 9322; PPC64LE-NEXT: mr 3, 5 9323; PPC64LE-NEXT: blr 9324 %ret = atomicrmw umin ptr %ptr, i64 %val syncscope("singlethread") seq_cst 9325 ret i64 %ret 9326} 9327 9328; The second load should never be scheduled before isync. 9329define i32 @test_ordering0(ptr %ptr1, ptr %ptr2) { 9330; PPC64LE-LABEL: test_ordering0: 9331; PPC64LE: # %bb.0: 9332; PPC64LE-NEXT: lwz 4, 0(3) 9333; PPC64LE-NEXT: cmpd 7, 4, 4 9334; PPC64LE-NEXT: bne- 7, .+4 9335; PPC64LE-NEXT: isync 9336; PPC64LE-NEXT: lwz 3, 0(3) 9337; PPC64LE-NEXT: add 3, 4, 3 9338; PPC64LE-NEXT: blr 9339 %val1 = load atomic i32, ptr %ptr1 acquire, align 4 9340 %val2 = load i32, ptr %ptr1 9341 %add = add i32 %val1, %val2 9342 ret i32 %add 9343} 9344 9345; The second store should never be scheduled before isync. 9346define i32 @test_ordering1(ptr %ptr1, i32 %val1, ptr %ptr2) { 9347; PPC64LE-LABEL: test_ordering1: 9348; PPC64LE: # %bb.0: 9349; PPC64LE-NEXT: lwz 3, 0(3) 9350; PPC64LE-NEXT: cmpd 7, 3, 3 9351; PPC64LE-NEXT: bne- 7, .+4 9352; PPC64LE-NEXT: isync 9353; PPC64LE-NEXT: stw 4, 0(5) 9354; PPC64LE-NEXT: blr 9355 %val2 = load atomic i32, ptr %ptr1 acquire, align 4 9356 store i32 %val1, ptr %ptr2 9357 ret i32 %val2 9358} 9359