xref: /llvm-project/llvm/test/CodeGen/PowerPC/atomic-float.ll (revision a51712751c184ebe056718c938d2526693a31564)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mcpu=ppc -mtriple=powerpc64-unknown-unknown \
3; RUN:   < %s | FileCheck --check-prefix=CHECK-64 %s
4; RUN: llc -verify-machineinstrs -mcpu=ppc -mtriple=powerpc-unknown-unknown \
5; RUN:   < %s | FileCheck --check-prefix=CHECK-32 %s
6
7define float @test_add(ptr %ptr, float %incr) {
8; CHECK-64-LABEL: test_add:
9; CHECK-64:       # %bb.0: # %entry
10; CHECK-64-NEXT:    sync
11; CHECK-64-NEXT:    lfs 0, 0(3)
12; CHECK-64-NEXT:    b .LBB0_2
13; CHECK-64-NEXT:  .LBB0_1: # %atomicrmw.start
14; CHECK-64-NEXT:    #
15; CHECK-64-NEXT:    stw 6, -4(1)
16; CHECK-64-NEXT:    cmplw 6, 4
17; CHECK-64-NEXT:    lfs 0, -4(1)
18; CHECK-64-NEXT:    beq 0, .LBB0_5
19; CHECK-64-NEXT:  .LBB0_2: # %atomicrmw.start
20; CHECK-64-NEXT:    # =>This Loop Header: Depth=1
21; CHECK-64-NEXT:    # Child Loop BB0_3 Depth 2
22; CHECK-64-NEXT:    fadds 2, 0, 1
23; CHECK-64-NEXT:    stfs 2, -8(1)
24; CHECK-64-NEXT:    stfs 0, -12(1)
25; CHECK-64-NEXT:    lwz 5, -8(1)
26; CHECK-64-NEXT:    lwz 4, -12(1)
27; CHECK-64-NEXT:  .LBB0_3: # %atomicrmw.start
28; CHECK-64-NEXT:    # Parent Loop BB0_2 Depth=1
29; CHECK-64-NEXT:    # => This Inner Loop Header: Depth=2
30; CHECK-64-NEXT:    lwarx 6, 0, 3
31; CHECK-64-NEXT:    cmpw 6, 4
32; CHECK-64-NEXT:    bne 0, .LBB0_1
33; CHECK-64-NEXT:  # %bb.4: # %atomicrmw.start
34; CHECK-64-NEXT:    #
35; CHECK-64-NEXT:    stwcx. 5, 0, 3
36; CHECK-64-NEXT:    bne 0, .LBB0_3
37; CHECK-64-NEXT:    b .LBB0_1
38; CHECK-64-NEXT:  .LBB0_5: # %atomicrmw.end
39; CHECK-64-NEXT:    fmr 1, 0
40; CHECK-64-NEXT:    lwsync
41; CHECK-64-NEXT:    blr
42;
43; CHECK-32-LABEL: test_add:
44; CHECK-32:       # %bb.0: # %entry
45; CHECK-32-NEXT:    stwu 1, -32(1)
46; CHECK-32-NEXT:    .cfi_def_cfa_offset 32
47; CHECK-32-NEXT:    sync
48; CHECK-32-NEXT:    lfs 0, 0(3)
49; CHECK-32-NEXT:    b .LBB0_2
50; CHECK-32-NEXT:  .LBB0_1: # %atomicrmw.start
51; CHECK-32-NEXT:    #
52; CHECK-32-NEXT:    stw 6, 28(1)
53; CHECK-32-NEXT:    cmplw 6, 4
54; CHECK-32-NEXT:    lfs 0, 28(1)
55; CHECK-32-NEXT:    beq 0, .LBB0_5
56; CHECK-32-NEXT:  .LBB0_2: # %atomicrmw.start
57; CHECK-32-NEXT:    # =>This Loop Header: Depth=1
58; CHECK-32-NEXT:    # Child Loop BB0_3 Depth 2
59; CHECK-32-NEXT:    fadds 2, 0, 1
60; CHECK-32-NEXT:    stfs 2, 24(1)
61; CHECK-32-NEXT:    stfs 0, 20(1)
62; CHECK-32-NEXT:    lwz 5, 24(1)
63; CHECK-32-NEXT:    lwz 4, 20(1)
64; CHECK-32-NEXT:  .LBB0_3: # %atomicrmw.start
65; CHECK-32-NEXT:    # Parent Loop BB0_2 Depth=1
66; CHECK-32-NEXT:    # => This Inner Loop Header: Depth=2
67; CHECK-32-NEXT:    lwarx 6, 0, 3
68; CHECK-32-NEXT:    cmpw 6, 4
69; CHECK-32-NEXT:    bne 0, .LBB0_1
70; CHECK-32-NEXT:  # %bb.4: # %atomicrmw.start
71; CHECK-32-NEXT:    #
72; CHECK-32-NEXT:    stwcx. 5, 0, 3
73; CHECK-32-NEXT:    bne 0, .LBB0_3
74; CHECK-32-NEXT:    b .LBB0_1
75; CHECK-32-NEXT:  .LBB0_5: # %atomicrmw.end
76; CHECK-32-NEXT:    fmr 1, 0
77; CHECK-32-NEXT:    lwsync
78; CHECK-32-NEXT:    addi 1, 1, 32
79; CHECK-32-NEXT:    blr
80entry:
81  %r = atomicrmw fadd ptr %ptr, float %incr seq_cst
82  ret float %r
83}
84