xref: /llvm-project/llvm/test/CodeGen/PowerPC/arg_promotion.ll (revision 8b56da5e9f3ba737a5ff4bf5dee654416849042f)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -passes=argpromotion -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
3
4; Test to check that we do not promote arguments when the
5; type size is greater than 128 bits.
6
7define internal fastcc void @print_acc(ptr nocapture readonly %a) nounwind {
8; CHECK-LABEL: @print_acc(
9; CHECK-NEXT:  entry:
10; CHECK-NEXT:    [[TMP0:%.*]] = load <512 x i1>, ptr [[A:%.*]], align 64
11; CHECK-NEXT:    [[TMP1:%.*]] = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1> [[TMP0]])
12; CHECK-NEXT:    [[TMP2:%.*]] = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[TMP1]], 0
13; CHECK-NEXT:    ret void
14;
15entry:
16  %0 = load <512 x i1>, ptr %a, align 64
17  %1 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1> %0)
18  %2 = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %1, 0
19  ret void
20}
21
22declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1>) nounwind
23
24define dso_local void @test(ptr nocapture %a, <16 x i8> %ac) {
25; CHECK-LABEL: @test(
26; CHECK-NEXT:  entry:
27; CHECK-NEXT:    [[TMP0:%.*]] = tail call <512 x i1> @llvm.ppc.mma.xvf32ger(<16 x i8> [[AC:%.*]], <16 x i8> [[AC]])
28; CHECK-NEXT:    store <512 x i1> [[TMP0]], ptr [[A:%.*]], align 64
29; CHECK-NEXT:    tail call fastcc void @print_acc(ptr nonnull [[A]])
30; CHECK-NEXT:    ret void
31;
32entry:
33  %0 = tail call <512 x i1> @llvm.ppc.mma.xvf32ger(<16 x i8> %ac, <16 x i8> %ac)
34  store <512 x i1> %0, ptr %a, align 64
35  tail call fastcc void @print_acc(ptr nonnull %a)
36  ret void
37}
38
39declare <512 x i1> @llvm.ppc.mma.xvf32ger(<16 x i8>, <16 x i8>) nounwind
40
41@.str = private unnamed_addr constant [11 x i8] c"Vector: { \00", align 1
42@.str.1 = private unnamed_addr constant [5 x i8] c"%d, \00", align 1
43@.str.2 = private unnamed_addr constant [6 x i8] c"%d }\0A\00", align 1
44
45define internal fastcc void @printWideVec(<16 x i32> %ptr.val) nounwind {
46; CHECK-LABEL: @printWideVec(
47; CHECK-NEXT:  entry:
48; CHECK-NEXT:    [[CALL:%.*]] = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str)
49; CHECK-NEXT:    [[VECEXT:%.*]] = extractelement <16 x i32> [[PTR_VAL:%.*]], i32 0
50; CHECK-NEXT:    [[CALL1:%.*]] = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.1, i32 signext [[VECEXT]])
51; CHECK-NEXT:    [[VECEXT_1:%.*]] = extractelement <16 x i32> [[PTR_VAL]], i32 1
52; CHECK-NEXT:    [[CALL1_1:%.*]] = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.1, i32 signext [[VECEXT_1]])
53; CHECK-NEXT:    [[VECEXT_2:%.*]] = extractelement <16 x i32> [[PTR_VAL]], i32 2
54; CHECK-NEXT:    [[CALL1_2:%.*]] = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.1, i32 signext [[VECEXT_2]])
55; CHECK-NEXT:    [[VECEXT_3:%.*]] = extractelement <16 x i32> [[PTR_VAL]], i32 3
56; CHECK-NEXT:    [[CALL1_3:%.*]] = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.1, i32 signext [[VECEXT_3]])
57; CHECK-NEXT:    [[VECEXT_4:%.*]] = extractelement <16 x i32> [[PTR_VAL]], i32 4
58; CHECK-NEXT:    [[CALL1_4:%.*]] = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.1, i32 signext [[VECEXT_4]])
59; CHECK-NEXT:    [[VECEXT_5:%.*]] = extractelement <16 x i32> [[PTR_VAL]], i32 5
60; CHECK-NEXT:    [[CALL1_5:%.*]] = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.1, i32 signext [[VECEXT_5]])
61; CHECK-NEXT:    [[VECEXT_6:%.*]] = extractelement <16 x i32> [[PTR_VAL]], i32 6
62; CHECK-NEXT:    [[CALL1_6:%.*]] = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.1, i32 signext [[VECEXT_6]])
63; CHECK-NEXT:    [[VECEXT2:%.*]] = extractelement <16 x i32> [[PTR_VAL]], i32 7
64; CHECK-NEXT:    [[CALL3:%.*]] = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.2, i32 signext [[VECEXT2]])
65; CHECK-NEXT:    ret void
66;
67entry:
68  %call = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str)
69  %vecext = extractelement <16 x i32> %ptr.val, i32 0
70  %call1 = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.1, i32 signext %vecext)
71  %vecext.1 = extractelement <16 x i32> %ptr.val, i32 1
72  %call1.1 = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.1, i32 signext %vecext.1)
73  %vecext.2 = extractelement <16 x i32> %ptr.val, i32 2
74  %call1.2 = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.1, i32 signext %vecext.2)
75  %vecext.3 = extractelement <16 x i32> %ptr.val, i32 3
76  %call1.3 = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.1, i32 signext %vecext.3)
77  %vecext.4 = extractelement <16 x i32> %ptr.val, i32 4
78  %call1.4 = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.1, i32 signext %vecext.4)
79  %vecext.5 = extractelement <16 x i32> %ptr.val, i32 5
80  %call1.5 = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.1, i32 signext %vecext.5)
81  %vecext.6 = extractelement <16 x i32> %ptr.val, i32 6
82  %call1.6 = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.1, i32 signext %vecext.6)
83  %vecext2 = extractelement <16 x i32> %ptr.val, i32 7
84  %call3 = tail call signext i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.2, i32 signext %vecext2)
85  ret void
86}
87
88declare noundef signext i32 @printf(ptr nocapture noundef readonly, ...) nounwind
89
90define dso_local void @test1(<4 x i32> %a, <4 x i32> %b) nounwind {
91; CHECK-LABEL: @test1(
92; CHECK-NEXT:  entry:
93; CHECK-NEXT:    [[TMP0:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
94; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x i32> [[B:%.*]], <4 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
95; CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
96; CHECK-NEXT:    [[VECINIT22:%.*]] = shufflevector <16 x i32> [[TMP2]], <16 x i32> [[TMP1]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
97; CHECK-NEXT:    tail call fastcc void @printWideVec(<16 x i32> [[VECINIT22]])
98; CHECK-NEXT:    ret void
99;
100entry:
101  %0 = shufflevector <4 x i32> %a, <4 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
102  %1 = shufflevector <4 x i32> %b, <4 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
103  %2 = shufflevector <16 x i32> %0, <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
104  %vecinit22 = shufflevector <16 x i32> %2, <16 x i32> %1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
105  tail call fastcc void @printWideVec(<16 x i32> %vecinit22)
106  ret void
107}
108