1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec \ 3; RUN: -vec-extabi -mtriple powerpc-ibm-aix-xcoff < %s | \ 4; RUN: FileCheck %s --check-prefixes=32BIT,LITERAL 5 6; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=+altivec \ 7; RUN: -vec-extabi -mtriple powerpc64-ibm-aix-xcoff < %s | \ 8; RUN: FileCheck %s --check-prefixes=64BIT,LITERAL 9 10define dso_local i32 @vec_caller() { 11; LITERAL: L..CPI0_0: 12; LITERAL-NEXT: .vbyte 4, 53 13; LITERAL-NEXT: .vbyte 4, 54 14; LITERAL-NEXT: .vbyte 4, 55 15; LITERAL-NEXT: .vbyte 4, 56 16; LITERAL-NEXT: L..CPI0_1: 17; LITERAL-NEXT: .vbyte 4, 49 18; LITERAL-NEXT: .vbyte 4, 50 19; LITERAL-NEXT: .vbyte 4, 51 20; LITERAL-NEXT: .vbyte 4, 52 21 22; 32BIT-LABEL: vec_caller: 23; 32BIT: # %bb.0: # %entry 24; 32BIT-NEXT: mflr 0 25; 32BIT-NEXT: stwu 1, -64(1) 26; 32BIT-NEXT: lwz 3, L..C0(2) # %const.0 27; 32BIT-NEXT: stw 0, 72(1) 28; 32BIT-NEXT: xxlxor 34, 34, 34 29; 32BIT-NEXT: xxlxor 35, 35, 35 30; 32BIT-NEXT: lxvw4x 0, 0, 3 31; 32BIT-NEXT: lwz 3, L..C1(2) # %const.1 32; 32BIT-NEXT: xxlxor 36, 36, 36 33; 32BIT-NEXT: xxlxor 37, 37, 37 34; 32BIT-NEXT: lxvw4x 1, 0, 3 35; 32BIT-NEXT: li 3, 48 36; 32BIT-NEXT: xxlxor 38, 38, 38 37; 32BIT-NEXT: xxlxor 39, 39, 39 38; 32BIT-NEXT: xxlxor 40, 40, 40 39; 32BIT-NEXT: stxvw4x 0, 1, 3 40; 32BIT-NEXT: li 3, 32 41; 32BIT-NEXT: xxlxor 41, 41, 41 42; 32BIT-NEXT: xxlxor 42, 42, 42 43; 32BIT-NEXT: stxvw4x 1, 1, 3 44; 32BIT-NEXT: xxlxor 43, 43, 43 45; 32BIT-NEXT: xxlxor 44, 44, 44 46; 32BIT-NEXT: xxlxor 45, 45, 45 47; 32BIT-NEXT: bl .vec_callee_stack[PR] 48; 32BIT-NEXT: nop 49; 32BIT-NEXT: addi 1, 1, 64 50; 32BIT-NEXT: lwz 0, 8(1) 51; 32BIT-NEXT: mtlr 0 52; 32BIT-NEXT: blr 53; 54; 64BIT-LABEL: vec_caller: 55; 64BIT: # %bb.0: # %entry 56; 64BIT-NEXT: mflr 0 57; 64BIT-NEXT: stdu 1, -112(1) 58; 64BIT-NEXT: ld 3, L..C0(2) # %const.0 59; 64BIT-NEXT: std 0, 128(1) 60; 64BIT-NEXT: xxlxor 34, 34, 34 61; 64BIT-NEXT: xxlxor 35, 35, 35 62; 64BIT-NEXT: lxvw4x 0, 0, 3 63; 64BIT-NEXT: ld 3, L..C1(2) # %const.1 64; 64BIT-NEXT: xxlxor 36, 36, 36 65; 64BIT-NEXT: xxlxor 37, 37, 37 66; 64BIT-NEXT: lxvw4x 1, 0, 3 67; 64BIT-NEXT: li 3, 64 68; 64BIT-NEXT: xxlxor 38, 38, 38 69; 64BIT-NEXT: xxlxor 39, 39, 39 70; 64BIT-NEXT: xxlxor 40, 40, 40 71; 64BIT-NEXT: stxvw4x 0, 1, 3 72; 64BIT-NEXT: li 3, 48 73; 64BIT-NEXT: xxlxor 41, 41, 41 74; 64BIT-NEXT: xxlxor 42, 42, 42 75; 64BIT-NEXT: stxvw4x 1, 1, 3 76; 64BIT-NEXT: xxlxor 43, 43, 43 77; 64BIT-NEXT: xxlxor 44, 44, 44 78; 64BIT-NEXT: xxlxor 45, 45, 45 79; 64BIT-NEXT: bl .vec_callee_stack[PR] 80; 64BIT-NEXT: nop 81; 64BIT-NEXT: addi 1, 1, 112 82; 64BIT-NEXT: ld 0, 16(1) 83; 64BIT-NEXT: mtlr 0 84; 64BIT-NEXT: blr 85 86; LITERAL: .toc 87; LITERAL: L..C0: 88; LITERAL-NEXT: .tc L..CPI0_0[TC],L..CPI0_0 89; LITERAL-NEXT: L..C1: 90; LITERAL-NEXT: .tc L..CPI0_1[TC],L..CPI0_1 91 92entry: 93 %call = call i32 @vec_callee_stack(<4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 49, i32 50, i32 51, i32 52>, <4 x i32> <i32 53, i32 54, i32 55, i32 56>) 94 ret i32 %call 95} 96 97declare i32 @vec_callee_stack(...) 98