1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -O0 < %s | FileCheck %s 3target datalayout = "e-m:e-i64:64-n32:64" 4target triple = "powerpc64le-unknown-linux-gnu" 5 6define void @bn_mul_comba8(ptr nocapture %r, ptr nocapture readonly %a, ptr nocapture readonly %b) { 7; CHECK-LABEL: bn_mul_comba8: 8; CHECK: # %bb.0: 9; CHECK-NEXT: std 4, -8(1) # 8-byte Folded Spill 10; CHECK-NEXT: mr 4, 3 11; CHECK-NEXT: ld 3, -8(1) # 8-byte Folded Reload 12; CHECK-NEXT: ld 9, 0(3) 13; CHECK-NEXT: ld 8, 0(5) 14; CHECK-NEXT: mulhdu 7, 8, 9 15; CHECK-NEXT: ld 3, 8(3) 16; CHECK-NEXT: mulld 6, 3, 9 17; CHECK-NEXT: mulhdu 3, 3, 9 18; CHECK-NEXT: addc 6, 6, 7 19; CHECK-NEXT: addze 3, 3 20; CHECK-NEXT: ld 5, 8(5) 21; CHECK-NEXT: mulld 7, 5, 8 22; CHECK-NEXT: mulhdu 5, 5, 8 23; CHECK-NEXT: addc 6, 6, 7 24; CHECK-NEXT: addze 5, 5 25; CHECK-NEXT: add 3, 5, 3 26; CHECK-NEXT: cmpld 3, 5 27; CHECK-NEXT: crmove 20, 0 28; CHECK-NEXT: li 5, 0 29; CHECK-NEXT: li 3, 1 30; CHECK-NEXT: isel 3, 3, 5, 20 31; CHECK-NEXT: std 3, 0(4) 32; CHECK-NEXT: blr 33 %1 = load i64, ptr %a, align 8 34 %conv = zext i64 %1 to i128 35 %2 = load i64, ptr %b, align 8 36 %conv2 = zext i64 %2 to i128 37 %mul = mul nuw i128 %conv2, %conv 38 %shr = lshr i128 %mul, 64 39 %agep = getelementptr inbounds i64, ptr %a, i64 1 40 %3 = load i64, ptr %agep, align 8 41 %conv14 = zext i64 %3 to i128 42 %mul15 = mul nuw i128 %conv14, %conv 43 %add17 = add i128 %mul15, %shr 44 %shr19 = lshr i128 %add17, 64 45 %conv20 = trunc i128 %shr19 to i64 46 %bgep = getelementptr inbounds i64, ptr %b, i64 1 47 %4 = load i64, ptr %bgep, align 8 48 %conv28 = zext i64 %4 to i128 49 %mul31 = mul nuw i128 %conv28, %conv2 50 %conv32 = and i128 %add17, 18446744073709551615 51 %add33 = add i128 %conv32, %mul31 52 %shr35 = lshr i128 %add33, 64 53 %conv36 = trunc i128 %shr35 to i64 54 %add37 = add i64 %conv36, %conv20 55 %cmp38 = icmp ult i64 %add37, %conv36 56 %conv148 = zext i1 %cmp38 to i64 57 store i64 %conv148, ptr %r, align 8 58 ret void 59} 60 61