xref: /llvm-project/llvm/test/CodeGen/NVPTX/vector-call.ll (revision b279f6b098d3849f7f1c1f539b108307d5f8ae2d)
1; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 -verify-machineinstrs | FileCheck %s
2; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 -verify-machineinstrs | %ptxas-verify %}
3
4target triple = "nvptx-unknown-cuda"
5
6declare void @bar(<4 x i32>)
7
8; CHECK-LABEL: .func foo(
9; CHECK-DAG: ld.param.v4.u32 {[[E0:%r[0-9]+]], [[E1:%r[0-9]+]], [[E2:%r[0-9]+]], [[E3:%r[0-9]+]]}, [foo_param_0];
10; CHECK: .param .align 16 .b8 param0[16];
11; CHECK-DAG: st.param.v4.b32  [param0],  {[[E0]], [[E1]], [[E2]], [[E3]]};
12; CHECK:     call.uni
13; CHECK:     ret;
14define void @foo(<4 x i32> %a) {
15  tail call void @bar(<4 x i32> %a)
16  ret void
17}
18
19; CHECK-LABEL: .func foo3(
20; CHECK-DAG: ld.param.v2.u32 {[[E0:%r[0-9]+]], [[E1:%r[0-9]+]]}, [foo3_param_0];
21; CHECK-DAG: ld.param.u32 [[E2:%r[0-9]+]], [foo3_param_0+8];
22; CHECK: .param .align 16 .b8 param0[16];
23; CHECK-DAG: st.param.v2.b32  [param0],  {[[E0]], [[E1]]};
24; CHECK-DAG: st.param.b32     [param0+8],  [[E2]];
25; CHECK:     call.uni
26; CHECK:     ret;
27declare void @bar3(<3 x i32>)
28define void @foo3(<3 x i32> %a) {
29  tail call void @bar3(<3 x i32> %a)
30  ret void
31}
32