xref: /llvm-project/llvm/test/CodeGen/NVPTX/shift-parts.ll (revision 273a94b3d5a78cd9122c7b3bbb5d5a87147735d2)
1; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s
2; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %}
3
4; CHECK: shift_parts_left_128
5define void @shift_parts_left_128(ptr %val, ptr %amtptr) {
6; CHECK: shl.b64
7; CHECK: sub.s32
8; CHECK: shr.u64
9; CHECK: or.b64
10; CHECK: add.s32
11; CHECK: shl.b64
12; CHECK: setp.gt.s32
13; CHECK: selp.b64
14; CHECK: shl.b64
15  %amt = load i128, ptr %amtptr
16  %a = load i128, ptr %val
17  %val0 = shl i128 %a, %amt
18  store i128 %val0, ptr %val
19  ret void
20}
21
22; CHECK: shift_parts_right_128
23define void @shift_parts_right_128(ptr %val, ptr %amtptr) {
24; CHECK: shr.u64
25; CHECK: sub.s32
26; CHECK: shl.b64
27; CHECK: or.b64
28; CHECK: add.s32
29; CHECK: shr.s64
30; CHECK: setp.gt.s32
31; CHECK: selp.b64
32; CHECK: shr.s64
33  %amt = load i128, ptr %amtptr
34  %a = load i128, ptr %val
35  %val0 = ashr i128 %a, %amt
36  store i128 %val0, ptr %val
37  ret void
38}
39