xref: /llvm-project/llvm/test/CodeGen/NVPTX/ldu-reg-plus-offset.ll (revision b279f6b098d3849f7f1c1f539b108307d5f8ae2d)
1; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 -verify-machineinstrs | FileCheck %s
2; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %}
3
4target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
5
6
7define void @reg_plus_offset(ptr %a) {
8; CHECK:        ldu.global.u32  %r{{[0-9]+}}, [%rd{{[0-9]+}}+32];
9; CHECK:        ldu.global.u32  %r{{[0-9]+}}, [%rd{{[0-9]+}}+36];
10  %p2 = getelementptr i32, ptr %a, i32 8
11  %t1 = call i32 @llvm.nvvm.ldu.global.i.i32.p0(ptr %p2, i32 4)
12  %p3 = getelementptr i32, ptr %a, i32 9
13  %t2 = call i32 @llvm.nvvm.ldu.global.i.i32.p0(ptr %p3, i32 4)
14  %t3 = mul i32 %t1, %t2
15  store i32 %t3, ptr %a
16  ret void
17}
18
19declare i32 @llvm.nvvm.ldu.global.i.i32.p0(ptr, i32)
20declare i32 @llvm.nvvm.read.ptx.sreg.tid.x()
21