1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-attributes --version 5 2; RUN: opt < %s -S -mtriple=nvptx-nvidia-cuda -mcpu=sm_20 -passes=nvvm-intr-range | FileCheck %s 3 4define ptx_kernel i32 @test_maxntid() { 5; CHECK-LABEL: define ptx_kernel i32 @test_maxntid( 6; CHECK-SAME: ) #[[ATTR0:[0-9]+]] { 7; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 96) i32 @llvm.nvvm.read.ptx.sreg.tid.x() 8; CHECK-NEXT: [[TMP3:%.*]] = call range(i32 0, 96) i32 @llvm.nvvm.read.ptx.sreg.tid.y() 9; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 64) i32 @llvm.nvvm.read.ptx.sreg.tid.z() 10; CHECK-NEXT: [[TMP11:%.*]] = call range(i32 1, 97) i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 11; CHECK-NEXT: [[TMP4:%.*]] = call range(i32 1, 97) i32 @llvm.nvvm.read.ptx.sreg.ntid.y() 12; CHECK-NEXT: [[TMP6:%.*]] = call range(i32 1, 65) i32 @llvm.nvvm.read.ptx.sreg.ntid.z() 13; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP1]], [[TMP3]] 14; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], [[TMP2]] 15; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], [[TMP11]] 16; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], [[TMP4]] 17; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP10]], [[TMP6]] 18; CHECK-NEXT: ret i32 [[TMP5]] 19; 20 %1 = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 21 %2 = call i32 @llvm.nvvm.read.ptx.sreg.tid.y() 22 %3 = call i32 @llvm.nvvm.read.ptx.sreg.tid.z() 23 %4 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 24 %5 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.y() 25 %6 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.z() 26 %7 = add i32 %1, %2 27 %8 = add i32 %7, %3 28 %9 = add i32 %8, %4 29 %10 = add i32 %9, %5 30 %11 = add i32 %10, %6 31 ret i32 %11 32} 33 34define ptx_kernel i32 @test_reqntid() { 35; CHECK-LABEL: define ptx_kernel i32 @test_reqntid( 36; CHECK-SAME: ) #[[ATTR0]] { 37; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 20) i32 @llvm.nvvm.read.ptx.sreg.tid.x() 38; CHECK-NEXT: [[TMP5:%.*]] = call range(i32 0, 20) i32 @llvm.nvvm.read.ptx.sreg.tid.y() 39; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 20) i32 @llvm.nvvm.read.ptx.sreg.tid.z() 40; CHECK-NEXT: [[TMP4:%.*]] = call range(i32 1, 21) i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 41; CHECK-NEXT: [[TMP3:%.*]] = call range(i32 1, 21) i32 @llvm.nvvm.read.ptx.sreg.ntid.y() 42; CHECK-NEXT: [[TMP6:%.*]] = call range(i32 1, 21) i32 @llvm.nvvm.read.ptx.sreg.ntid.z() 43; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP1]], [[TMP5]] 44; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], [[TMP2]] 45; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], [[TMP4]] 46; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], [[TMP3]] 47; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], [[TMP6]] 48; CHECK-NEXT: ret i32 [[TMP3]] 49; 50 %1 = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() 51 %2 = call i32 @llvm.nvvm.read.ptx.sreg.tid.y() 52 %3 = call i32 @llvm.nvvm.read.ptx.sreg.tid.z() 53 %4 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 54 %5 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.y() 55 %6 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.z() 56 %7 = add i32 %1, %2 57 %8 = add i32 %7, %3 58 %9 = add i32 %8, %4 59 %10 = add i32 %9, %5 60 %11 = add i32 %10, %6 61 ret i32 %5 62} 63 64;; A case like this could occur if a function with the sreg intrinsic was 65;; inlined into a kernel where the tid metadata is present, ensure the range is 66;; updated. 67define ptx_kernel i32 @test_inlined() { 68; CHECK-LABEL: define ptx_kernel i32 @test_inlined( 69; CHECK-SAME: ) #[[ATTR0]] { 70; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 4) i32 @llvm.nvvm.read.ptx.sreg.tid.x() 71; CHECK-NEXT: ret i32 [[TMP1]] 72; 73 %1 = call range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.x() 74 ret i32 %1 75} 76 77declare i32 @llvm.nvvm.read.ptx.sreg.tid.x() 78declare i32 @llvm.nvvm.read.ptx.sreg.tid.y() 79declare i32 @llvm.nvvm.read.ptx.sreg.tid.z() 80 81declare i32 @llvm.nvvm.read.ptx.sreg.ntid.x() 82declare i32 @llvm.nvvm.read.ptx.sreg.ntid.y() 83declare i32 @llvm.nvvm.read.ptx.sreg.ntid.z() 84 85!nvvm.annotations = !{!0, !1, !2} 86!0 = !{ptr @test_maxntid, !"maxntidx", i32 32, !"maxntidz", i32 3} 87!1 = !{ptr @test_reqntid, !"reqntidx", i32 20} 88!2 = !{ptr @test_inlined, !"maxntidx", i32 4} 89