1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --function foo --extra_scrub --default-march nvptx64 --filter-out ".*//.*" --filter-out "[\{\}\(\)]" --version 5 2 3; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_50 | FileCheck %s 4; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_50 | %ptxas-verify %} 5 6target triple = "nvptx-nvidia-cuda" 7 8define ptx_kernel void @foo(ptr noalias readonly %ptr, ptr noalias %retval) { 9; CHECK-LABEL: foo( 10; CHECK: .reg .b16 %rs<2>; 11; CHECK: .reg .b32 %r<4>; 12; CHECK: .reg .b64 %rd<5>; 13; CHECK-EMPTY: 14; CHECK: ld.param.u64 %rd1, [foo_param_0]; 15; CHECK: ld.param.u64 %rd2, [foo_param_1]; 16; CHECK: cvta.to.global.u64 %rd3, %rd2; 17; CHECK: cvta.to.global.u64 %rd4, %rd1; 18; CHECK: ld.global.nc.u8 %rs1, [%rd4]; 19; CHECK: cvt.u32.u8 %r1, %rs1; 20; CHECK: add.s32 %r2, %r1, 1; 21; CHECK: and.b32 %r3, %r2, 1; 22; CHECK: st.global.u32 [%rd3], %r3; 23; CHECK: ret; 24 %ld = load i1, ptr %ptr, align 1 25 %zext = zext i1 %ld to i32 26 %add = add i32 %zext, 1 27 %and = and i32 %add, 1 28 store i32 %and, ptr %retval 29 ret void 30} 31