1; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_30 -mattr=+ptx60 | FileCheck %s 2; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_30 -mattr=+ptx60 | %ptxas-verify %} 3 4declare i32 @llvm.nvvm.fns(i32, i32, i32) 5 6; CHECK-LABEL: .func{{.*}}fns 7define i32 @fns(i32 %mask, i32 %base, i32 %offset) { 8 ; CHECK: ld.param.u32 [[MASK:%r[0-9]+]], [fns_param_0]; 9 ; CHECK: ld.param.u32 [[BASE:%r[0-9]+]], [fns_param_1]; 10 ; CHECK: ld.param.u32 [[OFFSET:%r[0-9]+]], [fns_param_2]; 11 12 ; CHECK: fns.b32 {{%r[0-9]+}}, [[MASK]], [[BASE]], [[OFFSET]]; 13 %r0 = call i32 @llvm.nvvm.fns(i32 %mask, i32 %base, i32 %offset); 14 ; CHECK: fns.b32 {{%r[0-9]+}}, [[MASK]], [[BASE]], 0; 15 %r1 = call i32 @llvm.nvvm.fns(i32 %mask, i32 %base, i32 0); 16 %r01 = add i32 %r0, %r1; 17 ; CHECK: fns.b32 {{%r[0-9]+}}, [[MASK]], 1, [[OFFSET]]; 18 %r2 = call i32 @llvm.nvvm.fns(i32 %mask, i32 1, i32 %offset); 19 ; CHECK: fns.b32 {{%r[0-9]+}}, [[MASK]], 1, 0; 20 %r3 = call i32 @llvm.nvvm.fns(i32 %mask, i32 1, i32 0); 21 %r23 = add i32 %r2, %r3; 22 %r0123 = add i32 %r01, %r23; 23 ; CHECK: fns.b32 {{%r[0-9]+}}, 2, [[BASE]], [[OFFSET]]; 24 %r4 = call i32 @llvm.nvvm.fns(i32 2, i32 %base, i32 %offset); 25 ; CHECK: fns.b32 {{%r[0-9]+}}, 2, [[BASE]], 0; 26 %r5 = call i32 @llvm.nvvm.fns(i32 2, i32 %base, i32 0); 27 %r45 = add i32 %r4, %r5; 28 ; CHECK: fns.b32 {{%r[0-9]+}}, 2, 1, [[OFFSET]]; 29 %r6 = call i32 @llvm.nvvm.fns(i32 2, i32 1, i32 %offset); 30 ; CHECK: fns.b32 {{%r[0-9]+}}, 2, 1, 0; 31 %r7 = call i32 @llvm.nvvm.fns(i32 2, i32 1, i32 0); 32 %r67 = add i32 %r6, %r7; 33 %r4567 = add i32 %r45, %r67; 34 %r = add i32 %r0123, %r4567; 35 ret i32 %r; 36} 37 38