xref: /llvm-project/llvm/test/CodeGen/NVPTX/fma-disable.ll (revision b279f6b098d3849f7f1c1f539b108307d5f8ae2d)
1; RUN: llc < %s -mtriple=nvptx -mcpu=sm_20 -nvptx-fma-level=1 | FileCheck %s -check-prefix=FMA
2; RUN: llc < %s -mtriple=nvptx -mcpu=sm_20 -nvptx-fma-level=0 | FileCheck %s -check-prefix=MUL
3; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 -nvptx-fma-level=1 | FileCheck %s -check-prefix=FMA
4; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 -nvptx-fma-level=0 | FileCheck %s -check-prefix=MUL
5; RUN: %if ptxas && !ptxas-12.0 %{ llc < %s -mtriple=nvptx -mcpu=sm_20 -nvptx-fma-level=1 | %ptxas-verify %}
6; RUN: %if ptxas && !ptxas-12.0 %{ llc < %s -mtriple=nvptx -mcpu=sm_20 -nvptx-fma-level=0 | %ptxas-verify %}
7; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 -nvptx-fma-level=1 | %ptxas-verify %}
8; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 -nvptx-fma-level=0 | %ptxas-verify %}
9
10define ptx_device float @test_mul_add_f(float %x, float %y, float %z) {
11entry:
12; FMA: fma.rn.f32
13; MUL: mul.rn.f32
14; MUL: add.rn.f32
15  %a = fmul float %x, %y
16  %b = fadd float %a, %z
17  ret float %b
18}
19
20define ptx_device double @test_mul_add_d(double %x, double %y, double %z) {
21entry:
22; FMA: fma.rn.f64
23; MUL: mul.rn.f64
24; MUL: add.rn.f64
25  %a = fmul double %x, %y
26  %b = fadd double %a, %z
27  ret double %b
28}
29