1; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s 2; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %} 3 4; Checks how NVPTX lowers alloca buffers and their passing to functions. 5; 6; Produced with the following CUDA code: 7; extern "C" __attribute__((device)) void callee(ptr f, char* buf); 8; 9; extern "C" __attribute__((global)) void kernel_func(ptr a) { 10; char buf[4 * sizeof(float)]; 11; *(reinterpret_cast<ptr>(&buf[0])) = a[0]; 12; *(reinterpret_cast<ptr>(&buf[1])) = a[1]; 13; *(reinterpret_cast<ptr>(&buf[2])) = a[2]; 14; *(reinterpret_cast<ptr>(&buf[3])) = a[3]; 15; callee(a, buf); 16; } 17 18; CHECK: .visible .entry kernel_func 19define ptx_kernel void @kernel_func(ptr %a) { 20entry: 21 %buf = alloca [16 x i8], align 4 22 23; CHECK: .local .align 4 .b8 __local_depot0[16] 24; CHECK: mov.u64 %SPL 25 26; CHECK: ld.param.u64 %rd[[A_REG:[0-9]+]], [kernel_func_param_0] 27; CHECK: cvta.to.global.u64 %rd[[A1_REG:[0-9]+]], %rd[[A_REG]] 28; CHECK: add.u64 %rd[[SP_REG:[0-9]+]], %SP, 0 29; CHECK: ld.global.f32 %f[[A0_REG:[0-9]+]], [%rd[[A1_REG]]] 30; CHECK: st.local.f32 [{{%rd[0-9]+}}], %f[[A0_REG]] 31 32 %0 = load float, ptr %a, align 4 33 store float %0, ptr %buf, align 4 34 %arrayidx2 = getelementptr inbounds float, ptr %a, i64 1 35 %1 = load float, ptr %arrayidx2, align 4 36 %arrayidx3 = getelementptr inbounds [16 x i8], ptr %buf, i64 0, i64 1 37 store float %1, ptr %arrayidx3, align 4 38 %arrayidx4 = getelementptr inbounds float, ptr %a, i64 2 39 %2 = load float, ptr %arrayidx4, align 4 40 %arrayidx5 = getelementptr inbounds [16 x i8], ptr %buf, i64 0, i64 2 41 store float %2, ptr %arrayidx5, align 4 42 %arrayidx6 = getelementptr inbounds float, ptr %a, i64 3 43 %3 = load float, ptr %arrayidx6, align 4 44 %arrayidx7 = getelementptr inbounds [16 x i8], ptr %buf, i64 0, i64 3 45 store float %3, ptr %arrayidx7, align 4 46 47; CHECK: .param .b64 param0; 48; CHECK-NEXT: st.param.b64 [param0], %rd[[A_REG]] 49; CHECK-NEXT: .param .b64 param1; 50; CHECK-NEXT: st.param.b64 [param1], %rd[[SP_REG]] 51; CHECK-NEXT: call.uni 52; CHECK-NEXT: callee, 53 54 call void @callee(ptr %a, ptr %buf) #2 55 ret void 56} 57 58declare void @callee(ptr, ptr) 59