xref: /llvm-project/llvm/test/CodeGen/Mips/whitespace.ll (revision ae26f50aea4ef1a6c7058019f0db11a91bbcdade)
1; Test that the instructions have the correct whitespace.
2; RUN: llc  -mtriple=mipsel -mattr=mips16 -relocation-model=pic < %s | FileCheck -strict-whitespace %s -check-prefix=16
3; RUN: llc  -mtriple=mips -mcpu=mips32r2 < %s | FileCheck %s -strict-whitespace -check-prefix=32R2
4
5@main.L = internal unnamed_addr constant [5 x ptr] [ptr blockaddress(@main, %L1), ptr blockaddress(@main, %L2), ptr blockaddress(@main, %L3), ptr blockaddress(@main, %L4), ptr null], align 4
6@str = private unnamed_addr constant [2 x i8] c"A\00"
7@str5 = private unnamed_addr constant [2 x i8] c"B\00"
8@str6 = private unnamed_addr constant [2 x i8] c"C\00"
9@str7 = private unnamed_addr constant [2 x i8] c"D\00"
10@str8 = private unnamed_addr constant [2 x i8] c"E\00"
11
12define i32 @main() nounwind {
13entry:
14; 16: jalrc	${{[0-9]+}}
15; 16: jrc	${{[0-9]+}}
16; 16: jrc	$ra
17  %puts = tail call i32 @puts(ptr @str)
18  br label %L1
19
20L1:                                               ; preds = %entry, %L3
21  %i.0 = phi i32 [ 0, %entry ], [ %inc, %L3 ]
22  %puts5 = tail call i32 @puts(ptr @str5)
23  br label %L2
24
25L2:                                               ; preds = %L1, %L3
26  %i.1 = phi i32 [ %i.0, %L1 ], [ %inc, %L3 ]
27  %puts6 = tail call i32 @puts(ptr @str6)
28  br label %L3
29
30L3:                                               ; preds = %L2, %L3
31  %i.2 = phi i32 [ %i.1, %L2 ], [ %inc, %L3 ]
32  %puts7 = tail call i32 @puts(ptr @str7)
33  %inc = add i32 %i.2, 1
34  %arrayidx = getelementptr inbounds [5 x ptr], ptr @main.L, i32 0, i32 %i.2
35  %0 = load ptr, ptr %arrayidx, align 4
36  indirectbr ptr %0, [label %L1, label %L2, label %L3, label %L4]
37L4:                                               ; preds = %L3
38  %puts8 = tail call i32 @puts(ptr @str8)
39  ret i32 0
40}
41
42declare i32 @puts(ptr nocapture) nounwind
43
44define i32 @ext(i32 %s, i32 %pos, i32 %sz) nounwind readnone {
45entry:
46; 32R2: ext	${{[0-9]+}}, $4, 5, 9
47  %shr = lshr i32 %s, 5
48  %and = and i32 %shr, 511
49  ret i32 %and
50}
51
52define void @ins(i32 %s, ptr nocapture %d) nounwind {
53entry:
54; 32R2: ins	${{[0-9]+}}, $4, 5, 9
55  %and = shl i32 %s, 5
56  %shl = and i32 %and, 16352
57  %tmp3 = load i32, ptr %d, align 4
58  %and5 = and i32 %tmp3, -16353
59  %or = or i32 %and5, %shl
60  store i32 %or, ptr %d, align 4
61  ret void
62}
63