xref: /llvm-project/llvm/test/CodeGen/Mips/tls-static.ll (revision 8663926a544602932d299dda435ed1ef70a05f48)
1; RUN: llc -mtriple=mipsel-- -disable-mips-delay-filler \
2; RUN:     -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC32
3; RUN: llc -mtriple=mips64el-- -disable-mips-delay-filler \
4; RUN:     -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC64
5
6; RUN: llc -mtriple=mipsel-- -disable-mips-delay-filler -mips-fix-global-base-reg=false \
7; RUN:     -relocation-model=static < %s | FileCheck %s -check-prefix=STATICGP32
8; RUN: llc -mtriple=mips64el-- -disable-mips-delay-filler -mips-fix-global-base-reg=false \
9; RUN:     -relocation-model=static < %s | FileCheck %s -check-prefix=STATICGP64
10
11@t1 = dso_local thread_local global i32 0, align 4
12
13define dso_local i32 @f1() nounwind {
14entry:
15  %tmp = load i32, ptr @t1, align 4
16  ret i32 %tmp
17
18; STATIC32-LABEL:   f1:
19; STATIC32:   lui     $[[R0:[0-9]+]], %tprel_hi(t1)
20; STATIC32:   addiu   $[[R1:[0-9]+]], $[[R0]], %tprel_lo(t1)
21; STATIC32:   rdhwr   $3, $29{{$}}
22; STATIC32:   addu    $[[R2:[0-9]+]], $3, $[[R1]]
23; STATIC32:   lw      $2, 0($[[R2]])
24
25; STATIC64-LABEL:   f1:
26; STATIC64:   lui     $[[R0:[0-9]+]], %tprel_hi(t1)
27; STATIC64:   daddiu  $[[R1:[0-9]+]], $[[R0]], %tprel_lo(t1)
28; STATIC64:   rdhwr   $3, $29{{$}}
29; STATIC64:   daddu   $[[R2:[0-9]+]], $3, $[[R0]]
30; STATIC64:   lw      $2, 0($[[R2]])
31}
32
33@t2 = external thread_local global i32
34
35define dso_local i32 @f2() nounwind {
36entry:
37  %tmp = load i32, ptr @t2, align 4
38  ret i32 %tmp
39
40; STATICGP32-LABEL: f2:
41; STATICGP32: lui     $[[R0:[0-9]+]], %hi(__gnu_local_gp)
42; STATICGP32: addiu   $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
43; STATICGP32: lw      ${{[0-9]+}}, %gottprel(t2)($[[GP]])
44
45; STATICGP64-LABEL: f2:
46; STATICGP64: lui     $[[R0:[0-9]+]], %hi(%neg(%gp_rel(f2)))
47; STATICGP64: daddiu  $[[GP:[0-9]+]], $[[R0]], %lo(%neg(%gp_rel(f2)))
48; STATICGP64: ld      $1, %gottprel(t2)($[[GP]])
49
50; STATIC32-LABEL:   f2:
51; STATIC32:   lui     $[[R0:[0-9]+]], %hi(__gnu_local_gp)
52; STATIC32:   addiu   $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
53; STATIC32:   lw      $[[R0:[0-9]+]], %gottprel(t2)($[[GP]])
54; STATIC32:   rdhwr   $3, $29{{$}}
55; STATIC32:   addu    $[[R1:[0-9]+]], $3, $[[R0]]
56; STATIC32:   lw      $2, 0($[[R1]])
57
58; STATIC64-LABEL:   f2:
59; STATIC64:   lui     $[[R0:[0-9]+]], %hi(%neg(%gp_rel(f2)))
60; STATIC64:   daddiu  $[[GP:[0-9]+]], $[[R0]], %lo(%neg(%gp_rel(f2)))
61; STATIC64:   ld      $[[R0:[0-9]+]], %gottprel(t2)($[[GP]])
62; STATIC64:   rdhwr   $3, $29{{$}}
63; STATIC64:   daddu   $[[R1:[0-9]+]], $3, $[[R0]]
64; STATIC64:   lw      $2, 0($[[R1]])
65}
66
67@f3.i = internal thread_local unnamed_addr global i32 1, align 4
68
69define dso_local i32 @f3() nounwind {
70entry:
71; MM-LABEL:       f3:
72; MM:   addiu   $4, ${{[a-z0-9]+}}, %tlsldm(f3.i)
73; MM:   jalr    $25
74; MM:   lui     $[[R0:[0-9]+]], %dtprel_hi(f3.i)
75; MM:   addu16  $[[R1:[0-9]+]], $[[R0]], $2
76; MM:   lw      ${{[0-9]+}}, %dtprel_lo(f3.i)($[[R1]])
77
78  %0 = load i32, ptr @f3.i, align 4
79  %inc = add nsw i32 %0, 1
80  store i32 %inc, ptr @f3.i, align 4
81  ret i32 %inc
82}
83