1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=mipsel-unknown-linux-musl-gnu < %s | FileCheck %s 3 4; Check that in microMIPSr5 with a 64 bit fpu configuration, the following 5; code can be compiled. This previously failed due to missing load/store 6; patterns and instructions to handle the 64 bit FPU case for microMIPS. 7 8%union.anon = type { { double, double } } 9 10define dso_local void @foo() #0 { 11; CHECK-LABEL: foo: 12; CHECK: # %bb.0: # %entry 13; CHECK-NEXT: addiusp -24 14; CHECK-NEXT: mtc1 $zero, $f0 15; CHECK-NEXT: mthc1 $zero, $f0 16; CHECK-NEXT: sdc1 $f0, 0($sp) 17; CHECK-NEXT: sdc1 $f0, 8($sp) 18; CHECK-NEXT: ldc1 $f0, 0($sp) 19; CHECK-NEXT: sdc1 $f0, 16($sp) 20; CHECK-NEXT: addiusp 24 21; CHECK-NEXT: jrc $ra 22entry: 23 %bleh = alloca double, align 8 24 %.compoundliteral = alloca %union.anon, align 8 25 %arrayinit.begin = getelementptr inbounds [2 x double], ptr %.compoundliteral, i32 0, i32 0 26 store double 0.000000e+00, ptr %arrayinit.begin, align 8 27 %arrayinit.element = getelementptr inbounds double, ptr %arrayinit.begin, i32 1 28 store double 0.000000e+00, ptr %arrayinit.element, align 8 29 %.compoundliteral.realp = getelementptr inbounds { double, double }, ptr %.compoundliteral, i32 0, i32 0 30 %.compoundliteral.real = load double, ptr %.compoundliteral.realp, align 8 31 store double %.compoundliteral.real, ptr %bleh, align 8 32 ret void 33} 34attributes #0 = { noinline nounwind optnone "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="mips32r5" "target-features"="+dspr2,+fp64,+mips32r5,-noabicalls,+micromips" } 35