1; RUN: llc -mtriple=mips < %s 2; RUN: llc -mtriple=mips -mattr=+msa,+fp64,+mips32r2 < %s 3; RUN: llc -mtriple=mipsel < %s 4; RUN: llc -mtriple=mipsel -mattr=+msa,+fp64,+mips32r2 < %s 5 6; This test originally failed for MSA with a 7; "Type for zero vector elements is not legal" assertion. 8; It should at least successfully build. 9 10define void @autogen_SD3926023935(ptr, ptr, ptr, i32, i64, i8) { 11BB: 12 %A4 = alloca i1 13 %A3 = alloca float 14 %A2 = alloca double 15 %A1 = alloca float 16 %A = alloca double 17 %L = load i8, ptr %0 18 store i8 -123, ptr %0 19 %E = extractelement <4 x i64> zeroinitializer, i32 1 20 %Shuff = shufflevector <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 21 %I = insertelement <2 x i1> zeroinitializer, i1 false, i32 0 22 %BC = bitcast i64 181325 to double 23 %Sl = select i1 false, <2 x i32> zeroinitializer, <2 x i32> zeroinitializer 24 %Cmp = icmp ne <4 x i64> zeroinitializer, zeroinitializer 25 %L5 = load i8, ptr %0 26 store i8 %L, ptr %0 27 %E6 = extractelement <4 x i64> zeroinitializer, i32 3 28 %Shuff7 = shufflevector <2 x i16> zeroinitializer, <2 x i16> zeroinitializer, <2 x i32> <i32 2, i32 0> 29 %I8 = insertelement <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, i64 498254, i32 4 30 %B = shl i32 0, 364464 31 %Sl9 = select i1 false, i64 %E, i64 498254 32 %Cmp10 = icmp sge i8 -123, %5 33 br label %CF80 34 35CF80: ; preds = %BB 36 %L11 = load i8, ptr %0 37 store i8 -123, ptr %0 38 %E12 = extractelement <2 x i16> zeroinitializer, i32 1 39 %Shuff13 = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 40 %I14 = insertelement <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i32 %B, i32 2 41 %B15 = sdiv i64 334618, -1 42 %Sl16 = select i1 %Cmp10, <4 x i32> zeroinitializer, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1> 43 %Cmp17 = icmp ule <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %Sl16 44 %L18 = load double, ptr %A2 45 store i64 498254, ptr %A4 46 %E19 = extractelement <4 x i64> zeroinitializer, i32 0 47 %Shuff20 = shufflevector <2 x i1> zeroinitializer, <2 x i1> %I, <2 x i32> <i32 3, i32 1> 48 %I21 = insertelement <2 x i1> zeroinitializer, i1 false, i32 1 49 %B22 = fadd double 0.000000e+00, %BC 50 %ZE = zext <2 x i1> %Shuff20 to <2 x i32> 51 %Sl23 = select i1 %Cmp10, <2 x i1> %Shuff20, <2 x i1> zeroinitializer 52 %Cmp24 = icmp ult <2 x i32> zeroinitializer, zeroinitializer 53 %L25 = load i8, ptr %0 54 store i8 %L25, ptr %0 55 %E26 = extractelement <4 x i8> <i8 -1, i8 -1, i8 -1, i8 -1>, i32 3 56 %Shuff27 = shufflevector <4 x i32> %Shuff, <4 x i32> %I14, <4 x i32> <i32 6, i32 0, i32 undef, i32 4> 57 %I28 = insertelement <4 x i32> zeroinitializer, i32 %3, i32 0 58 %B29 = lshr i8 %E26, -43 59 %Tr = trunc i8 %L5 to i1 60 br label %CF79 61 62CF79: ; preds = %CF80 63 %Sl30 = select i1 false, i8 %B29, i8 -123 64 %Cmp31 = icmp sge <2 x i1> %I, %I 65 %L32 = load i64, ptr %A4 66 store i8 -123, ptr %0 67 %E33 = extractelement <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, i32 2 68 %Shuff34 = shufflevector <4 x i64> zeroinitializer, <4 x i64> %Shuff13, <4 x i32> <i32 5, i32 7, i32 1, i32 3> 69 %I35 = insertelement <4 x i64> zeroinitializer, i64 498254, i32 3 70 %B36 = sub <8 x i64> %I8, <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1> 71 %Sl38 = select i1 %Cmp10, i8 -43, i8 %L5 72 %Cmp39 = icmp eq i64 498254, %B15 73 br label %CF 74 75CF: ; preds = %CF, %CF79 76 %L40 = load double, ptr %A 77 store i1 %Cmp39, ptr %0 78 %E41 = extractelement <4 x i64> zeroinitializer, i32 3 79 %Shuff42 = shufflevector <2 x i32> zeroinitializer, <2 x i32> %ZE, <2 x i32> <i32 2, i32 undef> 80 %I43 = insertelement <4 x i32> %Shuff, i32 %3, i32 0 81 %B44 = shl i64 %E41, -1 82 %Se = sext <2 x i1> %I to <2 x i32> 83 %Sl45 = select i1 %Cmp10, i1 false, i1 false 84 br i1 %Sl45, label %CF, label %CF77 85 86CF77: ; preds = %CF77, %CF 87 %Cmp46 = fcmp uno double 0.000000e+00, 0.000000e+00 88 br i1 %Cmp46, label %CF77, label %CF78 89 90CF78: ; preds = %CF78, %CF83, %CF82, %CF77 91 %L47 = load i64, ptr %A4 92 store i8 -123, ptr %0 93 %E48 = extractelement <4 x i64> zeroinitializer, i32 3 94 %Shuff49 = shufflevector <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> zeroinitializer, <4 x i32> <i32 2, i32 4, i32 6, i32 undef> 95 %I50 = insertelement <2 x i1> zeroinitializer, i1 %Cmp10, i32 0 96 %B51 = sdiv i64 %E19, 463132 97 %Tr52 = trunc i64 %E48 to i32 98 %Sl53 = select i1 %Tr, i1 %Cmp46, i1 %Cmp10 99 br i1 %Sl53, label %CF78, label %CF83 100 101CF83: ; preds = %CF78 102 %Cmp54 = fcmp uge double %L40, %L40 103 br i1 %Cmp54, label %CF78, label %CF82 104 105CF82: ; preds = %CF83 106 %L55 = load i64, ptr %A4 107 store i64 %L32, ptr %A4 108 %E56 = extractelement <2 x i16> %Shuff7, i32 1 109 %Shuff57 = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 2, i32 4, i32 6, i32 0> 110 %I58 = insertelement <2 x i32> %Sl, i32 %Tr52, i32 0 111 %B59 = or i32 %B, %3 112 %FC = sitofp i64 498254 to double 113 %Sl60 = select i1 false, i64 %E6, i64 -1 114 %Cmp61 = icmp sgt <4 x i32> %Shuff27, %I43 115 %L62 = load i64, ptr %A4 116 store i64 %Sl9, ptr %A4 117 %E63 = extractelement <2 x i32> %ZE, i32 0 118 %Shuff64 = shufflevector <4 x i64> zeroinitializer, <4 x i64> %Shuff13, <4 x i32> <i32 1, i32 3, i32 undef, i32 7> 119 %I65 = insertelement <4 x i32> %Shuff, i32 %3, i32 3 120 %B66 = sub i64 %L47, 53612 121 %Tr67 = trunc i64 %4 to i32 122 %Sl68 = select i1 %Cmp39, i1 %Cmp39, i1 false 123 br i1 %Sl68, label %CF78, label %CF81 124 125CF81: ; preds = %CF82 126 %Cmp69 = icmp ne <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, %B36 127 %L70 = load i8, ptr %0 128 store i64 %L55, ptr %A4 129 %E71 = extractelement <4 x i32> %Shuff49, i32 1 130 %Shuff72 = shufflevector <4 x i64> zeroinitializer, <4 x i64> %Shuff34, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 131 %I73 = insertelement <4 x i64> %Shuff64, i64 %E, i32 2 132 %B74 = lshr <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, %B36 133 %Sl75 = select i1 %Sl68, i64 %B51, i64 %L55 134 %Cmp76 = icmp sgt <8 x i64> %B74, %B36 135 store i1 %Cmp39, ptr %0 136 store i64 %E41, ptr %A4 137 store i64 %L32, ptr %A4 138 store i64 %Sl75, ptr %2 139 store i64 %L32, ptr %A4 140 ret void 141} 142