xref: /llvm-project/llvm/test/CodeGen/Mips/mips1-load-delay.ll (revision 8663926a544602932d299dda435ed1ef70a05f48)
1; RUN: llc < %s -mtriple=mips -mcpu=mips1    | FileCheck %s -check-prefixes=ALL,MIPS1
2; RUN: llc < %s -mtriple=mips -mcpu=mips2    | FileCheck %s -check-prefixes=ALL,MIPS2
3; RUN: llc < %s -mtriple=mips -mcpu=mips32r2 | FileCheck %s -check-prefixes=ALL,MIPS32
4target datalayout = "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
5target triple = "mipsel-unknown-unknown-elf"
6
7; Function Attrs: noinline nounwind optnone
8define dso_local i32 @add_two_pointers(ptr %a, ptr %b) #0 {
9entry:
10; ALL-LABEL: add_two_pointers:
11  %a.addr = alloca ptr, align 4
12  %b.addr = alloca ptr, align 4
13  store ptr %a, ptr %a.addr, align 4
14  store ptr %b, ptr %b.addr, align 4
15  %0 = load ptr, ptr %a.addr, align 4
16  %1 = load i32, ptr %0, align 4
17  ; ALL:        lw $1, 4($fp)
18  ; MIPS1:      nop
19  ; MIPS2-NOT:  nop
20  ; MIPS32-NOT: nop
21  ; ALL:        lw $1, 0($1)
22  %2 = load ptr, ptr %b.addr, align 4
23  %3 = load i32, ptr %2, align 4
24  ; ALL:        lw $2, 0($fp)
25  ; MIPS1:      nop
26  ; MIPS2-NOT:  nop
27  ; MIPS32-NOT: nop
28  ; ALL:        lw $2, 0($2)
29  %add = add nsw i32 %1, %3
30  ret i32 %add
31  ; ALL:        lw $ra, 12($sp)
32  ; MIPS1:      nop
33  ; MIPS2-NOT:  nop
34  ; MIPS32-NOT: nop
35  ; ALL:        jr $ra
36}
37
38attributes #0 = { noinline nounwind optnone "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="-noabicalls" }
39
40!llvm.module.flags = !{!0, !1}
41
42!0 = !{i32 1, !"wchar_size", i32 4}
43!1 = !{i32 7, !"frame-pointer", i32 2}
44
45