1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=mipsisa32r6-unknown-linux-gnu -verify-machineinstrs -o - %s | FileCheck %s 3 4 5define i1 @isnan_float(float %x) nounwind { 6; CHECK-LABEL: isnan_float: 7; CHECK: # %bb.0: 8; CHECK-NEXT: class.s $f0, $f12 9; CHECK-NEXT: mfc1 $1, $f0 10; CHECK-NEXT: andi $1, $1, 3 11; CHECK-NEXT: jr $ra 12; CHECK-NEXT: sltu $2, $zero, $1 13 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 3) ; nan 14 ret i1 %1 15} 16 17define i1 @isnan_double(double %x) nounwind { 18; CHECK-LABEL: isnan_double: 19; CHECK: # %bb.0: 20; CHECK-NEXT: class.d $f0, $f12 21; CHECK-NEXT: mfc1 $1, $f0 22; CHECK-NEXT: andi $1, $1, 3 23; CHECK-NEXT: jr $ra 24; CHECK-NEXT: sltu $2, $zero, $1 25 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 3) ; nan 26 ret i1 %1 27} 28 29define i1 @isnan_float_strictfp(float %x) strictfp nounwind { 30; CHECK-LABEL: isnan_float_strictfp: 31; CHECK: # %bb.0: 32; CHECK-NEXT: class.s $f0, $f12 33; CHECK-NEXT: mfc1 $1, $f0 34; CHECK-NEXT: andi $1, $1, 3 35; CHECK-NEXT: jr $ra 36; CHECK-NEXT: sltu $2, $zero, $1 37 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 3) strictfp ; nan 38 ret i1 %1 39} 40 41define i1 @isnan_double_strictfp(double %x) strictfp nounwind { 42; CHECK-LABEL: isnan_double_strictfp: 43; CHECK: # %bb.0: 44; CHECK-NEXT: class.d $f0, $f12 45; CHECK-NEXT: mfc1 $1, $f0 46; CHECK-NEXT: andi $1, $1, 3 47; CHECK-NEXT: jr $ra 48; CHECK-NEXT: sltu $2, $zero, $1 49 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 3) strictfp ; nan 50 ret i1 %1 51} 52 53define i1 @isinf_float(float %x) nounwind { 54; CHECK-LABEL: isinf_float: 55; CHECK: # %bb.0: 56; CHECK-NEXT: class.s $f0, $f12 57; CHECK-NEXT: mfc1 $1, $f0 58; CHECK-NEXT: andi $1, $1, 68 59; CHECK-NEXT: jr $ra 60; CHECK-NEXT: sltu $2, $zero, $1 61 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 516) ; 0x204 = "inf" 62 ret i1 %1 63} 64 65define i1 @isfinite_float(float %x) nounwind { 66; CHECK-LABEL: isfinite_float: 67; CHECK: # %bb.0: 68; CHECK-NEXT: class.s $f0, $f12 69; CHECK-NEXT: mfc1 $1, $f0 70; CHECK-NEXT: andi $1, $1, 952 71; CHECK-NEXT: jr $ra 72; CHECK-NEXT: sltu $2, $zero, $1 73 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 504) ; 0x1f8 = "finite" 74 ret i1 %1 75} 76 77define i1 @isnormal_float(float %x) nounwind { 78; CHECK-LABEL: isnormal_float: 79; CHECK: # %bb.0: 80; CHECK-NEXT: class.s $f0, $f12 81; CHECK-NEXT: mfc1 $1, $f0 82; CHECK-NEXT: andi $1, $1, 136 83; CHECK-NEXT: jr $ra 84; CHECK-NEXT: sltu $2, $zero, $1 85 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 264) ; 0x108 = "normal" 86 ret i1 %1 87} 88 89define i1 @issubnormal_float(float %x) nounwind { 90; CHECK-LABEL: issubnormal_float: 91; CHECK: # %bb.0: 92; CHECK-NEXT: class.s $f0, $f12 93; CHECK-NEXT: mfc1 $1, $f0 94; CHECK-NEXT: andi $1, $1, 272 95; CHECK-NEXT: jr $ra 96; CHECK-NEXT: sltu $2, $zero, $1 97 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 144) ; 0x90 = "subnormal" 98 ret i1 %1 99} 100 101define i1 @iszero_float(float %x) nounwind { 102; CHECK-LABEL: iszero_float: 103; CHECK: # %bb.0: 104; CHECK-NEXT: class.s $f0, $f12 105; CHECK-NEXT: mfc1 $1, $f0 106; CHECK-NEXT: andi $1, $1, 544 107; CHECK-NEXT: jr $ra 108; CHECK-NEXT: sltu $2, $zero, $1 109 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 96) ; 0x60 = "zero" 110 ret i1 %1 111} 112 113define i1 @issnan_float(float %x) nounwind { 114; CHECK-LABEL: issnan_float: 115; CHECK: # %bb.0: 116; CHECK-NEXT: class.s $f0, $f12 117; CHECK-NEXT: mfc1 $1, $f0 118; CHECK-NEXT: andi $1, $1, 1 119; CHECK-NEXT: jr $ra 120; CHECK-NEXT: sltu $2, $zero, $1 121 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 1) 122 ret i1 %1 123} 124 125define i1 @issnan_double(double %x) nounwind { 126; CHECK-LABEL: issnan_double: 127; CHECK: # %bb.0: 128; CHECK-NEXT: class.d $f0, $f12 129; CHECK-NEXT: mfc1 $1, $f0 130; CHECK-NEXT: andi $1, $1, 1 131; CHECK-NEXT: jr $ra 132; CHECK-NEXT: sltu $2, $zero, $1 133 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 1) 134 ret i1 %1 135} 136 137define i1 @isqnan_float(float %x) nounwind { 138; CHECK-LABEL: isqnan_float: 139; CHECK: # %bb.0: 140; CHECK-NEXT: class.s $f0, $f12 141; CHECK-NEXT: mfc1 $1, $f0 142; CHECK-NEXT: andi $1, $1, 2 143; CHECK-NEXT: jr $ra 144; CHECK-NEXT: sltu $2, $zero, $1 145 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 2) 146 ret i1 %1 147} 148 149define i1 @isqnan_double(double %x) nounwind { 150; CHECK-LABEL: isqnan_double: 151; CHECK: # %bb.0: 152; CHECK-NEXT: class.d $f0, $f12 153; CHECK-NEXT: mfc1 $1, $f0 154; CHECK-NEXT: andi $1, $1, 2 155; CHECK-NEXT: jr $ra 156; CHECK-NEXT: sltu $2, $zero, $1 157 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 2) 158 ret i1 %1 159} 160 161define i1 @isposzero_double(double %x) nounwind { 162; CHECK-LABEL: isposzero_double: 163; CHECK: # %bb.0: 164; CHECK-NEXT: class.d $f0, $f12 165; CHECK-NEXT: mfc1 $1, $f0 166; CHECK-NEXT: andi $1, $1, 512 167; CHECK-NEXT: jr $ra 168; CHECK-NEXT: sltu $2, $zero, $1 169 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 64) 170 ret i1 %1 171} 172 173define i1 @isnegzero_double(double %x) nounwind { 174; CHECK-LABEL: isnegzero_double: 175; CHECK: # %bb.0: 176; CHECK-NEXT: class.d $f0, $f12 177; CHECK-NEXT: mfc1 $1, $f0 178; CHECK-NEXT: andi $1, $1, 32 179; CHECK-NEXT: jr $ra 180; CHECK-NEXT: sltu $2, $zero, $1 181 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 32) 182 ret i1 %1 183} 184 185define i1 @isposnormal_double(double %x) nounwind { 186; CHECK-LABEL: isposnormal_double: 187; CHECK: # %bb.0: 188; CHECK-NEXT: class.d $f0, $f12 189; CHECK-NEXT: mfc1 $1, $f0 190; CHECK-NEXT: andi $1, $1, 128 191; CHECK-NEXT: jr $ra 192; CHECK-NEXT: sltu $2, $zero, $1 193 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 256) 194 ret i1 %1 195} 196 197define i1 @isnegnormal_double(double %x) nounwind { 198; CHECK-LABEL: isnegnormal_double: 199; CHECK: # %bb.0: 200; CHECK-NEXT: class.d $f0, $f12 201; CHECK-NEXT: mfc1 $1, $f0 202; CHECK-NEXT: andi $1, $1, 8 203; CHECK-NEXT: jr $ra 204; CHECK-NEXT: sltu $2, $zero, $1 205 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 8) 206 ret i1 %1 207} 208 209define i1 @isnormal_double(double %x) nounwind { 210; CHECK-LABEL: isnormal_double: 211; CHECK: # %bb.0: 212; CHECK-NEXT: class.d $f0, $f12 213; CHECK-NEXT: mfc1 $1, $f0 214; CHECK-NEXT: andi $1, $1, 136 215; CHECK-NEXT: jr $ra 216; CHECK-NEXT: sltu $2, $zero, $1 217 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 264) 218 ret i1 %1 219} 220 221define i1 @isclass_00d_double(double %x) nounwind { 222; CHECK-LABEL: isclass_00d_double: 223; CHECK: # %bb.0: 224; CHECK-NEXT: class.d $f0, $f12 225; CHECK-NEXT: mfc1 $1, $f0 226; CHECK-NEXT: andi $1, $1, 13 227; CHECK-NEXT: jr $ra 228; CHECK-NEXT: sltu $2, $zero, $1 229 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 13) 230 ret i1 %1 231} 232 233define i1 @isclass_1c0_float(float %x) nounwind { 234; CHECK-LABEL: isclass_1c0_float: 235; CHECK: # %bb.0: 236; CHECK-NEXT: class.s $f0, $f12 237; CHECK-NEXT: mfc1 $1, $f0 238; CHECK-NEXT: andi $1, $1, 896 239; CHECK-NEXT: jr $ra 240; CHECK-NEXT: sltu $2, $zero, $1 241 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 448) 242 ret i1 %1 243} 244 245declare i1 @llvm.is.fpclass.f32(float, i32) 246declare i1 @llvm.is.fpclass.f64(double, i32) 247