xref: /llvm-project/llvm/test/CodeGen/Mips/bittest.ll (revision 91c3a718b28c92c95343e7073fbddc39a181a801)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips2 | FileCheck %s \
3; RUN:    -check-prefix=MIPS
4; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32 | FileCheck %s \
5; RUN:    -check-prefix=MIPS
6; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r2 | FileCheck %s \
7; RUN:    -check-prefix=MIPS32R2
8; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 | FileCheck %s \
9; RUN:    -check-prefix=MIPS32R2
10; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r5 | FileCheck %s \
11; RUN:    -check-prefix=MIPS32R2
12; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 | FileCheck %s \
13; RUN:    -check-prefix=MIPS32R6
14; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips3 | FileCheck %s \
15; RUN:    -check-prefix=MIPS64
16; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips4 | FileCheck %s \
17; RUN:    -check-prefix=MIPS64
18; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64 | FileCheck %s \
19; RUN:    -check-prefix=MIPS64
20; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r2 | FileCheck %s \
21; RUN:    -check-prefix=MIPS64R2
22; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r3 | FileCheck %s \
23; RUN:    -check-prefix=MIPS64R2
24; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r5 | FileCheck %s \
25; RUN:    -check-prefix=MIPS64R2
26; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r6 | FileCheck %s \
27; RUN:    -check-prefix=MIPS64R6
28; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \
29; RUN:    -check-prefix=MM32R3
30; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
31; RUN:    -check-prefix=MM32R6
32
33define signext i32 @bittest_10_i32(i32 signext %a) nounwind {
34; MIPS-LABEL: bittest_10_i32:
35; MIPS:       # %bb.0:
36; MIPS-NEXT:    andi $1, $4, 1024
37; MIPS-NEXT:    jr $ra
38; MIPS-NEXT:    sltiu $2, $1, 1
39;
40; MIPS32R2-LABEL: bittest_10_i32:
41; MIPS32R2:       # %bb.0:
42; MIPS32R2-NEXT:    andi $1, $4, 1024
43; MIPS32R2-NEXT:    jr $ra
44; MIPS32R2-NEXT:    sltiu $2, $1, 1
45;
46; MIPS32R6-LABEL: bittest_10_i32:
47; MIPS32R6:       # %bb.0:
48; MIPS32R6-NEXT:    andi $1, $4, 1024
49; MIPS32R6-NEXT:    jr $ra
50; MIPS32R6-NEXT:    sltiu $2, $1, 1
51;
52; MIPS64-LABEL: bittest_10_i32:
53; MIPS64:       # %bb.0:
54; MIPS64-NEXT:    andi $1, $4, 1024
55; MIPS64-NEXT:    sltiu $1, $1, 1
56; MIPS64-NEXT:    jr $ra
57; MIPS64-NEXT:    sll $2, $1, 0
58;
59; MIPS64R2-LABEL: bittest_10_i32:
60; MIPS64R2:       # %bb.0:
61; MIPS64R2-NEXT:    andi $1, $4, 1024
62; MIPS64R2-NEXT:    sltiu $1, $1, 1
63; MIPS64R2-NEXT:    jr $ra
64; MIPS64R2-NEXT:    sll $2, $1, 0
65;
66; MIPS64R6-LABEL: bittest_10_i32:
67; MIPS64R6:       # %bb.0:
68; MIPS64R6-NEXT:    andi $1, $4, 1024
69; MIPS64R6-NEXT:    sltiu $1, $1, 1
70; MIPS64R6-NEXT:    jr $ra
71; MIPS64R6-NEXT:    sll $2, $1, 0
72;
73; MM32R3-LABEL: bittest_10_i32:
74; MM32R3:       # %bb.0:
75; MM32R3-NEXT:    andi $1, $4, 1024
76; MM32R3-NEXT:    jr $ra
77; MM32R3-NEXT:    sltiu $2, $1, 1
78;
79; MM32R6-LABEL: bittest_10_i32:
80; MM32R6:       # %bb.0:
81; MM32R6-NEXT:    andi $1, $4, 1024
82; MM32R6-NEXT:    sltiu $2, $1, 1
83; MM32R6-NEXT:    jrc $ra
84  %shr = lshr i32 %a, 10
85  %not = xor i32 %shr, -1
86  %and = and i32 %not, 1
87  ret i32 %and
88}
89
90define signext i32 @bittest_15_i32(i32 signext %a) nounwind {
91; MIPS-LABEL: bittest_15_i32:
92; MIPS:       # %bb.0:
93; MIPS-NEXT:    andi $1, $4, 32768
94; MIPS-NEXT:    jr $ra
95; MIPS-NEXT:    sltiu $2, $1, 1
96;
97; MIPS32R2-LABEL: bittest_15_i32:
98; MIPS32R2:       # %bb.0:
99; MIPS32R2-NEXT:    andi $1, $4, 32768
100; MIPS32R2-NEXT:    jr $ra
101; MIPS32R2-NEXT:    sltiu $2, $1, 1
102;
103; MIPS32R6-LABEL: bittest_15_i32:
104; MIPS32R6:       # %bb.0:
105; MIPS32R6-NEXT:    andi $1, $4, 32768
106; MIPS32R6-NEXT:    jr $ra
107; MIPS32R6-NEXT:    sltiu $2, $1, 1
108;
109; MIPS64-LABEL: bittest_15_i32:
110; MIPS64:       # %bb.0:
111; MIPS64-NEXT:    andi $1, $4, 32768
112; MIPS64-NEXT:    sltiu $1, $1, 1
113; MIPS64-NEXT:    jr $ra
114; MIPS64-NEXT:    sll $2, $1, 0
115;
116; MIPS64R2-LABEL: bittest_15_i32:
117; MIPS64R2:       # %bb.0:
118; MIPS64R2-NEXT:    andi $1, $4, 32768
119; MIPS64R2-NEXT:    sltiu $1, $1, 1
120; MIPS64R2-NEXT:    jr $ra
121; MIPS64R2-NEXT:    sll $2, $1, 0
122;
123; MIPS64R6-LABEL: bittest_15_i32:
124; MIPS64R6:       # %bb.0:
125; MIPS64R6-NEXT:    andi $1, $4, 32768
126; MIPS64R6-NEXT:    sltiu $1, $1, 1
127; MIPS64R6-NEXT:    jr $ra
128; MIPS64R6-NEXT:    sll $2, $1, 0
129;
130; MM32R3-LABEL: bittest_15_i32:
131; MM32R3:       # %bb.0:
132; MM32R3-NEXT:    andi16 $2, $4, 32768
133; MM32R3-NEXT:    jr $ra
134; MM32R3-NEXT:    sltiu $2, $2, 1
135;
136; MM32R6-LABEL: bittest_15_i32:
137; MM32R6:       # %bb.0:
138; MM32R6-NEXT:    andi16 $2, $4, 32768
139; MM32R6-NEXT:    sltiu $2, $2, 1
140; MM32R6-NEXT:    jrc $ra
141  %shr = lshr i32 %a, 15
142  %not = xor i32 %shr, -1
143  %and = and i32 %not, 1
144  ret i32 %and
145}
146
147define signext i32 @bittest_16_i32(i32 signext %a) nounwind {
148; MIPS-LABEL: bittest_16_i32:
149; MIPS:       # %bb.0:
150; MIPS-NEXT:    not $1, $4
151; MIPS-NEXT:    srl $1, $1, 16
152; MIPS-NEXT:    jr $ra
153; MIPS-NEXT:    andi $2, $1, 1
154;
155; MIPS32R2-LABEL: bittest_16_i32:
156; MIPS32R2:       # %bb.0:
157; MIPS32R2-NEXT:    not $1, $4
158; MIPS32R2-NEXT:    jr $ra
159; MIPS32R2-NEXT:    ext $2, $1, 16, 1
160;
161; MIPS32R6-LABEL: bittest_16_i32:
162; MIPS32R6:       # %bb.0:
163; MIPS32R6-NEXT:    not $1, $4
164; MIPS32R6-NEXT:    jr $ra
165; MIPS32R6-NEXT:    ext $2, $1, 16, 1
166;
167; MIPS64-LABEL: bittest_16_i32:
168; MIPS64:       # %bb.0:
169; MIPS64-NEXT:    not $1, $4
170; MIPS64-NEXT:    srl $1, $1, 16
171; MIPS64-NEXT:    andi $1, $1, 1
172; MIPS64-NEXT:    jr $ra
173; MIPS64-NEXT:    sll $2, $1, 0
174;
175; MIPS64R2-LABEL: bittest_16_i32:
176; MIPS64R2:       # %bb.0:
177; MIPS64R2-NEXT:    not $1, $4
178; MIPS64R2-NEXT:    ext $1, $1, 16, 1
179; MIPS64R2-NEXT:    jr $ra
180; MIPS64R2-NEXT:    sll $2, $1, 0
181;
182; MIPS64R6-LABEL: bittest_16_i32:
183; MIPS64R6:       # %bb.0:
184; MIPS64R6-NEXT:    not $1, $4
185; MIPS64R6-NEXT:    ext $1, $1, 16, 1
186; MIPS64R6-NEXT:    jr $ra
187; MIPS64R6-NEXT:    sll $2, $1, 0
188;
189; MM32R3-LABEL: bittest_16_i32:
190; MM32R3:       # %bb.0:
191; MM32R3-NEXT:    not16 $2, $4
192; MM32R3-NEXT:    jr $ra
193; MM32R3-NEXT:    ext $2, $2, 16, 1
194;
195; MM32R6-LABEL: bittest_16_i32:
196; MM32R6:       # %bb.0:
197; MM32R6-NEXT:    not16 $2, $4
198; MM32R6-NEXT:    ext $2, $2, 16, 1
199; MM32R6-NEXT:    jrc $ra
200  %shr = lshr i32 %a, 16
201  %not = xor i32 %shr, -1
202  %and = and i32 %not, 1
203  ret i32 %and
204}
205
206define signext i32 @bittest_31_i32(i32 signext %a) nounwind {
207; MIPS-LABEL: bittest_31_i32:
208; MIPS:       # %bb.0:
209; MIPS-NEXT:    not $1, $4
210; MIPS-NEXT:    jr $ra
211; MIPS-NEXT:    srl $2, $1, 31
212;
213; MIPS32R2-LABEL: bittest_31_i32:
214; MIPS32R2:       # %bb.0:
215; MIPS32R2-NEXT:    not $1, $4
216; MIPS32R2-NEXT:    jr $ra
217; MIPS32R2-NEXT:    srl $2, $1, 31
218;
219; MIPS32R6-LABEL: bittest_31_i32:
220; MIPS32R6:       # %bb.0:
221; MIPS32R6-NEXT:    not $1, $4
222; MIPS32R6-NEXT:    jr $ra
223; MIPS32R6-NEXT:    srl $2, $1, 31
224;
225; MIPS64-LABEL: bittest_31_i32:
226; MIPS64:       # %bb.0:
227; MIPS64-NEXT:    not $1, $4
228; MIPS64-NEXT:    jr $ra
229; MIPS64-NEXT:    srl $2, $1, 31
230;
231; MIPS64R2-LABEL: bittest_31_i32:
232; MIPS64R2:       # %bb.0:
233; MIPS64R2-NEXT:    not $1, $4
234; MIPS64R2-NEXT:    jr $ra
235; MIPS64R2-NEXT:    srl $2, $1, 31
236;
237; MIPS64R6-LABEL: bittest_31_i32:
238; MIPS64R6:       # %bb.0:
239; MIPS64R6-NEXT:    not $1, $4
240; MIPS64R6-NEXT:    jr $ra
241; MIPS64R6-NEXT:    srl $2, $1, 31
242;
243; MM32R3-LABEL: bittest_31_i32:
244; MM32R3:       # %bb.0:
245; MM32R3-NEXT:    not16 $2, $4
246; MM32R3-NEXT:    jr $ra
247; MM32R3-NEXT:    srl $2, $2, 31
248;
249; MM32R6-LABEL: bittest_31_i32:
250; MM32R6:       # %bb.0:
251; MM32R6-NEXT:    not16 $2, $4
252; MM32R6-NEXT:    srl $2, $2, 31
253; MM32R6-NEXT:    jrc $ra
254  %shr = lshr i32 %a, 31
255  %not = xor i32 %shr, -1
256  %and = and i32 %not, 1
257  ret i32 %and
258}
259
260define i64 @bittest_10_i64(i64 %a) nounwind {
261; MIPS-LABEL: bittest_10_i64:
262; MIPS:       # %bb.0:
263; MIPS-NEXT:    andi $1, $5, 1024
264; MIPS-NEXT:    sltiu $3, $1, 1
265; MIPS-NEXT:    jr $ra
266; MIPS-NEXT:    addiu $2, $zero, 0
267;
268; MIPS32R2-LABEL: bittest_10_i64:
269; MIPS32R2:       # %bb.0:
270; MIPS32R2-NEXT:    andi $1, $5, 1024
271; MIPS32R2-NEXT:    sltiu $3, $1, 1
272; MIPS32R2-NEXT:    jr $ra
273; MIPS32R2-NEXT:    addiu $2, $zero, 0
274;
275; MIPS32R6-LABEL: bittest_10_i64:
276; MIPS32R6:       # %bb.0:
277; MIPS32R6-NEXT:    andi $1, $5, 1024
278; MIPS32R6-NEXT:    sltiu $3, $1, 1
279; MIPS32R6-NEXT:    jr $ra
280; MIPS32R6-NEXT:    addiu $2, $zero, 0
281;
282; MIPS64-LABEL: bittest_10_i64:
283; MIPS64:       # %bb.0:
284; MIPS64-NEXT:    andi $1, $4, 1024
285; MIPS64-NEXT:    sltiu $1, $1, 1
286; MIPS64-NEXT:    dsll $1, $1, 32
287; MIPS64-NEXT:    jr $ra
288; MIPS64-NEXT:    dsrl $2, $1, 32
289;
290; MIPS64R2-LABEL: bittest_10_i64:
291; MIPS64R2:       # %bb.0:
292; MIPS64R2-NEXT:    andi $1, $4, 1024
293; MIPS64R2-NEXT:    sltiu $1, $1, 1
294; MIPS64R2-NEXT:    jr $ra
295; MIPS64R2-NEXT:    dext $2, $1, 0, 32
296;
297; MIPS64R6-LABEL: bittest_10_i64:
298; MIPS64R6:       # %bb.0:
299; MIPS64R6-NEXT:    andi $1, $4, 1024
300; MIPS64R6-NEXT:    sltiu $1, $1, 1
301; MIPS64R6-NEXT:    jr $ra
302; MIPS64R6-NEXT:    dext $2, $1, 0, 32
303;
304; MM32R3-LABEL: bittest_10_i64:
305; MM32R3:       # %bb.0:
306; MM32R3-NEXT:    andi $1, $5, 1024
307; MM32R3-NEXT:    li16 $2, 0
308; MM32R3-NEXT:    jr $ra
309; MM32R3-NEXT:    sltiu $3, $1, 1
310;
311; MM32R6-LABEL: bittest_10_i64:
312; MM32R6:       # %bb.0:
313; MM32R6-NEXT:    andi $1, $5, 1024
314; MM32R6-NEXT:    sltiu $3, $1, 1
315; MM32R6-NEXT:    li16 $2, 0
316; MM32R6-NEXT:    jrc $ra
317  %shr = lshr i64 %a, 10
318  %not = xor i64 %shr, -1
319  %and = and i64 %not, 1
320  ret i64 %and
321}
322
323define i64 @bittest_15_i64(i64 %a) nounwind {
324; MIPS-LABEL: bittest_15_i64:
325; MIPS:       # %bb.0:
326; MIPS-NEXT:    andi $1, $5, 32768
327; MIPS-NEXT:    sltiu $3, $1, 1
328; MIPS-NEXT:    jr $ra
329; MIPS-NEXT:    addiu $2, $zero, 0
330;
331; MIPS32R2-LABEL: bittest_15_i64:
332; MIPS32R2:       # %bb.0:
333; MIPS32R2-NEXT:    andi $1, $5, 32768
334; MIPS32R2-NEXT:    sltiu $3, $1, 1
335; MIPS32R2-NEXT:    jr $ra
336; MIPS32R2-NEXT:    addiu $2, $zero, 0
337;
338; MIPS32R6-LABEL: bittest_15_i64:
339; MIPS32R6:       # %bb.0:
340; MIPS32R6-NEXT:    andi $1, $5, 32768
341; MIPS32R6-NEXT:    sltiu $3, $1, 1
342; MIPS32R6-NEXT:    jr $ra
343; MIPS32R6-NEXT:    addiu $2, $zero, 0
344;
345; MIPS64-LABEL: bittest_15_i64:
346; MIPS64:       # %bb.0:
347; MIPS64-NEXT:    andi $1, $4, 32768
348; MIPS64-NEXT:    sltiu $1, $1, 1
349; MIPS64-NEXT:    dsll $1, $1, 32
350; MIPS64-NEXT:    jr $ra
351; MIPS64-NEXT:    dsrl $2, $1, 32
352;
353; MIPS64R2-LABEL: bittest_15_i64:
354; MIPS64R2:       # %bb.0:
355; MIPS64R2-NEXT:    andi $1, $4, 32768
356; MIPS64R2-NEXT:    sltiu $1, $1, 1
357; MIPS64R2-NEXT:    jr $ra
358; MIPS64R2-NEXT:    dext $2, $1, 0, 32
359;
360; MIPS64R6-LABEL: bittest_15_i64:
361; MIPS64R6:       # %bb.0:
362; MIPS64R6-NEXT:    andi $1, $4, 32768
363; MIPS64R6-NEXT:    sltiu $1, $1, 1
364; MIPS64R6-NEXT:    jr $ra
365; MIPS64R6-NEXT:    dext $2, $1, 0, 32
366;
367; MM32R3-LABEL: bittest_15_i64:
368; MM32R3:       # %bb.0:
369; MM32R3-NEXT:    andi16 $2, $5, 32768
370; MM32R3-NEXT:    sltiu $3, $2, 1
371; MM32R3-NEXT:    li16 $2, 0
372; MM32R3-NEXT:    jrc $ra
373;
374; MM32R6-LABEL: bittest_15_i64:
375; MM32R6:       # %bb.0:
376; MM32R6-NEXT:    andi16 $2, $5, 32768
377; MM32R6-NEXT:    sltiu $3, $2, 1
378; MM32R6-NEXT:    li16 $2, 0
379; MM32R6-NEXT:    jrc $ra
380  %shr = lshr i64 %a, 15
381  %not = xor i64 %shr, -1
382  %and = and i64 %not, 1
383  ret i64 %and
384}
385
386define i64 @bittest_16_i64(i64 %a) nounwind {
387; MIPS-LABEL: bittest_16_i64:
388; MIPS:       # %bb.0:
389; MIPS-NEXT:    not $1, $5
390; MIPS-NEXT:    srl $1, $1, 16
391; MIPS-NEXT:    andi $3, $1, 1
392; MIPS-NEXT:    jr $ra
393; MIPS-NEXT:    addiu $2, $zero, 0
394;
395; MIPS32R2-LABEL: bittest_16_i64:
396; MIPS32R2:       # %bb.0:
397; MIPS32R2-NEXT:    not $1, $5
398; MIPS32R2-NEXT:    ext $3, $1, 16, 1
399; MIPS32R2-NEXT:    jr $ra
400; MIPS32R2-NEXT:    addiu $2, $zero, 0
401;
402; MIPS32R6-LABEL: bittest_16_i64:
403; MIPS32R6:       # %bb.0:
404; MIPS32R6-NEXT:    not $1, $5
405; MIPS32R6-NEXT:    ext $3, $1, 16, 1
406; MIPS32R6-NEXT:    jr $ra
407; MIPS32R6-NEXT:    addiu $2, $zero, 0
408;
409; MIPS64-LABEL: bittest_16_i64:
410; MIPS64:       # %bb.0:
411; MIPS64-NEXT:    daddiu $1, $zero, -1
412; MIPS64-NEXT:    xor $1, $4, $1
413; MIPS64-NEXT:    dsrl $1, $1, 16
414; MIPS64-NEXT:    jr $ra
415; MIPS64-NEXT:    andi $2, $1, 1
416;
417; MIPS64R2-LABEL: bittest_16_i64:
418; MIPS64R2:       # %bb.0:
419; MIPS64R2-NEXT:    daddiu $1, $zero, -1
420; MIPS64R2-NEXT:    xor $1, $4, $1
421; MIPS64R2-NEXT:    jr $ra
422; MIPS64R2-NEXT:    dext $2, $1, 16, 1
423;
424; MIPS64R6-LABEL: bittest_16_i64:
425; MIPS64R6:       # %bb.0:
426; MIPS64R6-NEXT:    daddiu $1, $zero, -1
427; MIPS64R6-NEXT:    xor $1, $4, $1
428; MIPS64R6-NEXT:    jr $ra
429; MIPS64R6-NEXT:    dext $2, $1, 16, 1
430;
431; MM32R3-LABEL: bittest_16_i64:
432; MM32R3:       # %bb.0:
433; MM32R3-NEXT:    not16 $2, $5
434; MM32R3-NEXT:    ext $3, $2, 16, 1
435; MM32R3-NEXT:    li16 $2, 0
436; MM32R3-NEXT:    jrc $ra
437;
438; MM32R6-LABEL: bittest_16_i64:
439; MM32R6:       # %bb.0:
440; MM32R6-NEXT:    not16 $2, $5
441; MM32R6-NEXT:    ext $3, $2, 16, 1
442; MM32R6-NEXT:    li16 $2, 0
443; MM32R6-NEXT:    jrc $ra
444  %shr = lshr i64 %a, 16
445  %not = xor i64 %shr, -1
446  %and = and i64 %not, 1
447  ret i64 %and
448}
449
450define i64 @bittest_31_i64(i64 %a) nounwind {
451; MIPS-LABEL: bittest_31_i64:
452; MIPS:       # %bb.0:
453; MIPS-NEXT:    not $1, $5
454; MIPS-NEXT:    srl $3, $1, 31
455; MIPS-NEXT:    jr $ra
456; MIPS-NEXT:    addiu $2, $zero, 0
457;
458; MIPS32R2-LABEL: bittest_31_i64:
459; MIPS32R2:       # %bb.0:
460; MIPS32R2-NEXT:    not $1, $5
461; MIPS32R2-NEXT:    srl $3, $1, 31
462; MIPS32R2-NEXT:    jr $ra
463; MIPS32R2-NEXT:    addiu $2, $zero, 0
464;
465; MIPS32R6-LABEL: bittest_31_i64:
466; MIPS32R6:       # %bb.0:
467; MIPS32R6-NEXT:    not $1, $5
468; MIPS32R6-NEXT:    srl $3, $1, 31
469; MIPS32R6-NEXT:    jr $ra
470; MIPS32R6-NEXT:    addiu $2, $zero, 0
471;
472; MIPS64-LABEL: bittest_31_i64:
473; MIPS64:       # %bb.0:
474; MIPS64-NEXT:    daddiu $1, $zero, -1
475; MIPS64-NEXT:    xor $1, $4, $1
476; MIPS64-NEXT:    dsrl $1, $1, 31
477; MIPS64-NEXT:    jr $ra
478; MIPS64-NEXT:    andi $2, $1, 1
479;
480; MIPS64R2-LABEL: bittest_31_i64:
481; MIPS64R2:       # %bb.0:
482; MIPS64R2-NEXT:    daddiu $1, $zero, -1
483; MIPS64R2-NEXT:    xor $1, $4, $1
484; MIPS64R2-NEXT:    jr $ra
485; MIPS64R2-NEXT:    dext $2, $1, 31, 1
486;
487; MIPS64R6-LABEL: bittest_31_i64:
488; MIPS64R6:       # %bb.0:
489; MIPS64R6-NEXT:    daddiu $1, $zero, -1
490; MIPS64R6-NEXT:    xor $1, $4, $1
491; MIPS64R6-NEXT:    jr $ra
492; MIPS64R6-NEXT:    dext $2, $1, 31, 1
493;
494; MM32R3-LABEL: bittest_31_i64:
495; MM32R3:       # %bb.0:
496; MM32R3-NEXT:    not16 $2, $5
497; MM32R3-NEXT:    srl $3, $2, 31
498; MM32R3-NEXT:    li16 $2, 0
499; MM32R3-NEXT:    jrc $ra
500;
501; MM32R6-LABEL: bittest_31_i64:
502; MM32R6:       # %bb.0:
503; MM32R6-NEXT:    not16 $2, $5
504; MM32R6-NEXT:    srl $3, $2, 31
505; MM32R6-NEXT:    li16 $2, 0
506; MM32R6-NEXT:    jrc $ra
507  %shr = lshr i64 %a, 31
508  %not = xor i64 %shr, -1
509  %and = and i64 %not, 1
510  ret i64 %and
511}
512
513define i64 @bittest_32_i64(i64 %a) nounwind {
514; MIPS-LABEL: bittest_32_i64:
515; MIPS:       # %bb.0:
516; MIPS-NEXT:    not $1, $4
517; MIPS-NEXT:    andi $3, $1, 1
518; MIPS-NEXT:    jr $ra
519; MIPS-NEXT:    addiu $2, $zero, 0
520;
521; MIPS32R2-LABEL: bittest_32_i64:
522; MIPS32R2:       # %bb.0:
523; MIPS32R2-NEXT:    not $1, $4
524; MIPS32R2-NEXT:    andi $3, $1, 1
525; MIPS32R2-NEXT:    jr $ra
526; MIPS32R2-NEXT:    addiu $2, $zero, 0
527;
528; MIPS32R6-LABEL: bittest_32_i64:
529; MIPS32R6:       # %bb.0:
530; MIPS32R6-NEXT:    not $1, $4
531; MIPS32R6-NEXT:    andi $3, $1, 1
532; MIPS32R6-NEXT:    jr $ra
533; MIPS32R6-NEXT:    addiu $2, $zero, 0
534;
535; MIPS64-LABEL: bittest_32_i64:
536; MIPS64:       # %bb.0:
537; MIPS64-NEXT:    daddiu $1, $zero, -1
538; MIPS64-NEXT:    xor $1, $4, $1
539; MIPS64-NEXT:    dsrl $1, $1, 32
540; MIPS64-NEXT:    jr $ra
541; MIPS64-NEXT:    andi $2, $1, 1
542;
543; MIPS64R2-LABEL: bittest_32_i64:
544; MIPS64R2:       # %bb.0:
545; MIPS64R2-NEXT:    daddiu $1, $zero, -1
546; MIPS64R2-NEXT:    xor $1, $4, $1
547; MIPS64R2-NEXT:    jr $ra
548; MIPS64R2-NEXT:    dextu $2, $1, 32, 1
549;
550; MIPS64R6-LABEL: bittest_32_i64:
551; MIPS64R6:       # %bb.0:
552; MIPS64R6-NEXT:    daddiu $1, $zero, -1
553; MIPS64R6-NEXT:    xor $1, $4, $1
554; MIPS64R6-NEXT:    jr $ra
555; MIPS64R6-NEXT:    dextu $2, $1, 32, 1
556;
557; MM32R3-LABEL: bittest_32_i64:
558; MM32R3:       # %bb.0:
559; MM32R3-NEXT:    not16 $2, $4
560; MM32R3-NEXT:    andi16 $3, $2, 1
561; MM32R3-NEXT:    li16 $2, 0
562; MM32R3-NEXT:    jrc $ra
563;
564; MM32R6-LABEL: bittest_32_i64:
565; MM32R6:       # %bb.0:
566; MM32R6-NEXT:    not16 $2, $4
567; MM32R6-NEXT:    andi16 $3, $2, 1
568; MM32R6-NEXT:    li16 $2, 0
569; MM32R6-NEXT:    jrc $ra
570  %shr = lshr i64 %a, 32
571  %not = xor i64 %shr, -1
572  %and = and i64 %not, 1
573  ret i64 %and
574}
575
576define i64 @bittest_63_i64(i64 %a) nounwind {
577; MIPS-LABEL: bittest_63_i64:
578; MIPS:       # %bb.0:
579; MIPS-NEXT:    not $1, $4
580; MIPS-NEXT:    srl $3, $1, 31
581; MIPS-NEXT:    jr $ra
582; MIPS-NEXT:    addiu $2, $zero, 0
583;
584; MIPS32R2-LABEL: bittest_63_i64:
585; MIPS32R2:       # %bb.0:
586; MIPS32R2-NEXT:    not $1, $4
587; MIPS32R2-NEXT:    srl $3, $1, 31
588; MIPS32R2-NEXT:    jr $ra
589; MIPS32R2-NEXT:    addiu $2, $zero, 0
590;
591; MIPS32R6-LABEL: bittest_63_i64:
592; MIPS32R6:       # %bb.0:
593; MIPS32R6-NEXT:    not $1, $4
594; MIPS32R6-NEXT:    srl $3, $1, 31
595; MIPS32R6-NEXT:    jr $ra
596; MIPS32R6-NEXT:    addiu $2, $zero, 0
597;
598; MIPS64-LABEL: bittest_63_i64:
599; MIPS64:       # %bb.0:
600; MIPS64-NEXT:    daddiu $1, $zero, -1
601; MIPS64-NEXT:    xor $1, $4, $1
602; MIPS64-NEXT:    jr $ra
603; MIPS64-NEXT:    dsrl $2, $1, 63
604;
605; MIPS64R2-LABEL: bittest_63_i64:
606; MIPS64R2:       # %bb.0:
607; MIPS64R2-NEXT:    daddiu $1, $zero, -1
608; MIPS64R2-NEXT:    xor $1, $4, $1
609; MIPS64R2-NEXT:    jr $ra
610; MIPS64R2-NEXT:    dsrl $2, $1, 63
611;
612; MIPS64R6-LABEL: bittest_63_i64:
613; MIPS64R6:       # %bb.0:
614; MIPS64R6-NEXT:    daddiu $1, $zero, -1
615; MIPS64R6-NEXT:    xor $1, $4, $1
616; MIPS64R6-NEXT:    jr $ra
617; MIPS64R6-NEXT:    dsrl $2, $1, 63
618;
619; MM32R3-LABEL: bittest_63_i64:
620; MM32R3:       # %bb.0:
621; MM32R3-NEXT:    not16 $2, $4
622; MM32R3-NEXT:    srl $3, $2, 31
623; MM32R3-NEXT:    li16 $2, 0
624; MM32R3-NEXT:    jrc $ra
625;
626; MM32R6-LABEL: bittest_63_i64:
627; MM32R6:       # %bb.0:
628; MM32R6-NEXT:    not16 $2, $4
629; MM32R6-NEXT:    srl $3, $2, 31
630; MM32R6-NEXT:    li16 $2, 0
631; MM32R6-NEXT:    jrc $ra
632  %shr = lshr i64 %a, 63
633  %not = xor i64 %shr, -1
634  %and = and i64 %not, 1
635  ret i64 %and
636}
637