xref: /llvm-project/llvm/test/CodeGen/MLRegAlloc/dev-rel-equivalence.ll (revision 65b40f273f09a53f61a13ac6f4bb65ec4ac63d6e)
1; REQUIRES: have_tflite
2; REQUIRES: llvm_raevict_model_autogenerated
3; REQUIRES: x86_64-linux
4;
5; Check that the same model (==the autogenerated one) produces the same output
6; regardless of how it's evaluated, which is different from the default
7;
8; RUN: llc -mtriple=x86_64-linux-unknown -regalloc=greedy -regalloc-enable-advisor=default \
9; RUN:   %S/Inputs/input.ll -o %t.default
10
11; RUN: llc -mtriple=x86_64-linux-unknown -regalloc=greedy -regalloc-enable-advisor=release \
12; RUN:   %S/Inputs/input.ll -o %t.release
13
14; RUN: rm -rf %t %t_savedmodel
15; RUN: %python %S/../../../lib/Analysis/models/gen-regalloc-eviction-test-model.py %t_savedmodel
16; RUN: %python %S/../../../lib/Analysis/models/saved-model-to-tflite.py %t_savedmodel %t
17; RUN: llc -mtriple=x86_64-linux-unknown -regalloc=greedy -regalloc-enable-advisor=development \
18; RUN:   -regalloc-model=%t %S/Inputs/input.ll -o %t.development
19; RUN: diff %t.release %t.development
20; RUN: not diff %t.release %t.default
21