1# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s 2# This test ensures that the MIR parser parses simple register allocation hints 3# correctly. 4 5--- | 6 7 define i32 @test(i32 %a, i32 %b) { 8 body: 9 %c = mul i32 %a, %b 10 ret i32 %c 11 } 12 13... 14--- 15name: test 16tracksRegLiveness: true 17# CHECK: registers: 18# CHECK-NEXT: - { id: 0, class: gr32, preferred-register: '', flags: [ ] } 19# CHECK-NEXT: - { id: 1, class: gr32, preferred-register: '$esi', flags: [ ] } 20# CHECK-NEXT: - { id: 2, class: gr32, preferred-register: '$edi', flags: [ ] } 21registers: 22 - { id: 0, class: gr32 } 23 - { id: 1, class: gr32, preferred-register: '$esi' } 24 - { id: 2, class: gr32, preferred-register: '$edi' } 25body: | 26 bb.0.body: 27 liveins: $edi, $esi 28 29 %1 = COPY $esi 30 %2 = COPY $edi 31 %2 = IMUL32rr %2, %1, implicit-def dead $eflags 32 $eax = COPY %2 33 RET64 killed $eax 34... 35