1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=m68k-linux -verify-machineinstrs | FileCheck %s 3 4; op reg, reg 5 6define zeroext i8 @lsrb(i8 zeroext %a, i8 zeroext %b) nounwind { 7; CHECK-LABEL: lsrb: 8; CHECK: ; %bb.0: 9; CHECK-NEXT: move.b (11,%sp), %d0 10; CHECK-NEXT: move.b (7,%sp), %d1 11; CHECK-NEXT: lsr.b %d0, %d1 12; CHECK-NEXT: move.l %d1, %d0 13; CHECK-NEXT: and.l #255, %d0 14; CHECK-NEXT: rts 15 %1 = lshr i8 %a, %b 16 ret i8 %1 17} 18 19define zeroext i16 @lsrw(i16 zeroext %a, i16 zeroext %b) nounwind { 20; CHECK-LABEL: lsrw: 21; CHECK: ; %bb.0: 22; CHECK-NEXT: move.w (10,%sp), %d0 23; CHECK-NEXT: move.w (6,%sp), %d1 24; CHECK-NEXT: lsr.w %d0, %d1 25; CHECK-NEXT: move.l %d1, %d0 26; CHECK-NEXT: and.l #65535, %d0 27; CHECK-NEXT: rts 28 %1 = lshr i16 %a, %b 29 ret i16 %1 30} 31 32define i32 @lsrl(i32 %a, i32 %b) nounwind { 33; CHECK-LABEL: lsrl: 34; CHECK: ; %bb.0: 35; CHECK-NEXT: move.l (8,%sp), %d1 36; CHECK-NEXT: move.l (4,%sp), %d0 37; CHECK-NEXT: lsr.l %d1, %d0 38; CHECK-NEXT: rts 39 %1 = lshr i32 %a, %b 40 ret i32 %1 41} 42 43; op reg, imm 44 45define zeroext i8 @lsrib(i8 zeroext %a) nounwind { 46; CHECK-LABEL: lsrib: 47; CHECK: ; %bb.0: 48; CHECK-NEXT: move.b (7,%sp), %d0 49; CHECK-NEXT: lsr.b #3, %d0 50; CHECK-NEXT: and.l #255, %d0 51; CHECK-NEXT: rts 52 %1 = lshr i8 %a, 3 53 ret i8 %1 54} 55 56define zeroext i16 @lsriw(i16 zeroext %a) nounwind { 57; CHECK-LABEL: lsriw: 58; CHECK: ; %bb.0: 59; CHECK-NEXT: move.w (6,%sp), %d0 60; CHECK-NEXT: lsr.w #5, %d0 61; CHECK-NEXT: and.l #65535, %d0 62; CHECK-NEXT: rts 63 %1 = lshr i16 %a, 5 64 ret i16 %1 65} 66 67define i32 @lsril(i32 %a) nounwind { 68; CHECK-LABEL: lsril: 69; CHECK: ; %bb.0: 70; CHECK-NEXT: move.l (4,%sp), %d0 71; CHECK-NEXT: lsr.l #7, %d0 72; CHECK-NEXT: rts 73 %1 = lshr i32 %a, 7 74 ret i32 %1 75} 76