xref: /llvm-project/llvm/test/CodeGen/M68k/CConv/fastcc-call.ll (revision d3c10b51a99d4476261f57ceaa7db60960cd5493)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=m68k-pc-linux -relocation-model=pic -verify-machineinstrs | FileCheck %s
3
4;
5; Pass first 4 arguments in registers %d0,%d1,%a0,%a1 the rest goes onto stack
6
7define i32 @foo1() nounwind uwtable {
8; CHECK-LABEL: foo1:
9; CHECK:         .cfi_startproc
10; CHECK-NEXT:  ; %bb.0: ; %entry
11; CHECK-NEXT:    suba.l #4, %sp
12; CHECK-NEXT:    .cfi_def_cfa_offset -8
13; CHECK-NEXT:    move.l #5, (%sp)
14; CHECK-NEXT:    moveq #1, %d0
15; CHECK-NEXT:    moveq #2, %d1
16; CHECK-NEXT:    move.w #3, %a0
17; CHECK-NEXT:    move.w #4, %a1
18; CHECK-NEXT:    jsr (bar1@PLT,%pc)
19; CHECK-NEXT:    moveq #0, %d0
20; CHECK-NEXT:    adda.l #4, %sp
21; CHECK-NEXT:    rts
22entry:
23  call fastcc void @bar1(i32 1, i32 2, i32 3, i32 4, i32 5) nounwind
24  ret i32 0
25}
26
27declare fastcc void @bar1(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e);
28;
29; Pass pointers in %a registers if there are any free left
30define i32 @foo2() nounwind uwtable {
31; CHECK-LABEL: foo2:
32; CHECK:         .cfi_startproc
33; CHECK-NEXT:  ; %bb.0: ; %entry
34; CHECK-NEXT:    suba.l #12, %sp
35; CHECK-NEXT:    .cfi_def_cfa_offset -16
36; CHECK-NEXT:    lea (8,%sp), %a0
37; CHECK-NEXT:    moveq #2, %d0
38; CHECK-NEXT:    lea (4,%sp), %a1
39; CHECK-NEXT:    moveq #4, %d1
40; CHECK-NEXT:    jsr (bar2@PLT,%pc)
41; CHECK-NEXT:    moveq #0, %d0
42; CHECK-NEXT:    adda.l #12, %sp
43; CHECK-NEXT:    rts
44entry:
45  %a = alloca i32, align 4
46  %b = alloca i32, align 4
47  call fastcc void @bar2(ptr %a, i32 2, ptr %b, i32 4) nounwind
48  ret i32 0
49}
50
51declare fastcc void @bar2(ptr %a, i32 %b, ptr %c, i32 %d);
52